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Commits on Dec 15, 2021

• AVX512 QS8->F32 and QU8->F32 VCVT microkernels

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• SSE transpose microkernel

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• AVX2 QS8->F32 and QU8->F32 VCVT microkernels

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• AVX QS8->F32 and QU8->F32 VCVT microkernels

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• AVX512 F32->QS8 and F32->QU8 VCVT microkernels

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• AVX2 F32->QS8 and F32->QU8 VCVT microkernels

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• Fix xnn_release_code_memory to unmap entire capacity of buffer

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• AVX F32->QS8 and F32->QU8 VCVT microkernels

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• Implement vqmovn_s32 and vext_8

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• Implement vdup_8, vdup_16, vdup_32

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• Implement vmax_s8, vmin_s8, vqadd_s16, vqdmulh_s32, vqshl_s32, vrshl_s32

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Commits on Dec 14, 2021

• Implement vst1_16, add some more test cases

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• Implement vst1_8 and fix vst1_32 encoding

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• Full set of benchmarks for Convert operator

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• Remove comments about potential to use _mm256_maskstore_ps in AVX microkernels

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• Fix conditions for flushing icache (only on arm/arm64)

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• Implement vld1_8, vmlal_s16, vmovl_s8

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• JIT memory allocation and integration into Assembler

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• qs8 4x8 aarch32/64 GEMM/IGEMM improved prefetch scheduling.

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• Disable MSan in AVX512SKX QS8/QC8/QU8 DWCONV microkernels

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• Annotate remaining microkernels with Out-of-Bounds reads with XNN_OOB_READS

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• QS8 4x8 lane GEMM AArch32 microkernel

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• Disable MSan and TSan in most microkernels with Out-of-Bounds reads

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• Fully quality std::isnormal in ConvertOperatorTester

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• Add missing <cstddef> include in AArch32Assembler header

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• Benchmark for the Convert (F32->QS8) operator

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Commits on Dec 13, 2021

• Include signed quantized operators in TensorFlow Lite build

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• Aarch64 4x8 lane ld64 GEMM/IGEMM microkernels.

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• Document Convert operator in README

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Commits on Dec 11, 2021

• Expose QS8/QU8->FP32 Convert operator in Subgraph API

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• QS8->F32 and QU8->F32 Convert NC operators

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• Define XNN_PLATFORM_WINDOWS on Windows

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Commits on Dec 10, 2021

• Benchmarks for QS8->F32 and QU8->F32 VCVT microkernels

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• Remove duplicate template line for 1x8c4 NEON dot product.

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• Fix formatting of bx signature

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