Search results

Adding RISC-V Core to ODIN

Status: Open.

#10 In ChFrenkel/ODIN;

· remi-boivin opened on May 29, 2024

Mapping of Neural Network Model on ODIN processor.

Status: Open.

#9 In ChFrenkel/ODIN;

· Furqan-VLSI opened on May 14, 2024

Emulation Using FPGA Xilinx CMOD-A7 35T

Status: Open.

#8 In ChFrenkel/ODIN;

· mthudaa opened on Sep 24, 2023

Is this actively project?

Status: Open.

#7 In ChFrenkel/ODIN;

· learnnshare opened on Oct 31, 2022

Testbench file

Status: Open.

#6 In ChFrenkel/ODIN;

· JiangHuilongNSSC opened on Oct 21, 2022

Izhikevich Parameters

Status: Open.

#5 In ChFrenkel/ODIN;

· xiaoyuehai opened on Jan 21, 2021

simulation testbench

Status: Open.

#4 In ChFrenkel/ODIN;

· YanhuWang opened on Nov 6, 2020

Simulator

Status: Open.

#3 In ChFrenkel/ODIN;

· arijit72 opened on Aug 25, 2020

Question about AER timestamp

Status: Open.

#2 In ChFrenkel/ODIN;

· hisrg opened on Sep 13, 2019

Simulation files

Status: Open.

#1 In ChFrenkel/ODIN;

· sivalley opened on May 3, 2019