I work with a xilinx FPGA (spartan 6), with the ise toolchain, when i try to run the lab002 from fpga_101 i have an xst problem: ERROR: Xst: 2927 - "/home/hyde/Digital/Soc/fpga_101/lab002/build/top.prj "line 1: Source file imports / home / hyde / Digital / Soc / fpga_101 / lab002 / bcd.v does not exist

This is because the file address is not taken well, so modify the generic_platform.py file on line 325: def copy_sources (self, build_dir, subdir = os.getcwd () + "/build/build/imports"):

In this way i solve the error
generic_platform.txt