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anudeepnrao.github.io Public
Base code for portfolio site
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Fault-collapsing-and-Fault-simulation Public
Forked from harshithsn/Fault-collapsing-and-Fault-simulationThis project is based on Digital VLSI Testing and Testability. The netlist is given as input, the code performs Dominance fault collapsing, Parallel fault simulation, Deductive fault simulation.
Jupyter Notebook UpdatedMar 29, 2024 -
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riscvCoreSyntaCore1 Public
Forked from syntacore/scr1SCR1 is a high-quality open-source RISC-V MCU core in Verilog
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pd_all Public
Open Source IPs for teaching Physical Design Flow using Cadence Design Systems 17.2
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nosconf.github.io Public
Forked from nosconf/nosconf.github.ionitte open source conference
HTML UpdatedAug 26, 2023 -
complex8smul Public
Complex Multiplier with 8bit unsigned operand inputs
SystemVerilog MIT License UpdatedAug 26, 2023 -
radar_wv_gen Public
Radar waveform Generator using FPGA
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scilab Public
Forked from opencollab/scilabNumerical computing software.
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imad-app Public
Forked from hasura/imad-appBase repository for IMAD course application.
JavaScript UpdatedAug 13, 2017 -
Arduino Public
Forked from arduino/Arduinoopen-source electronics prototyping platform
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