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Commits on Jun 12, 2020

• Merge pull request #333 from jck/py38

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Commits on Jun 4, 2020

• Merge pull request #337 from raczben/master

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  cfelton

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Commits on Apr 12, 2020

• add more docs details to instances()

  raczben

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Commits on Apr 10, 2020

• Merge pull request #307 from hugovk/rm-2

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  jck

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• travis: start testing on Python 3.8 too

  jck

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Commits on Mar 14, 2020

• Add +: verilog operator (#329)

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  jdavidberger

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Commits on Feb 4, 2020

• Universal wheels are only for when supporting both Python 2 and 3

  hugovk

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Commits on Sep 15, 2019

• Updating uart_tx example to use @block decorator and new API. (#320)

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  richmorj

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Commits on Aug 10, 2019

• Function name is fixed (#318)

  

  ahmetanbar

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  jck

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Commits on Aug 9, 2019

• Merge branch 'master' into rm-2

  hugovk

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Commits on May 31, 2019

• incremented revision in init

  cfelton

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• updated the README to reflect the 0.11 release

  cfelton

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Commits on May 19, 2019

• Updated docs for 0.11 release (#315)

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  cfelton

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• Merge pull request #297 from myhdl/jck.docs

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  cfelton

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• Merge pull request #277 from josyb/enum

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Commits on May 12, 2019

• Merge pull request #313 from josyb/Doc

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Commits on May 11, 2019

• (pedantic) correction of deprecated

  josyb

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Commits on Mar 12, 2019

• The future is now

  hugovk

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• Add python_requires to help pip

  hugovk

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• Drop support for legacy Python 2.7

  hugovk

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• sudo no longer needed https://blog.travis-ci.com/2018-11-19-required-linux-infrastructure-migration

  hugovk

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Commits on Feb 4, 2019

• Merge pull request #302 from jck/debug_info

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  jck

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Commits on Feb 3, 2019

• add simple debug info module

  jck

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• update installation instructions

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  jck

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• Merge pull request #298 from myhdl/jck.issue_templates

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• basic issue templates

  jck

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Commits on Jan 9, 2019

• Merge pull request #275 from rubund/spelling_fixes

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• Merge pull request #292 from josyb/EKWCD2

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• Nested Top-Level Interfaces (#270)

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  josyb

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Commits on Jan 4, 2019

• conversion to VHDL: moved validation of port names before assign port_num names in case of 'std_logic_ports=True'

  

  Josy Boelen

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Commits on Dec 6, 2018

• Enhanced Enhanced VHDL Keyword Collision Check (#285)

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  josyb

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Commits on Dec 5, 2018

• corrected invalid_function_underscore to call on invalid_signal_underscore to solicit for a double underscore

  

  Josy Boelen

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• move test for used VHDL name one level up

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  Josy Boelen

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• added category=ToVHDLWarning in _nameValid() check

  

  Josy Boelen

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• corrected (with Henry's help) to run with Python 3.x

  

  Josy Boelen

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