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Commits on Aug 9, 2025

• updated files from Supra-2025.05.b0

  

  Steve White

  committed
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Commits on Mar 26, 2024

• add decrypted files from AgRV_pio-1.4.1-linux-release.tar.gz's

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  Steve White

  committed
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• add bels to ag256 ufm tile.

  

  Steve White

  committed
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• ag256 i/o tile cleanup

  

  Steve White

  committed
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Commits on Mar 25, 2024

• match case in ag576B256-wires.json

  

  Steve White

  committed
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• more ag256 logic tile cleanup

  

  Steve White

  committed
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• light cleanup of ag256 logic tile.

  

  Steve White

  committed
  ddb7c93

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• remove debugging

  

  Steve White

  committed
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• add wires for ag256

  

  Steve White

  committed
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• add basic config chain for ag256

  

  Steve White

  committed
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• remove unnecessary imports

  

  Steve White

  committed
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• add preliminary support for AG256SL100

  

  Steve White

  committed
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• change iobank value type to ints for ag1280 chips

  

  Steve White

  committed
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• correct rounding row length up to nearest 32bit

  

  Steve White

  committed
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Commits on Dec 25, 2022

• update from Supra-2022.11.b0-ae2d6408

  

  Steve White

  committed
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• update synth scripts to use the most recent linux version of Supra.

  

  Steve White

  committed
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• update scripts to use python3 instead of python

  

  Steve White

  committed
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• update decoded files using Supra-2022.06.b0-454528eb

  

  Steve White

  committed
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• update bar types from Supra-2022.06.b0-454528eb

  

  Steve White

  committed
  5db7c88

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• update agm-decode to deal with the changes made to the

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  Steve White

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Commits on Nov 22, 2021

• Apply `Update generic synth script for dfflegalize changes` from yosys @ 26dfe6f

  

  Steve White

  committed
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• Merge branch 'master' of https://github.com/pablomarx/rodinia

  

  Steve White

  committed
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Commits on Nov 21, 2021

• Add note about yosys compatibility

  

  pablomarx

  authored
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Commits on Feb 6, 2021

• Merge branch 'master' of https://github.com/pablomarx/rodinia

  

  Steve White

  committed
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Commits on Feb 5, 2021

• log key/tilename on encoding assertion fails.

  

  Steve White

  committed
  6d08a13

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• Fix regression in GclkDMUX00 encoding on AG1280 IO tiles.

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  Steve White

  committed
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• Correct alta_bram DataOutB <-> BufMUX connections

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  Steve White

  committed
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• When decoding mux when mux_len==bit_len, if the value isn't a power

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  Steve White

  committed
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• remove nofmt/fmt stuff from fasm output. the output should

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  Steve White

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• when formatting a mux, if we can decode it to a number, return that

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  Steve White

  committed
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• Add value transform for LUTCMUX, OMUX, CARRY_CRL

  

  Steve White

  committed
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• Update input_for_tile_config to use new wire/coord ordering.

  

  Steve White

  committed
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• Replace encoders+formatters with value_transformers that can be

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  Steve White

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Commits on Feb 1, 2021

• Add auxiliary IO tile BELs in tiles.py. Remove associated code from simple.py

  

  Steve White

  committed
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• Perform FF_USED / CARRY_CRL map in bitstream.py

  

  Steve White

  committed
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