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I've made the following changes to stlink to get it to recognise and upload to the L412:
$ git diff
diff --git a/src/chipid.c b/src/chipid.c
index 6f93af1..ca6e815 100644
--- a/src/chipid.c
+++ b/src/chipid.c
@@ -507,6 +507,19 @@ static const struct stlink_chipid_params devices[] = {
.bootrom_base = 0x1ff00000,
.bootrom_size = 0x2000
},
+ {
+ // STM32L41X
+ .chip_id = STLINK_CHIPID_STM32_L41X,
+ .description = "L412 device",
+ .flash_type = STLINK_FLASH_TYPE_L4,
+ .flash_size_reg = 0x1fff75e0, // "Flash size data register" (sec 49.2, page 1809)
+ .flash_pagesize = 0x800, // Page erase (2 Kbyte) (sec 3.2, page 93)
+ // SRAM1 is 32k at 0x20000000
+ // SRAM2 is 8k at 0x20008000
+ .sram_size = 0x0A000,
+ .bootrom_base = 0x1fff0000,
+ .bootrom_size = 0x7000
+ },
{
// unknown
.chip_id = STLINK_CHIPID_UNKNOWN,
diff --git a/src/flash_loader.c b/src/flash_loader.c
index 7684680..f2e6367 100644
--- a/src/flash_loader.c
+++ b/src/flash_loader.c
@@ -306,6 +306,7 @@ int stlink_flash_loader_write_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t*
loader_code = loader_code_stm32f0;
loader_size = sizeof(loader_code_stm32f0);
} else if ((sl->chip_id == STLINK_CHIPID_STM32_L4) ||
+ (sl->chip_id == STLINK_CHIPID_STM32_L41X) ||
(sl->chip_id == STLINK_CHIPID_STM32_L43X) ||
(sl->chip_id == STLINK_CHIPID_STM32_L46X) ||
(sl->chip_id == STLINK_CHIPID_STM32_L4RX) ||
I'm not sure about bootrom_size, but the rest should be correct.
Note also that STLINK_CHIPID_STM32_L41X (0x464) was already present in src/chipid.h.