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CDHenhancementNew feature or requestNew feature or requestgood first issueGood for newcomersGood for newcomers
Description
Currently have to do register level blocking custom spi transfer on the CDH board (SAME70)
// No reason for this to work when the one written by atmel doesn't
static inline uint8_t SPI0_transferByte(uint8_t tx)
{
while ((SPI0->SPI_SR & SPI_SR_TDRE) == 0);
SPI0->SPI_TDR = SPI_TDR_TD(tx);
while ((SPI0->SPI_SR & SPI_SR_RDRF) == 0);
return (uint8_t)SPI0->SPI_RDR;
}
void SPI0_transferCustom(const uint8_t* txbuf, uint8_t* rxbuf, size_t txsize, size_t rxsize)
{
int i;
for (i = 0; i < txsize; ++i) {
SPI0_transferByte(txbuf[i]);
}
for (i = 0; i < rxsize; ++i) {
rxbuf[i] = SPI0_transferByte(0x00);
}
// This ensures CS only goes high after we're done transferring (last transfer)
hri_spi_write_CR_reg(SPI0, SPI_CR_LASTXFER);
}We would rather use the driver provided by TI, which is supported like this:
// FIXME: This behaves weirdly hence the custom transfer function. We would like to be able to use atmel drivers as much as possible
void SPI0_transfer(const uint8_t* txbuf, uint8_t* rxbuf, size_t size)
{
struct spi_xfer xfer;
xfer.txbuf = txbuf;
xfer.rxbuf = rxbuf;
xfer.size = size;
spi_m_sync_transfer(&SPI0_desc, &xfer); /// <----- We want to be able to use this function here
// This ensures CS only goes high after we're done transferring (last transfer)
hri_spi_write_CR_reg(SPI0, SPI_CR_LASTXFER);
}But it behaves in strange ways. Task is to figure out what is strange, then make it behave normally. If there really is a valid reason why we can't use the atmel driver, it is important that we know why. You need a logic analyzer or oscilliscope for this one. Any questions message brendan (@brendan9870 on discord @BrendanKelly84213 on github)
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CDHenhancementNew feature or requestNew feature or requestgood first issueGood for newcomersGood for newcomers