WinoCNN combines systolic array and fast Winograd algorithm for CNN acceleration. This system supports flexible convolution kernel sizes without sacrificing DSP efficiency through various algorithmic, architecture and on-chip memory subsystem designs and optimizations. Overall, our accelerator delivers high throughput and state-of-the-art DSP efficiency compared to previous accelerator implementations.

Copyright (c) <2021>

All rights reserved.

Developed by:

http://dchen.ece.illinois.edu/

This open source project contains the source code for WinoCNN.

When referencing this application in a publication, please cite the following paper:

[1] X. Liu, Y. Chen, C. Hao, A. Dhar and D. Chen, "WinoCNN: Kernel Sharing Winograd Systolic Array for Efficient Convolutional Neural Network Acceleration on FPGAs", IEEE International Conference on Application-specific Systems, Architectures and Processors, 2021.