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����M051��ʱ��3 ����ģʽ���Գ���

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����������M051��Ƭ����ʱ��3�� ����ģʽ���Գ��� �ɹ��棺

#include "SmartM_M0.h"

UINT32 i =0;
/****************************************
*��������:TMR3Init
*��    ï¿½ï¿½:��
*��    ï¿½ï¿½:��
*��    ï¿½ï¿½:��ʱ��3��ʼ��
******************************************/
VOID TMR3Init(VOID)
{
    PROTECT_REG
 (
  /* ʹ��TMR0ʱ��Դ */
     APBCLK |= TMR3_CLKEN;
  /* ѡ��TMR0ʱ��ԴΪ�ⲿ����12MHz */ 
  CLKSEL1 = (CLKSEL1 & (~TM3_CLK)) | TM0_12M; 
  /* ��λTMR3 */
  IPRSTC2 |=  TMR3_RST;
  IPRSTC2 &= ~TMR3_RST; 
  /* ѡ��TMR3�Ĺ���ģʽΪ����ģʽ*/ 
  TCSR3 &= ~TMR_MODE;
  TCSR3 |=  MODE_PERIOD;  
  /* ������� = (Period of timer clock input) * (8-bit Prescale + 1) * (24-bit TCMP)*/
   /* ������� = (1/12MHz) * (0 + 1) * (12000*500)=500ms (0.5S)*/
  TCSR3  = TCSR3 & 0xFFFFFF01;  // ����Ԥ��Ƶֵ [0~255]
  TCMPR3 = 12000*500;        // ���ñȽ�ֵ [0~16777215]
  TCSR3 |= TMR_IE;     //ʹ��TMR0�ж�
  NVIC_ISER |= TMR3_INT; 
  TCSR3 |= CRST;      //��λTMR0������    
  TCSR3 |= CEN;      //ʹ��TMR0
 )
}
/****************************************
*��������:main
*��    ï¿½ï¿½:��
*��    ï¿½ï¿½:��
*��    ï¿½ï¿½:��������
******************************************/
INT32 main(VOID)
{
     PROTECT_REG            //ISP����ʱ����FLASH�洢��
  (       
   PWRCON |= XTL12M_EN;      //Ĭ��ʱ��ԴΪ�ⲿ����
   while((CLKSTATUS & XTL12M_STB) == 0);   //�ȴ�12MHzʱ���ȶ�      
   CLKSEL0 = (CLKSEL0 & (~HCLK)) | HCLK_12M; //�����ⲿ����Ϊϵͳʱ�� 
   P2_PMD = 0x5555;       //P2������Ϊ���ģʽ
      P2_DOUT= 0x00;        //P2������͵�ƽ
  )
  TMR3Init();  
  while(1)
  {
   if(i > 7)
   {
      i = 0;
   }
  }
}
/****************************************
*��������:TMR3_IRQHandler
*��    ï¿½ï¿½:��
*��    ï¿½ï¿½:��
*��    ï¿½ï¿½:��ʱ��3�жϷ�����
******************************************/
VOID TMR3_IRQHandler(VOID)
{
 /* ���TMR3�жϱ�־λ */
 TISR3 |= TMR_TIF;
    P2_DOUT = 1UL<<i;         //P2�������Ӧ�ĵ�ƽ
 i++;
}
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