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ORCIDAruna Jayasena
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2020 – today
- 2025
[j11]Hansika Weerasena, Aruna Jayasena
, Christina Boucher, Prabhat Mishra:
Formal verification of bioinformatics software using model checking and theorem proving. Briefings Bioinform. 26(4) (2025)- [j10]Aruna Jayasena, Richard Bachmann, Prabhat Mishra:
CiseLeaks: Information Leakage Assessment of Cryptographic Instruction Set Extension Prototypes. IEEE Trans. Inf. Forensics Secur. 20: 1551-1565 (2025) - [j9]Aruna Jayasena, Prabhat Mishra:
FirmWall: Directed Symbolic Execution of Firmware Binaries for Defending Against Unauthorized System Calls. IEEE Trans. Inf. Forensics Secur. 20: 6999-7012 (2025) - [j8]Sahan Sanjaya, Aruna Jayasena, Prabhat Mishra:
Information Leakage Through Physical Layer Supply Voltage Coupling Vulnerability. IEEE Trans. Very Large Scale Integr. Syst. 33(6): 1715-1728 (2025) - [i7]Sahan Sanjaya, Aruna Jayasena, Prabhat Mishra:
SleepWalk: Exploiting Context Switching and Residual Power for Physical Side-Channel Attacks. CoRR abs/2507.22306 (2025) - 2024
- [j7]Aruna Jayasena, Prabhat Mishra:
Directed Test Generation for Hardware Validation: A Survey. ACM Comput. Surv. 56(5): 132:1-132:36 (2024) - [j6]Aruna Jayasena, Prabhat Mishra:
HIVE: Scalable Hardware-Firmware Co-Verification Using Scenario-Based Decomposition and Automated Hint Extraction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(10): 3278-3291 (2024) - [j5]Hasini Witharana, Aruna Jayasena, Prabhat Mishra:
Incremental Concolic Testing of Register-Transfer Level Designs. ACM Trans. Design Autom. Electr. Syst. 29(3): 55:1-55:23 (2024) - [c3]Aruna Jayasena, Richard Bachmann, Prabhat Mishra:
EvilCS: An Evaluation of Information Leakage through Context Switching on Security Enclaves. DATE 2024: 1-6 - [c2]Aruna Jayasena, Prabhat Mishra:
Design for Trust Utilizing Rareness Reduction. VLSID 2024: 437-442 - [i6]Sahan Sanjaya, Aruna Jayasena, Prabhat Mishra:
Information Leakage through Physical Layer Supply Voltage Coupling Vulnerability. CoRR abs/2403.08132 (2024) - [i5]Aruna Jayasena, Richard Bachmann, Prabhat Mishra:
CISELeaks: Information Leakage Assessment of Cryptographic Instruction Set Extension Prototypes. IACR Cryptol. ePrint Arch. 2024: 932 (2024) - 2023
- [j4]Hasini Witharana, Aruna Jayasena, Andrew Whigham, Prabhat Mishra:
Automated Generation of Security Assertions for RTL Models. ACM J. Emerg. Technol. Comput. Syst. 19(1): 8:1-8:27 (2023) - [j3]Aruna Jayasena, Prabhat Mishra:
Scalable Detection of Hardware Trojans Using ATPG-Based Activation of Rare Events. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 4450-4462 (2023) - [j2]Aruna Jayasena, Emma Andrews, Prabhat Mishra:
TVLA*: Test Vector Leakage Assessment on Hardware Implementations of Asymmetric Cryptography Algorithms. IEEE Trans. Very Large Scale Integr. Syst. 31(9): 1269-1279 (2023) - [i4]Aruna Jayasena, Prabhat Mishra:
DETER: Design for Trust utilizing Rareness Reduction. CoRR abs/2302.08984 (2023) - [i3]Hasini Witharana, Aruna Jayasena, Prabhat Mishra:
Sequence-Based Incremental Concolic Testing of RTL Models. CoRR abs/2302.12241 (2023) - [i2]Aruna Jayasena, Prabhat Mishra:
HIVE: Scalable Hardware-Firmware Co-Verification using Scenario-based Decomposition and Automated Hint Extraction. CoRR abs/2309.08002 (2023) - [i1]Yuntao Liu, Aruna Jayasena, Prabhat Mishra, Ankur Srivastava:
Logic Locking based Trojans: A Friend Turns Foe. CoRR abs/2309.15067 (2023) - 2022
- [j1]Aruna Jayasena, Binod Kumar, Subodha Charles, Hasini Witharana, Prabhat Mishra:
Network-on-Chip Trust Validation Using Security Assertions. J. Hardw. Syst. Secur. 6(3-4): 79-94 (2022) - [c1]Aruna Jayasena, Khushboo Rani, Prabhat Mishra:
Efficient Finite State Machine Encoding for Defending Against Laser Fault Injection Attacks. ICCD 2022: 247-254
Coauthor Index
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