Welcome to FireSim’s documentation (version “main”)!
New to FireSim? Jump to the FireSim Basics page for more info.
Getting Started:
Initial Setup:
Chipyard-based Starter Tutorials:
- AWS EC2 F2 Getting Started Guide
- Xilinx Alveo U200 XDMA-based Getting Started Guide
- Xilinx Alveo U250 XDMA-based Getting Started Guide
- Xilinx Alveo U280 XDMA-based Getting Started Guide
- Xilinx VCU118 XDMA-based Getting Started Guide
- RHS Research Nitefury II XDMA-based Getting Started Guide
- (Experimental) Xilinx Alveo U250 Vitis-based Getting Started Guide
Advanced Docs:
- Manager Usage (the
firesimcommand) - Workloads
- Targets
- Debugging in Software
- Debugging and Profiling on the FPGA
- Capturing RISC-V Instruction Traces with TracerV
- Assertion Synthesis: Catching RTL Assertions on the FPGA
- Printf Synthesis: Capturing RTL printf Calls when Running on the FPGA
- AutoILA: Simple Integrated Logic Analyzer (ILA) Insertion
- AutoCounter: Profiling with Out-of-Band Performance Counter Collection
- TracerV + Flame Graphs: Profiling Software with Out-of-Band Flame Graph Generation
- Spike Co-simulation with BOOM designs
- Debugging a Hanging Simulator
- PlusArg Synthesis: Runtime Modification of RTL
- Non-Source Dependency Management
- Supernode - Multiple Simulated SoCs Per FPGA
- FireAxe - Partitioning onto Multiple FPGAs
- Miscellaneous Tips
- Adding support for a new FPGA
- Using FireSim without Chipyard
- FireSim Asked Questions
- I just bumped the FireSim repository to a newer commit and simulations aren’t running. What is going on?
- Is there a good way to keep track of what AGFI corresponds to what FireSim commit?
- Help, My Simulation Hangs!
- Should My Simulator Produce Different Results Across Runs?
- Is there a way to compress workload results when copying back to the manager instance?
Compiler (Golden Gate) Docs:
Developer Docs:
Miscellaneous: