From 88a51e11425814afd01927adad29a671c1d2c8bb Mon Sep 17 00:00:00 2001 From: chuck todd Date: Sun, 20 May 2018 12:25:08 -0600 Subject: [PATCH 1/3] Brain Fade, Did a direct file edit, and of course I failed. --- cores/esp32/esp32-hal-i2c.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/cores/esp32/esp32-hal-i2c.c b/cores/esp32/esp32-hal-i2c.c index 2db29fab95b..4d008c0fde7 100644 --- a/cores/esp32/esp32-hal-i2c.c +++ b/cores/esp32/esp32-hal-i2c.c @@ -630,13 +630,13 @@ void i2cDumpI2c(i2c_t * i2c){ log_e("i2c=%p",i2c); char levelText[8]; switch(ARDUHAL_LOG_LEVEL){ - case 0 : levelText = sprintf("NONE"); break; - case 1 : levelText = sprintf("ERROR"); break; - case 2 : levelText = sprintf("WARN"); break; - case 3 : levelText = sprintf("INFO"); break; - case 4 : levelText = sprintf("DEBUG"); break; - case 5 : levelText = sprintf("VERBOSE"); break; - default : levelText = sprintf("uk=%d",ARDUHAL_LOG_LEVEL); + case 0 : sprintf(levelText,"NONE"); break; + case 1 : sprintf(levelText,"ERROR"); break; + case 2 : sprintf(levelText,"WARN"); break; + case 3 : sprintf(levelText,"INFO"); break; + case 4 : sprintf(levelText,"DEBUG"); break; + case 5 : sprintf(levelText,"VERBOSE"); break; + default : sprintf(levelText,"uk=%d",ARDUHAL_LOG_LEVEL); } log_e("dev=%p date=%p level=%s",i2c->dev,i2c->dev->date,levelText); #if !CONFIG_DISABLE_HAL_LOCKS From 0db1b53175ae7f615008add77401ea4e16ee541d Mon Sep 17 00:00:00 2001 From: chuck todd Date: Wed, 23 May 2018 19:51:21 -0600 Subject: [PATCH 2/3] brainless blunder xEventGroupclearBits() does not return an error code, just the prior values of the flags. --- cores/esp32/esp32-hal-i2c.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/cores/esp32/esp32-hal-i2c.c b/cores/esp32/esp32-hal-i2c.c index 4d008c0fde7..29eadcb036f 100644 --- a/cores/esp32/esp32-hal-i2c.c +++ b/cores/esp32/esp32-hal-i2c.c @@ -1026,8 +1026,7 @@ if(!i2c->i2c_event){ i2c->i2c_event = xEventGroupCreate(); } if(i2c->i2c_event) { - uint32_t ret=xEventGroupClearBits(i2c->i2c_event, 0xFF); - if(ret != ESP_OK) log_e("Unable to Clear Event Bits=%d",ret); + xEventGroupClearBits(i2c->i2c_event, 0xFF); } else {// failed to create EventGroup log_e("eventCreate failed=%p",i2c->i2c_event); From 2a2e699b44513f15187686a470597742047b4af6 Mon Sep 17 00:00:00 2001 From: chuck todd Date: Mon, 2 Jul 2018 10:08:11 -0600 Subject: [PATCH 3/3] Remove confusing Debug message If Core Debug Level is at DEBUG, a confusing debug message will be emitted if the I2C transaction takes longer complete than the calculated minimum time. This original debug message was just to prove that this new i2c code could correctly handle SCL stretching or interrupt latency issues. This delay is not a problem, or an error. Usually it is caused by a higher priory interrupt starving the i2c ISR. Usually WiFi is the culprit. As long of this delay is within the configured timeout (by default 50ms, or can be set with Wire.setTimeOut(milliseconds);) no problem will occur and the transaction will successfully complete. Chuck. --- cores/esp32/esp32-hal-i2c.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/cores/esp32/esp32-hal-i2c.c b/cores/esp32/esp32-hal-i2c.c index 29eadcb036f..09c6caf91a4 100644 --- a/cores/esp32/esp32-hal-i2c.c +++ b/cores/esp32/esp32-hal-i2c.c @@ -1159,15 +1159,6 @@ if(!(eBits==EVENT_DONE)&&(eBits&~(EVENT_ERROR_NAK|EVENT_ERROR_DATA_NAK|EVENT_ERR } if(eBits&EVENT_DONE){ // no gross timeout -#if ARDUHAL_LOG_LEVEL >= ARDUHAL_LOG_LEVEL_DEBUG - uint32_t expected =(totalBytes*10*1000)/i2cGetFrequency(i2c); - if((tAfter-tBefore)>(expected+1)) { //used some of the timeout Period - // expected can be zero due to small packets - log_d("used TimeoutRecovery: expected=%ums, actual=%ums, configured=%ums ",expected,(tAfter-tBefore),timeOutMillis); - i2cDumpI2c(i2c); - i2cDumpInts(i2c->num); - } -#endif switch(i2c->error){ case I2C_OK : reason = I2C_ERROR_OK;