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Commits on Dec 27, 2017

• README.md - dead URL corrected

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Commits on Mar 11, 2017

• Fixed ft_fifo_write_byte() broken after refactoring (#1)

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Commits on Sep 23, 2016

• Comments added

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• Comment headers in VHDL files

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• Board picture added

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Commits on Sep 20, 2016

• Downstream tests implemented

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Commits on Sep 17, 2016

• Added EEPROM clearing tool

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• License file added

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• README files

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• Cleanup repo naming

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• Schematic PDF

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• Dropping old python test

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Commits on Sep 16, 2016

• Set buffer size according to FTDI recommendation

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• No, wait state is not needed, proper counter handling is

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• VHDL bugs fixed

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• Merge branch 'master' of atelier.codepainters.com:be_ftdi

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• Added s_state_ws - extra wait state to make FTDI happy

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• Made f_nWR synchronous, added timing constraints

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Commits on Sep 14, 2016

• git-ignore Quartus files properly

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• bf_rxfifo: flush buffers before starting

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• ft_fifo: all the settings required by FTDI sync mode

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• LEDs - use positive logic

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Commits on Sep 13, 2016

• Added host-side test code.

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• if_test: use predefined test sequence

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• test: LEDs reverted to show byte written

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• Fixed nSIWU not being pulled up

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Commits on Sep 12, 2016

• if_test: bugs fixed

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• VHDL test code completed

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Commits on Sep 9, 2016

• Gitignore for quartus files

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• Bootstrapping FPGA test project (Quartus II, VHDL)

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Commits on Aug 29, 2016

• Bootstrapping pyftdi based test script

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Commits on Aug 26, 2016

• README added with pin mapping

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Commits on Aug 8, 2016

• Datasheets

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• Gerbers / Excellon

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• Minor layout fixes

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