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tannergoodingtannergooding
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Cleanup some cases found by SPMI
1 parent 47d01d0 commit 40ffaa3

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5 files changed

+32
-24
lines changed

5 files changed

+32
-24
lines changed

‎src/coreclr/jit/emitxarch.cpp‎

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -10948,7 +10948,7 @@ void emitter::emitDispInsHex(instrDesc* id, BYTE* code, size_t sz)
1094810948
//
1094910949
void emitter::emitDispEmbBroadcastCount(instrDesc* id) const
1095010950
{
10951-
if (!IsAvx512OrPriorInstruction(id->idIns()) || !id->idIsEvexbContextSet())
10951+
if (!IsEvexEncodableInstruction(id->idIns()) || !id->idIsEvexbContextSet())
1095210952
{
1095310953
return;
1095410954
}
@@ -10995,7 +10995,7 @@ void emitter::emitDispEmbRounding(instrDesc* id) const
1099510995
//
1099610996
void emitter::emitDispEmbMasking(instrDesc* id) const
1099710997
{
10998-
if (!IsAvx512OrPriorInstruction(id->idIns()))
10998+
if (!IsEvexEncodableInstruction(id->idIns()))
1099910999
{
1100011000
return;
1100111001
}
@@ -11215,7 +11215,7 @@ void emitter::emitDispIns(
1121511215

1121611216
case IF_CNS:
1121711217
{
11218-
assert(!IsAvx512OrPriorInstruction(id->idIns()));
11218+
assert(!IsEvexEncodableInstruction(id->idIns()));
1121911219

1122011220
val = emitGetInsSC(id);
1122111221
#ifdef TARGET_AMD64
@@ -11260,7 +11260,7 @@ void emitter::emitDispIns(
1126011260
case IF_AWR:
1126111261
case IF_ARW:
1126211262
{
11263-
assert(!IsAvx512OrPriorInstruction(id->idIns()));
11263+
assert(!IsEvexEncodableInstruction(id->idIns()));
1126411264

1126511265
if (((ins == INS_call) || (ins == INS_tail_i_jmp)) && id->idIsCallRegPtr())
1126611266
{
@@ -11554,7 +11554,7 @@ void emitter::emitDispIns(
1155411554
case IF_SWR:
1155511555
case IF_SRW:
1155611556
{
11557-
assert(!IsAvx512OrPriorInstruction(id->idIns()));
11557+
assert(!IsEvexEncodableInstruction(id->idIns()));
1155811558
printf("%s", sstr);
1155911559

1156011560
#if !FEATURE_FIXED_OUT_ARGS
@@ -12106,7 +12106,7 @@ void emitter::emitDispIns(
1210612106
case IF_RWR:
1210712107
case IF_RRW:
1210812108
{
12109-
assert(!IsAvx512OrPriorInstruction(id->idIns()));
12109+
assert(!IsEvexEncodableInstruction(id->idIns()));
1211012110
printf("%s", emitRegName(id->idReg1(), attr));
1211112111
emitDispShift(ins);
1211212112
break;
@@ -12317,7 +12317,7 @@ void emitter::emitDispIns(
1231712317

1231812318
case IF_RWR_MRD_OFF:
1231912319
{
12320-
assert(!IsAvx512OrPriorInstruction(id->idIns()));
12320+
assert(!IsEvexEncodableInstruction(id->idIns()));
1232112321
printf("%s, %s", emitRegName(id->idReg1(), attr), "offset");
1232212322
offs = emitGetInsDsp(id);
1232312323
emitDispClsVar(id->idAddr()->iiaFieldHnd, offs, ID_INFO_DSP_RELOC);
@@ -12372,7 +12372,7 @@ void emitter::emitDispIns(
1237212372
case IF_MWR:
1237312373
case IF_MRW:
1237412374
{
12375-
assert(!IsAvx512OrPriorInstruction(id->idIns()));
12375+
assert(!IsEvexEncodableInstruction(id->idIns()));
1237612376
printf("%s", sstr);
1237712377
offs = emitGetInsDsp(id);
1237812378
emitDispClsVar(id->idAddr()->iiaFieldHnd, offs, ID_INFO_DSP_RELOC);
@@ -12382,7 +12382,7 @@ void emitter::emitDispIns(
1238212382

1238312383
case IF_MRD_OFF:
1238412384
{
12385-
assert(!IsAvx512OrPriorInstruction(id->idIns()));
12385+
assert(!IsEvexEncodableInstruction(id->idIns()));
1238612386
printf("offset ");
1238712387
offs = emitGetInsDsp(id);
1238812388
emitDispClsVar(id->idAddr()->iiaFieldHnd, offs, ID_INFO_DSP_RELOC);
@@ -12417,7 +12417,7 @@ void emitter::emitDispIns(
1241712417
case IF_RWR_LABEL:
1241812418
case IF_SWR_LABEL:
1241912419
{
12420-
assert(!IsAvx512OrPriorInstruction(id->idIns()));
12420+
assert(!IsEvexEncodableInstruction(id->idIns()));
1242112421

1242212422
if (ins == INS_lea)
1242312423
{
@@ -12460,7 +12460,7 @@ void emitter::emitDispIns(
1246012460
case IF_METHOD:
1246112461
case IF_METHPTR:
1246212462
{
12463-
assert(!IsAvx512OrPriorInstruction(id->idIns()));
12463+
assert(!IsEvexEncodableInstruction(id->idIns()));
1246412464
methodName = emitComp->eeGetMethodFullName((CORINFO_METHOD_HANDLE)id->idDebugOnlyInfo()->idMemCookie);
1246512465

1246612466
if (id->idInsFmt() == IF_METHPTR)

‎src/coreclr/jit/hwintrinsicxarch.cpp‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -302,6 +302,7 @@ int HWIntrinsicInfo::lookupImmUpperBound(NamedIntrinsic id)
302302
case NI_AVX_Compare:
303303
case NI_AVX_CompareScalar:
304304
case NI_AVX512F_Compare:
305+
case NI_AVX512F_CompareMask:
305306
{
306307
assert(!HWIntrinsicInfo::HasFullRangeImm(id));
307308
return 31; // enum FloatComparisonMode has 32 values

‎src/coreclr/jit/lowerxarch.cpp‎

Lines changed: 17 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -3101,7 +3101,13 @@ GenTree* Lowering::LowerHWIntrinsicTernaryLogic(GenTreeHWIntrinsic* node)
31013101
}
31023102
}
31033103

3104-
if (!varTypeIsMask(condition))
3104+
if (condition->OperIsHWIntrinsic(NI_AVX512F_ConvertMaskToVector))
3105+
{
3106+
GenTree* tmp = condition->AsHWIntrinsic()->Op(1);
3107+
BlockRange().Remove(condition);
3108+
condition = tmp;
3109+
}
3110+
else if (!varTypeIsMask(condition))
31053111
{
31063112
if (!condition->OperIsHWIntrinsic())
31073113
{
@@ -3224,22 +3230,21 @@ GenTree* Lowering::LowerHWIntrinsicTernaryLogic(GenTreeHWIntrinsic* node)
32243230
default:
32253231
{
32263232
assert(!HWIntrinsicInfo::ReturnsPerElementMask(cndId));
3233+
cndId = NI_Illegal;
32273234
break;
32283235
}
32293236
}
32303237

3238+
if (cndId == NI_Illegal)
3239+
{
3240+
break;
3241+
}
3242+
32313243
cndNode->gtType = TYP_MASK;
32323244
cndNode->ChangeHWIntrinsicId(cndId);
32333245
}
32343246

3235-
if (condition->OperIsHWIntrinsic(NI_AVX512F_ConvertMaskToVector))
3236-
{
3237-
GenTree* tmp = condition->AsHWIntrinsic()->Op(1);
3238-
BlockRange().Remove(condition);
3239-
condition = tmp;
3240-
break;
3241-
}
3242-
3247+
assert(varTypeIsMask(condition));
32433248
node->ResetHWIntrinsicId(NI_AVX512F_BlendVariableMask, comp, selectFalse, selectTrue, condition);
32443249
BlockRange().Remove(op4);
32453250
break;
@@ -8511,6 +8516,7 @@ bool Lowering::IsContainableHWIntrinsicOp(GenTreeHWIntrinsic* parentNode, GenTre
85118516
case NI_AVX2_ShuffleLow:
85128517
case NI_AVX512F_AlignRight32:
85138518
case NI_AVX512F_AlignRight64:
8519+
case NI_AVX512F_CompareMask:
85148520
case NI_AVX512F_Fixup:
85158521
case NI_AVX512F_GetMantissa:
85168522
case NI_AVX512F_Permute2x64:
@@ -9073,12 +9079,12 @@ void Lowering::TryFoldCnsVecForEmbeddedBroadcast(GenTreeHWIntrinsic* parentNode,
90739079
CorInfoType simdBaseJitType = parentNode->GetSimdBaseJitType();
90749080
unsigned simdSize = parentNode->GetSimdSize();
90759081
bool isCreatedFromScalar = true;
9076-
int elementCount = GenTreeVecCon::ElementCount(genTypeSize(simdType), simdBaseType);
90779082

90789083
if (simdType == TYP_MASK)
90799084
{
90809085
simdType = Compiler::getSIMDTypeForSize(simdSize);
90819086
}
9087+
int elementCount = GenTreeVecCon::ElementCount(genTypeSize(simdType), simdBaseType);
90829088

90839089
switch (simdBaseType)
90849090
{
@@ -10449,6 +10455,7 @@ void Lowering::ContainCheckHWIntrinsic(GenTreeHWIntrinsic* node)
1044910455
case NI_AVX2_Permute2x128:
1045010456
case NI_AVX512F_AlignRight32:
1045110457
case NI_AVX512F_AlignRight64:
10458+
case NI_AVX512F_CompareMask:
1045210459
case NI_AVX512F_GetMantissaScalar:
1045310460
case NI_AVX512F_InsertVector128:
1045410461
case NI_AVX512F_InsertVector256:

‎src/coreclr/jit/lsrabuild.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3605,7 +3605,7 @@ int LinearScan::BuildDelayFreeUses(GenTree* node,
36053605
else if (node->OperIsHWIntrinsic())
36063606
{
36073607
assert(node->AsHWIntrinsic()->GetOperandCount() == 1);
3608-
use = BuildUse(node->AsHWIntrinsic()->Op(1), candidates);
3608+
return BuildDelayFreeUses(node->AsHWIntrinsic()->Op(1), rmwNode, candidates, useRefPositionRef);
36093609
}
36103610
#endif
36113611
else if (!node->OperIsIndir())

‎src/coreclr/jit/lsraxarch.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2543,7 +2543,7 @@ int LinearScan::BuildHWIntrinsic(GenTreeHWIntrinsic* intrinsicTree, int* pDstCou
25432543

25442544
for (GenTree* operand : op2->AsHWIntrinsic()->Operands())
25452545
{
2546-
assert(varTypeIsSIMD(operand));
2546+
assert(varTypeIsSIMD(operand) || varTypeIsInt(operand));
25472547
srcCount += BuildDelayFreeUses(operand, op1);
25482548
}
25492549
}
@@ -2556,7 +2556,7 @@ int LinearScan::BuildHWIntrinsic(GenTreeHWIntrinsic* intrinsicTree, int* pDstCou
25562556

25572557
for (GenTree* operand : op2->AsHWIntrinsic()->Operands())
25582558
{
2559-
assert(varTypeIsSIMD(operand));
2559+
assert(varTypeIsSIMD(operand) || varTypeIsInt(operand));
25602560
srcCount += BuildOperandUses(operand);
25612561
}
25622562
}

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