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Merge branch 'main' into darc-main-a78401f7-71cf-4b70-b4fd-407118bf3454
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eng/pipelines/common/evaluate-default-paths.yml

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,7 @@ parameters:
1212
src/libraries/sendtohelix-wasm.targets
1313
src/mono/nuget/Microsoft.NET.Runtime.WebAssembly.Sdk/*
1414
src/mono/nuget/Microsoft.NET.Runtime.wasm.Sample.Mono/*
15+
src/mono/sample/wasm/*
1516
src/mono/wasi/*
1617
src/mono/wasm/*
1718
src/tasks/WasmAppBuilder/*

eng/pipelines/libraries/helix-queues-setup.yml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -50,7 +50,7 @@ jobs:
5050
# Linux musl x64
5151
- ${{ if eq(parameters.platform, 'Linux_musl_x64') }}:
5252
- ${{ if or(ne(parameters.jobParameters.isExtraPlatforms, true), eq(parameters.jobParameters.includeAllPlatforms, true)) }}:
53-
- (Alpine.314.Amd64.Open)[email protected]/dotnet-buildtools/prereqs:alpine-3.14-helix-amd64-20220803180115-99b3286
53+
- (Alpine.314.Amd64.Open)[email protected]/dotnet-buildtools/prereqs:alpine-3.14-helix-amd64-20220912172439-e7e8d1c
5454
- ${{ if or(eq(parameters.jobParameters.isExtraPlatforms, true), eq(parameters.jobParameters.includeAllPlatforms, true)) }}:
5555
- (Alpine.313.Amd64.Open)[email protected]/dotnet-buildtools/prereqs:alpine-3.13-helix-amd64-20210910135845-8a6f4f3
5656

src/coreclr/gc/gc.cpp

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -21467,7 +21467,14 @@ void gc_heap::gc1()
2146721467
dynamic_data* dd = hp->dynamic_data_of (gen);
2146821468
dd_desired_allocation (dd) = desired_per_heap;
2146921469
dd_gc_new_allocation (dd) = desired_per_heap;
21470+
#ifdef USE_REGIONS
21471+
// we may have had some incoming objects during this GC -
21472+
// adjust the consumed budget for these
2147021473
dd_new_allocation (dd) = desired_per_heap - already_consumed_per_heap;
21474+
#else //USE_REGIONS
21475+
// for segments, we want to keep the .NET 6.0 behavior where we did not adjust
21476+
dd_new_allocation (dd) = desired_per_heap;
21477+
#endif //USE_REGIONS
2147121478

2147221479
if (gen == 0)
2147321480
{
@@ -40506,9 +40513,14 @@ void gc_heap::compute_new_dynamic_data (int gen_number)
4050640513
}
4050740514
dd_gc_new_allocation (dd) = dd_desired_allocation (dd);
4050840515

40516+
#ifdef USE_REGIONS
4050940517
// we may have had some incoming objects during this GC -
4051040518
// adjust the consumed budget for these
4051140519
dd_new_allocation (dd) = dd_gc_new_allocation (dd) - in;
40520+
#else //USE_REGIONS
40521+
// for segments, we want to keep the .NET 6.0 behavior where we did not adjust
40522+
dd_new_allocation (dd) = dd_gc_new_allocation (dd);
40523+
#endif //USE_REGIONS
4051240524
}
4051340525

4051440526
gen_data->pinned_surv = dd_pinned_survived_size (dd);

src/coreclr/inc/clr_std/vector

Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -215,6 +215,33 @@ namespace std
215215
}
216216
}
217217

218+
vector(const vector<T>&) = delete;
219+
vector<T>& operator=(const vector<T>&) = delete;
220+
221+
vector(vector<T>&& v) noexcept
222+
: m_size(v.m_size)
223+
, m_capacity(v.m_capacity)
224+
, m_pelements(v.m_pelements)
225+
, m_isBufferOwner(v.m_isBufferOwner)
226+
{
227+
v.m_isBufferOwner = false;
228+
}
229+
230+
vector<T>& operator=(vector<T>&& v) noexcept
231+
{
232+
if (m_isBufferOwner)
233+
{
234+
erase(m_pelements, 0, m_size);
235+
delete [] (BYTE*)m_pelements;
236+
}
237+
238+
m_size = v.m_size;
239+
m_capacity = v.m_capacity;
240+
m_pelements = v.m_pelements;
241+
m_isBufferOwner = v.m_isBufferOwner;
242+
v.m_isBufferOwner = false;
243+
return *this;
244+
}
218245

219246
size_t size() const
220247
{

src/coreclr/jit/codegen.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1397,7 +1397,6 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
13971397
#if defined(TARGET_ARM64)
13981398
void genCodeForJumpCompare(GenTreeOp* tree);
13991399
void genCodeForBfiz(GenTreeOp* tree);
1400-
void genCodeForAddEx(GenTreeOp* tree);
14011400
void genCodeForCond(GenTreeOp* tree);
14021401
#endif // TARGET_ARM64
14031402

src/coreclr/jit/codegenarm64.cpp

Lines changed: 56 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -2639,6 +2639,62 @@ void CodeGen::genCodeForBinary(GenTreeOp* tree)
26392639
genProduceReg(tree);
26402640
return;
26412641
}
2642+
else if (op2->OperIs(GT_CAST) && op2->isContained())
2643+
{
2644+
assert(varTypeIsIntegral(tree));
2645+
2646+
GenTree* a = op1;
2647+
GenTree* b = op2->AsCast()->CastOp();
2648+
2649+
instruction ins = genGetInsForOper(tree->OperGet(), targetType);
2650+
insOpts opt = INS_OPTS_NONE;
2651+
2652+
if ((tree->gtFlags & GTF_SET_FLAGS) != 0)
2653+
{
2654+
// A subset of operations can still set flags
2655+
2656+
switch (oper)
2657+
{
2658+
case GT_ADD:
2659+
{
2660+
ins = INS_adds;
2661+
break;
2662+
}
2663+
2664+
case GT_SUB:
2665+
{
2666+
ins = INS_subs;
2667+
break;
2668+
}
2669+
2670+
default:
2671+
{
2672+
noway_assert(!"Unexpected BinaryOp with GTF_SET_FLAGS set");
2673+
}
2674+
}
2675+
}
2676+
2677+
bool isZeroExtending = op2->AsCast()->IsZeroExtending();
2678+
2679+
if (varTypeIsByte(op2->CastToType()))
2680+
{
2681+
opt = isZeroExtending ? INS_OPTS_UXTB : INS_OPTS_SXTB;
2682+
}
2683+
else if (varTypeIsShort(op2->CastToType()))
2684+
{
2685+
opt = isZeroExtending ? INS_OPTS_UXTH : INS_OPTS_SXTH;
2686+
}
2687+
else
2688+
{
2689+
assert(op2->TypeIs(TYP_LONG) && genActualTypeIsInt(b));
2690+
opt = isZeroExtending ? INS_OPTS_UXTW : INS_OPTS_SXTW;
2691+
}
2692+
2693+
emit->emitIns_R_R_R(ins, emitActualTypeSize(tree), targetReg, a->GetRegNum(), b->GetRegNum(), opt);
2694+
2695+
genProduceReg(tree);
2696+
return;
2697+
}
26422698

26432699
if (tree->OperIs(GT_AND) && op2->isContainedAndNotIntOrIImmed())
26442700
{
@@ -10564,54 +10620,6 @@ void CodeGen::genCodeForBfiz(GenTreeOp* tree)
1056410620
genProduceReg(tree);
1056510621
}
1056610622

10567-
//------------------------------------------------------------------------
10568-
// genCodeForAddEx: Generates the code sequence for a GenTree node that
10569-
// represents an addition with sign or zero extended
10570-
//
10571-
// Arguments:
10572-
// tree - the add with extend node.
10573-
//
10574-
void CodeGen::genCodeForAddEx(GenTreeOp* tree)
10575-
{
10576-
assert(tree->OperIs(GT_ADDEX));
10577-
genConsumeOperands(tree);
10578-
10579-
GenTree* op;
10580-
GenTree* containedOp;
10581-
if (tree->gtGetOp1()->isContained())
10582-
{
10583-
containedOp = tree->gtGetOp1();
10584-
op = tree->gtGetOp2();
10585-
}
10586-
else
10587-
{
10588-
containedOp = tree->gtGetOp2();
10589-
op = tree->gtGetOp1();
10590-
}
10591-
assert(containedOp->isContained() && !op->isContained());
10592-
10593-
regNumber dstReg = tree->GetRegNum();
10594-
regNumber op1Reg = op->GetRegNum();
10595-
regNumber op2Reg = containedOp->gtGetOp1()->GetRegNum();
10596-
10597-
if (containedOp->OperIs(GT_CAST))
10598-
{
10599-
GenTreeCast* cast = containedOp->AsCast();
10600-
assert(varTypeIsLong(cast->CastToType()));
10601-
insOpts opts = cast->IsUnsigned() ? INS_OPTS_UXTW : INS_OPTS_SXTW;
10602-
GetEmitter()->emitIns_R_R_R(tree->gtSetFlags() ? INS_adds : INS_add, emitActualTypeSize(tree), dstReg, op1Reg,
10603-
op2Reg, opts);
10604-
}
10605-
else
10606-
{
10607-
assert(containedOp->OperIs(GT_LSH));
10608-
ssize_t cns = containedOp->gtGetOp2()->AsIntCon()->IconValue();
10609-
GetEmitter()->emitIns_R_R_R_I(tree->gtSetFlags() ? INS_adds : INS_add, emitActualTypeSize(tree), dstReg, op1Reg,
10610-
op2Reg, cns, INS_OPTS_LSL);
10611-
}
10612-
genProduceReg(tree);
10613-
}
10614-
1061510623
//------------------------------------------------------------------------
1061610624
// genCodeForCond: Generates the code sequence for a GenTree node that
1061710625
// represents a conditional instruction.

src/coreclr/jit/codegenarmarch.cpp

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -315,10 +315,6 @@ void CodeGen::genCodeForTreeNode(GenTree* treeNode)
315315
genCodeForSwap(treeNode->AsOp());
316316
break;
317317

318-
case GT_ADDEX:
319-
genCodeForAddEx(treeNode->AsOp());
320-
break;
321-
322318
case GT_BFIZ:
323319
genCodeForBfiz(treeNode->AsOp());
324320
break;

src/coreclr/jit/codegencommon.cpp

Lines changed: 0 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -1030,14 +1030,7 @@ bool CodeGen::genCreateAddrMode(
10301030

10311031
if (!addr->OperIs(GT_ADD))
10321032
{
1033-
#if TARGET_ARM64
1034-
if (!addr->OperIs(GT_ADDEX))
1035-
{
1036-
return false;
1037-
}
1038-
#else
10391033
return false;
1040-
#endif
10411034
}
10421035

10431036
GenTree* rv1 = nullptr;
@@ -1064,23 +1057,6 @@ bool CodeGen::genCreateAddrMode(
10641057
op2 = addr->AsOp()->gtOp2;
10651058
}
10661059

1067-
#if TARGET_ARM64
1068-
if (addr->OperIs(GT_ADDEX))
1069-
{
1070-
if (op2->isContained() && op2->OperIs(GT_CAST))
1071-
{
1072-
*rv1Ptr = op1;
1073-
*rv2Ptr = op2;
1074-
*mulPtr = 1;
1075-
*cnsPtr = 0;
1076-
*revPtr = false; // op2 is never a gc type
1077-
assert(!varTypeIsGC(op2));
1078-
return true;
1079-
}
1080-
return false;
1081-
}
1082-
#endif
1083-
10841060
// Can't use indirect addressing mode as we need to check for overflow.
10851061
// Also, can't use 'lea' as it doesn't set the flags.
10861062

src/coreclr/jit/codegenxarch.cpp

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5328,6 +5328,17 @@ void CodeGen::genCodeForStoreInd(GenTreeStoreInd* tree)
53285328
// The encoding that supports containment is SSE4.1 only
53295329
ins = INS_pextrw_sse41;
53305330
}
5331+
5332+
// The hardware intrinsics take unsigned bytes between [0, 255].
5333+
// However, the emitter expects "fits in byte" to always be signed
5334+
// and therefore we need [128, 255] to be sign extended up to fill
5335+
// the entire constant value.
5336+
5337+
GenTreeIntCon* op2 = hwintrinsic->Op(2)->AsIntCon();
5338+
ssize_t ival = op2->IconValue();
5339+
5340+
assert((ival >= 0) && (ival <= 255));
5341+
op2->gtIconVal = static_cast<int8_t>(ival);
53315342
break;
53325343
}
53335344

src/coreclr/jit/compiler.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6966,7 +6966,8 @@ class Compiler
69666966
PhaseStatus optRedundantBranches();
69676967
bool optRedundantRelop(BasicBlock* const block);
69686968
bool optRedundantBranch(BasicBlock* const block);
6969-
bool optJumpThread(BasicBlock* const block, BasicBlock* const domBlock, bool domIsSameRelop);
6969+
bool optJumpThreadDom(BasicBlock* const block, BasicBlock* const domBlock, bool domIsSameRelop);
6970+
bool optJumpThreadPhi(BasicBlock* const block, GenTree* tree, ValueNum treeNormVN);
69706971
bool optJumpThreadCheck(BasicBlock* const block, BasicBlock* const domBlock);
69716972
bool optJumpThreadCore(JumpThreadInfo& jti);
69726973
bool optReachable(BasicBlock* const fromBlock, BasicBlock* const toBlock, BasicBlock* const excludedBlock);

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