From b1cd3d313455e4ebf6209aeefeeae9b2e3316564 Mon Sep 17 00:00:00 2001 From: willc Date: Sat, 29 Feb 2020 16:37:13 +0800 Subject: [PATCH 1/8] Tentative fix to build on esp-idf-4.0 --- CMakeLists.txt | 84 +++++++++++++++++++++---------------------- cores/esp32/Arduino.h | 2 +- 2 files changed, 41 insertions(+), 45 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index cf8981f9aad..ea4b104b070 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -38,43 +38,43 @@ set(CORE_SRCS ) set(LIBRARY_SRCS - libraries/ArduinoOTA/src/ArduinoOTA.cpp - libraries/AsyncUDP/src/AsyncUDP.cpp - libraries/BluetoothSerial/src/BluetoothSerial.cpp - libraries/DNSServer/src/DNSServer.cpp - libraries/EEPROM/src/EEPROM.cpp - libraries/ESPmDNS/src/ESPmDNS.cpp - libraries/FFat/src/FFat.cpp - libraries/FS/src/FS.cpp - libraries/FS/src/vfs_api.cpp - libraries/HTTPClient/src/HTTPClient.cpp - libraries/HTTPUpdate/src/HTTPUpdate.cpp - libraries/NetBIOS/src/NetBIOS.cpp - libraries/Preferences/src/Preferences.cpp - libraries/SD_MMC/src/SD_MMC.cpp - libraries/SD/src/SD.cpp - libraries/SD/src/sd_diskio.cpp - libraries/SD/src/sd_diskio_crc.c - libraries/SimpleBLE/src/SimpleBLE.cpp - libraries/SPIFFS/src/SPIFFS.cpp +# libraries/ArduinoOTA/src/ArduinoOTA.cpp +# libraries/AsyncUDP/src/AsyncUDP.cpp +# libraries/BluetoothSerial/src/BluetoothSerial.cpp +# libraries/DNSServer/src/DNSServer.cpp +# libraries/EEPROM/src/EEPROM.cpp +# libraries/ESPmDNS/src/ESPmDNS.cpp +# libraries/FFat/src/FFat.cpp +# libraries/FS/src/FS.cpp +# libraries/FS/src/vfs_api.cpp +# libraries/HTTPClient/src/HTTPClient.cpp +# libraries/HTTPUpdate/src/HTTPUpdate.cpp +# libraries/NetBIOS/src/NetBIOS.cpp +# libraries/Preferences/src/Preferences.cpp +# libraries/SD_MMC/src/SD_MMC.cpp +# libraries/SD/src/SD.cpp +# libraries/SD/src/sd_diskio.cpp +# libraries/SD/src/sd_diskio_crc.c +# libraries/SimpleBLE/src/SimpleBLE.cpp +# libraries/SPIFFS/src/SPIFFS.cpp libraries/SPI/src/SPI.cpp - libraries/Ticker/src/Ticker.cpp - libraries/Update/src/Updater.cpp - libraries/WebServer/src/WebServer.cpp - libraries/WebServer/src/Parsing.cpp - libraries/WebServer/src/detail/mimetable.cpp - libraries/WiFiClientSecure/src/ssl_client.cpp - libraries/WiFiClientSecure/src/WiFiClientSecure.cpp - libraries/WiFi/src/ETH.cpp - libraries/WiFi/src/WiFiAP.cpp - libraries/WiFi/src/WiFiClient.cpp - libraries/WiFi/src/WiFi.cpp - libraries/WiFi/src/WiFiGeneric.cpp - libraries/WiFi/src/WiFiMulti.cpp - libraries/WiFi/src/WiFiScan.cpp - libraries/WiFi/src/WiFiServer.cpp - libraries/WiFi/src/WiFiSTA.cpp - libraries/WiFi/src/WiFiUdp.cpp +# libraries/Ticker/src/Ticker.cpp +# libraries/Update/src/Updater.cpp +# libraries/WebServer/src/WebServer.cpp +# libraries/WebServer/src/Parsing.cpp +# libraries/WebServer/src/detail/mimetable.cpp +# libraries/WiFiClientSecure/src/ssl_client.cpp +# libraries/WiFiClientSecure/src/WiFiClientSecure.cpp +# libraries/WiFi/src/ETH.cpp +# libraries/WiFi/src/WiFiAP.cpp +# libraries/WiFi/src/WiFiClient.cpp +# libraries/WiFi/src/WiFi.cpp +# libraries/WiFi/src/WiFiGeneric.cpp +# libraries/WiFi/src/WiFiMulti.cpp +# libraries/WiFi/src/WiFiScan.cpp +# libraries/WiFi/src/WiFiServer.cpp +# libraries/WiFi/src/WiFiSTA.cpp +# libraries/WiFi/src/WiFiUdp.cpp libraries/Wire/src/Wire.cpp ) @@ -170,7 +170,8 @@ set(BLE_SRCS libraries/BLE/src/GeneralUtils.cpp ) -set(COMPONENT_SRCS ${CORE_SRCS} ${LIBRARY_SRCS} ${AZURE_SRCS} ${BLE_SRCS}) +#set(COMPONENT_SRCS ${CORE_SRCS} ${LIBRARY_SRCS} ${AZURE_SRCS} ${BLE_SRCS}) +set(COMPONENT_SRCS ${CORE_SRCS} ${LIBRARY_SRCS}) set(COMPONENT_ADD_INCLUDEDIRS variants/esp32/ @@ -198,19 +199,14 @@ set(COMPONENT_ADD_INCLUDEDIRS libraries/Ticker/src libraries/Update/src libraries/WebServer/src - libraries/WiFiClientSecure/src + #libraries/WiFiClientSecure/src libraries/WiFi/src libraries/Wire/src ) set(COMPONENT_PRIV_INCLUDEDIRS cores/esp32/libb64) -set(COMPONENT_REQUIRES spi_flash mbedtls mdns ethernet esp_adc_cal) +set(COMPONENT_REQUIRES spi_flash mbedtls mdns esp_eth) set(COMPONENT_PRIV_REQUIRES fatfs nvs_flash app_update spiffs bootloader_support openssl bt) register_component() - -set_source_files_properties(libraries/AzureIoT/src/az_iot/iothub_client/src/iothubtransport_mqtt_common.c - PROPERTIES COMPILE_FLAGS - -Wno-maybe-uninitialized -) diff --git a/cores/esp32/Arduino.h b/cores/esp32/Arduino.h index 645b407034f..26805f71bc0 100644 --- a/cores/esp32/Arduino.h +++ b/cores/esp32/Arduino.h @@ -118,7 +118,7 @@ typedef unsigned int word; void setup(void); void loop(void); -long random(long, long); +//long random(long, long); void randomSeed(unsigned long); long map(long, long, long, long, long); From 059a6911e27ecb0aa5b545c6f9d2d4d7e3d41786 Mon Sep 17 00:00:00 2001 From: willc Date: Sat, 29 Feb 2020 16:45:44 +0800 Subject: [PATCH 2/8] Fixed compilation erros --- CMakeLists.txt | 2 +- cores/esp32/esp32-hal-spi.c | 12 ++++++------ 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index ea4b104b070..96a578a9f9f 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -206,7 +206,7 @@ set(COMPONENT_ADD_INCLUDEDIRS set(COMPONENT_PRIV_INCLUDEDIRS cores/esp32/libb64) -set(COMPONENT_REQUIRES spi_flash mbedtls mdns esp_eth) +set(COMPONENT_REQUIRES spi_flash mbedtls mdns esp_eth esp_adc_cal) set(COMPONENT_PRIV_REQUIRES fatfs nvs_flash app_update spiffs bootloader_support openssl bt) register_component() diff --git a/cores/esp32/esp32-hal-spi.c b/cores/esp32/esp32-hal-spi.c index b3b703ccc2a..ea8bbaaddd7 100644 --- a/cores/esp32/esp32-hal-spi.c +++ b/cores/esp32/esp32-hal-spi.c @@ -428,14 +428,14 @@ spi_t * spiStartBus(uint8_t spi_num, uint32_t clockDiv, uint8_t dataMode, uint8_ #endif if(spi_num == HSPI) { - DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI_CLK_EN); - DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI_RST); + DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI01_CLK_EN); + DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI01_RST); } else if(spi_num == VSPI) { - DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI_CLK_EN_2); - DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI_RST_2); + DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI2_CLK_EN); + DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI2_RST); } else { - DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI_CLK_EN_1); - DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI_RST_1); + DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI3_CLK_EN); + DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI3_RST); } SPI_MUTEX_LOCK(); From 308009ddcd7b45d42fda58b41c01eb37fba52ca8 Mon Sep 17 00:00:00 2001 From: willc Date: Wed, 8 Apr 2020 10:28:11 +0800 Subject: [PATCH 3/8] Fixes for ESP-IDF 4.1 config. --- cores/esp32/MD5Builder.h | 6 ++++++ cores/esp32/esp32-hal-gpio.c | 12 ++++++++++-- cores/esp32/esp32-hal-timer.c | 9 +++++++-- cores/esp32/esp32-hal-uart.c | 15 +++++++++++---- 4 files changed, 34 insertions(+), 8 deletions(-) diff --git a/cores/esp32/MD5Builder.h b/cores/esp32/MD5Builder.h index 5429d9aea60..ad66116772a 100644 --- a/cores/esp32/MD5Builder.h +++ b/cores/esp32/MD5Builder.h @@ -21,7 +21,13 @@ #include #include + +#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 1, 0) +#include "esp32/rom/md5_hash.h" +#else #include "rom/md5_hash.h" +#endif + class MD5Builder { diff --git a/cores/esp32/esp32-hal-gpio.c b/cores/esp32/esp32-hal-gpio.c index 4da7272c597..6dea61c99a4 100644 --- a/cores/esp32/esp32-hal-gpio.c +++ b/cores/esp32/esp32-hal-gpio.c @@ -15,10 +15,18 @@ #include "esp32-hal-gpio.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h" -#include "rom/ets_sys.h" #include "esp_attr.h" -#include "esp_intr.h" + +#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 1, 0) +#include "esp32/rom/gpio.h" +#include "esp32/rom/ets_sys.h" +#include "esp_intr_alloc.h" +#else #include "rom/gpio.h" +#include "rom/ets_sys.h" +#include "esp_intr.h" +#endif + #include "soc/gpio_reg.h" #include "soc/io_mux_reg.h" #include "soc/gpio_struct.h" diff --git a/cores/esp32/esp32-hal-timer.c b/cores/esp32/esp32-hal-timer.c index ed804d4e348..0a04e216604 100644 --- a/cores/esp32/esp32-hal-timer.c +++ b/cores/esp32/esp32-hal-timer.c @@ -16,11 +16,16 @@ #include "freertos/FreeRTOS.h" #include "freertos/xtensa_api.h" #include "freertos/task.h" -#include "rom/ets_sys.h" #include "soc/timer_group_struct.h" #include "soc/dport_reg.h" -#include "esp_attr.h" + +#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 1, 0) +#include "esp32/rom/ets_sys.h" +#include "esp_intr_alloc.h" +#else +#include "rom/ets_sys.h" #include "esp_intr.h" +#endif #define HWTIMER_LOCK() portENTER_CRITICAL(timer->lock) #define HWTIMER_UNLOCK() portEXIT_CRITICAL(timer->lock) diff --git a/cores/esp32/esp32-hal-uart.c b/cores/esp32/esp32-hal-uart.c index 8ec1fe6f7d1..d55d360bb11 100644 --- a/cores/esp32/esp32-hal-uart.c +++ b/cores/esp32/esp32-hal-uart.c @@ -18,17 +18,24 @@ #include "freertos/task.h" #include "freertos/queue.h" #include "freertos/semphr.h" -#include "rom/ets_sys.h" #include "esp_attr.h" -#include "esp_intr.h" -#include "rom/uart.h" #include "soc/uart_reg.h" #include "soc/uart_struct.h" #include "soc/io_mux_reg.h" #include "soc/gpio_sig_map.h" #include "soc/dport_reg.h" #include "soc/rtc.h" + +#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 1, 0) +#include "esp32/rom/uart.h" +#include "esp32/rom/ets_sys.h" #include "esp_intr_alloc.h" +#else +#include "rom/uart.h" +#include "esp_intr.h" +#include "rom/ets_sys.h" +#endif + #define UART_REG_BASE(u) ((u==0)?DR_REG_UART_BASE:( (u==1)?DR_REG_UART1_BASE:( (u==2)?DR_REG_UART2_BASE:0))) #define UART_RXD_IDX(u) ((u==0)?U0RXD_IN_IDX:( (u==1)?U1RXD_IN_IDX:( (u==2)?U2RXD_IN_IDX:0))) @@ -257,7 +264,7 @@ size_t uartResizeRxBuffer(uart_t * uart, size_t new_size) { vQueueDelete(uart->queue); uart->queue = xQueueCreate(new_size, sizeof(uint8_t)); if(uart->queue == NULL) { - return NULL; + return 0; } } UART_MUTEX_UNLOCK(); From 9255ed9a31d374361b18e0b0e9bc48811704cfcd Mon Sep 17 00:00:00 2001 From: Will Castelnau Date: Fri, 14 Aug 2020 12:16:40 +0800 Subject: [PATCH 4/8] Fixed broken SPI port --- cores/esp32/esp32-hal-spi.c | 108 +++++++++++++++++++----------------- 1 file changed, 56 insertions(+), 52 deletions(-) diff --git a/cores/esp32/esp32-hal-spi.c b/cores/esp32/esp32-hal-spi.c index ea8bbaaddd7..abc58c32427 100644 --- a/cores/esp32/esp32-hal-spi.c +++ b/cores/esp32/esp32-hal-spi.c @@ -17,10 +17,7 @@ #include "freertos/FreeRTOS.h" #include "freertos/task.h" #include "freertos/semphr.h" -#include "rom/ets_sys.h" #include "esp_attr.h" -#include "esp_intr.h" -#include "rom/gpio.h" #include "soc/spi_reg.h" #include "soc/spi_struct.h" #include "soc/io_mux_reg.h" @@ -28,6 +25,21 @@ #include "soc/dport_reg.h" #include "soc/rtc.h" +#include "esp_system.h" +#ifdef ESP_IDF_VERSION_MAJOR // IDF 4+ +#if CONFIG_IDF_TARGET_ESP32 // ESP32/PICO-D4 +#include "esp32/rom/ets_sys.h" +#include "esp32/rom/gpio.h" +#include "esp_intr_alloc.h" +#else +#error Target CONFIG_IDF_TARGET is not supported +#endif +#else // ESP32 Before IDF 4.0 +#include "rom/ets_sys.h" +#include "rom/gpio.h" +#include "esp_intr.h" +#endif + #define SPI_CLK_IDX(p) ((p==0)?SPICLK_OUT_IDX:((p==1)?SPICLK_OUT_IDX:((p==2)?HSPICLK_OUT_IDX:((p==3)?VSPICLK_OUT_IDX:0)))) #define SPI_MISO_IDX(p) ((p==0)?SPIQ_OUT_IDX:((p==1)?SPIQ_OUT_IDX:((p==2)?HSPIQ_OUT_IDX:((p==3)?VSPIQ_OUT_IDX:0)))) #define SPI_MOSI_IDX(p) ((p==0)?SPID_IN_IDX:((p==1)?SPID_IN_IDX:((p==2)?HSPID_IN_IDX:((p==3)?VSPID_IN_IDX:0)))) @@ -63,10 +75,10 @@ static spi_t _spi_bus_array[4] = { #define SPI_MUTEX_UNLOCK() xSemaphoreGive(spi->lock) static spi_t _spi_bus_array[4] = { - {(volatile spi_dev_t *)(DR_REG_SPI0_BASE), NULL, 0}, - {(volatile spi_dev_t *)(DR_REG_SPI1_BASE), NULL, 1}, - {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 2}, - {(volatile spi_dev_t *)(DR_REG_SPI3_BASE), NULL, 3} + {(volatile spi_dev_t *)(DR_REG_SPI0_BASE), NULL, 0}, + {(volatile spi_dev_t *)(DR_REG_SPI1_BASE), NULL, 1}, + {(volatile spi_dev_t *)(DR_REG_SPI2_BASE), NULL, 2}, + {(volatile spi_dev_t *)(DR_REG_SPI3_BASE), NULL, 3} }; #endif @@ -327,23 +339,23 @@ void spiSetDataMode(spi_t * spi, uint8_t dataMode) } SPI_MUTEX_LOCK(); switch (dataMode) { - case SPI_MODE1: - spi->dev->pin.ck_idle_edge = 0; - spi->dev->user.ck_out_edge = 1; - break; - case SPI_MODE2: - spi->dev->pin.ck_idle_edge = 1; - spi->dev->user.ck_out_edge = 1; - break; - case SPI_MODE3: - spi->dev->pin.ck_idle_edge = 1; - spi->dev->user.ck_out_edge = 0; - break; - case SPI_MODE0: - default: - spi->dev->pin.ck_idle_edge = 0; - spi->dev->user.ck_out_edge = 0; - break; + case SPI_MODE1: + spi->dev->pin.ck_idle_edge = 0; + spi->dev->user.ck_out_edge = 1; + break; + case SPI_MODE2: + spi->dev->pin.ck_idle_edge = 1; + spi->dev->user.ck_out_edge = 1; + break; + case SPI_MODE3: + spi->dev->pin.ck_idle_edge = 1; + spi->dev->user.ck_out_edge = 0; + break; + case SPI_MODE0: + default: + spi->dev->pin.ck_idle_edge = 0; + spi->dev->user.ck_out_edge = 0; + break; } SPI_MUTEX_UNLOCK(); } @@ -384,8 +396,12 @@ static void _on_apb_change(void * arg, apb_change_ev_t ev_type, uint32_t old_apb } } -static void spiInitBus(spi_t * spi) +void spiStopBus(spi_t * spi) { + if(!spi) { + return; + } + SPI_MUTEX_LOCK(); spi->dev->slave.trans_done = 0; spi->dev->slave.slave_mode = 0; spi->dev->pin.val = 0; @@ -395,19 +411,8 @@ static void spiInitBus(spi_t * spi) spi->dev->ctrl1.val = 0; spi->dev->ctrl2.val = 0; spi->dev->clock.val = 0; -} - -void spiStopBus(spi_t * spi) -{ - if(!spi) { - return; - } - - removeApbChangeCallback(spi, _on_apb_change); - - SPI_MUTEX_LOCK(); - spiInitBus(spi); SPI_MUTEX_UNLOCK(); + removeApbChangeCallback(spi, _on_apb_change); } spi_t * spiStartBus(uint8_t spi_num, uint32_t clockDiv, uint8_t dataMode, uint8_t bitOrder) @@ -428,18 +433,22 @@ spi_t * spiStartBus(uint8_t spi_num, uint32_t clockDiv, uint8_t dataMode, uint8_ #endif if(spi_num == HSPI) { - DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI01_CLK_EN); - DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI01_RST); - } else if(spi_num == VSPI) { DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI2_CLK_EN); DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI2_RST); - } else { + } else if(spi_num == VSPI) { DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI3_CLK_EN); DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI3_RST); + } else { + DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI01_CLK_EN); + DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_SPI01_RST); } + spiStopBus(spi); + spiSetDataMode(spi, dataMode); + spiSetBitOrder(spi, bitOrder); + spiSetClockDiv(spi, clockDiv); + SPI_MUTEX_LOCK(); - spiInitBus(spi); spi->dev->user.usr_mosi = 1; spi->dev->user.usr_miso = 1; spi->dev->user.doutdin = 1; @@ -450,10 +459,6 @@ spi_t * spiStartBus(uint8_t spi_num, uint32_t clockDiv, uint8_t dataMode, uint8_ } SPI_MUTEX_UNLOCK(); - spiSetDataMode(spi, dataMode); - spiSetBitOrder(spi, bitOrder); - spiSetClockDiv(spi, clockDiv); - addApbChangeCallback(spi, _on_apb_change); return spi; } @@ -1021,11 +1026,11 @@ void IRAM_ATTR spiWritePixelsNL(spi_t * spi, const void * data_in, uint32_t len) typedef union { uint32_t value; struct { - uint32_t clkcnt_l: 6; /*it must be equal to spi_clkcnt_N.*/ - uint32_t clkcnt_h: 6; /*it must be floor((spi_clkcnt_N+1)/2-1).*/ - uint32_t clkcnt_n: 6; /*it is the divider of spi_clk. So spi_clk frequency is system/(spi_clkdiv_pre+1)/(spi_clkcnt_N+1)*/ - uint32_t clkdiv_pre: 13; /*it is pre-divider of spi_clk.*/ - uint32_t clk_equ_sysclk: 1; /*1: spi_clk is eqaul to system 0: spi_clk is divided from system clock.*/ + uint32_t clkcnt_l: 6; /*it must be equal to spi_clkcnt_N.*/ + uint32_t clkcnt_h: 6; /*it must be floor((spi_clkcnt_N+1)/2-1).*/ + uint32_t clkcnt_n: 6; /*it is the divider of spi_clk. So spi_clk frequency is system/(spi_clkdiv_pre+1)/(spi_clkcnt_N+1)*/ + uint32_t clkdiv_pre: 13; /*it is pre-divider of spi_clk.*/ + uint32_t clk_equ_sysclk: 1; /*1: spi_clk is eqaul to system 0: spi_clk is divided from system clock.*/ }; } spiClk_t; @@ -1092,4 +1097,3 @@ uint32_t spiFrequencyToClockDiv(uint32_t freq) } return bestReg.value; } - From d01461345e1b04d45fd534483d35820261599f82 Mon Sep 17 00:00:00 2001 From: Will Castelnau Date: Fri, 14 Aug 2020 13:56:48 +0800 Subject: [PATCH 5/8] Potential fix for failing build, can't see idf version? --- cores/esp32/esp32-hal-gpio.c | 1 + 1 file changed, 1 insertion(+) diff --git a/cores/esp32/esp32-hal-gpio.c b/cores/esp32/esp32-hal-gpio.c index 6dea61c99a4..328138c1876 100644 --- a/cores/esp32/esp32-hal-gpio.c +++ b/cores/esp32/esp32-hal-gpio.c @@ -16,6 +16,7 @@ #include "freertos/FreeRTOS.h" #include "freertos/task.h" #include "esp_attr.h" +#include "esp_idf_version.h" #if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 1, 0) #include "esp32/rom/gpio.h" From 14343574a56e89124c7470a190e13a6c42a83b9b Mon Sep 17 00:00:00 2001 From: Will Castelnau Date: Fri, 14 Aug 2020 14:19:15 +0800 Subject: [PATCH 6/8] Potential fix for failing build, can't see idf version? --- cores/esp32/esp32-hal-gpio.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/cores/esp32/esp32-hal-gpio.c b/cores/esp32/esp32-hal-gpio.c index 328138c1876..95e77c18b7d 100644 --- a/cores/esp32/esp32-hal-gpio.c +++ b/cores/esp32/esp32-hal-gpio.c @@ -18,15 +18,15 @@ #include "esp_attr.h" #include "esp_idf_version.h" -#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 1, 0) +//#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 1, 0) #include "esp32/rom/gpio.h" #include "esp32/rom/ets_sys.h" #include "esp_intr_alloc.h" -#else -#include "rom/gpio.h" -#include "rom/ets_sys.h" -#include "esp_intr.h" -#endif +//#else +//#include "rom/gpio.h" +//#include "rom/ets_sys.h" +//#include "esp_intr.h" +//#endif #include "soc/gpio_reg.h" #include "soc/io_mux_reg.h" From 1fb0ba9691515f07a8b5cbd309b04b445b26c6f8 Mon Sep 17 00:00:00 2001 From: Will Castelnau Date: Fri, 14 Aug 2020 14:30:01 +0800 Subject: [PATCH 7/8] Revert back to checking for esp-idf version. --- cores/esp32/esp32-hal-gpio.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/cores/esp32/esp32-hal-gpio.c b/cores/esp32/esp32-hal-gpio.c index 95e77c18b7d..328138c1876 100644 --- a/cores/esp32/esp32-hal-gpio.c +++ b/cores/esp32/esp32-hal-gpio.c @@ -18,15 +18,15 @@ #include "esp_attr.h" #include "esp_idf_version.h" -//#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 1, 0) +#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 1, 0) #include "esp32/rom/gpio.h" #include "esp32/rom/ets_sys.h" #include "esp_intr_alloc.h" -//#else -//#include "rom/gpio.h" -//#include "rom/ets_sys.h" -//#include "esp_intr.h" -//#endif +#else +#include "rom/gpio.h" +#include "rom/ets_sys.h" +#include "esp_intr.h" +#endif #include "soc/gpio_reg.h" #include "soc/io_mux_reg.h" From a75a507b919ee9d9d104abdeba6a9dde911517cf Mon Sep 17 00:00:00 2001 From: Will Castelnau Date: Thu, 27 Aug 2020 11:28:44 +0800 Subject: [PATCH 8/8] Revert back to esp-idf 3.x compat. --- CMakeLists.txt | 6 +++++- cores/esp32/MD5Builder.h | 8 ++++---- cores/esp32/esp32-hal-gpio.c | 14 +++++++------- cores/esp32/esp32-hal-timer.c | 12 ++++++------ cores/esp32/esp32-hal-uart.c | 12 ++++++------ 5 files changed, 28 insertions(+), 24 deletions(-) diff --git a/CMakeLists.txt b/CMakeLists.txt index 96a578a9f9f..bee2ee00496 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -206,7 +206,11 @@ set(COMPONENT_ADD_INCLUDEDIRS set(COMPONENT_PRIV_INCLUDEDIRS cores/esp32/libb64) -set(COMPONENT_REQUIRES spi_flash mbedtls mdns esp_eth esp_adc_cal) +set(COMPONENT_REQUIRES spi_flash mbedtls mdns ethernet esp_adc_cal) + +# For esp 4.x +#set(COMPONENT_REQUIRES spi_flash mbedtls mdns esp_eth esp_adc_cal) + set(COMPONENT_PRIV_REQUIRES fatfs nvs_flash app_update spiffs bootloader_support openssl bt) register_component() diff --git a/cores/esp32/MD5Builder.h b/cores/esp32/MD5Builder.h index ad66116772a..9a58a59e3c5 100644 --- a/cores/esp32/MD5Builder.h +++ b/cores/esp32/MD5Builder.h @@ -22,11 +22,11 @@ #include #include -#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 1, 0) -#include "esp32/rom/md5_hash.h" -#else +//#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 1, 0) +//#include "esp32/rom/md5_hash.h" +//#else #include "rom/md5_hash.h" -#endif +//#endif class MD5Builder diff --git a/cores/esp32/esp32-hal-gpio.c b/cores/esp32/esp32-hal-gpio.c index 328138c1876..252a6bc146b 100644 --- a/cores/esp32/esp32-hal-gpio.c +++ b/cores/esp32/esp32-hal-gpio.c @@ -16,17 +16,17 @@ #include "freertos/FreeRTOS.h" #include "freertos/task.h" #include "esp_attr.h" -#include "esp_idf_version.h" +//#include "esp_idf_version.h" -#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 1, 0) -#include "esp32/rom/gpio.h" -#include "esp32/rom/ets_sys.h" -#include "esp_intr_alloc.h" -#else +//#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 1, 0) +//#include "esp32/rom/gpio.h" +//#include "esp32/rom/ets_sys.h" +//#include "esp_intr_alloc.h" +//#else #include "rom/gpio.h" #include "rom/ets_sys.h" #include "esp_intr.h" -#endif +//#endif #include "soc/gpio_reg.h" #include "soc/io_mux_reg.h" diff --git a/cores/esp32/esp32-hal-timer.c b/cores/esp32/esp32-hal-timer.c index 0a04e216604..514310cb4bb 100644 --- a/cores/esp32/esp32-hal-timer.c +++ b/cores/esp32/esp32-hal-timer.c @@ -19,13 +19,13 @@ #include "soc/timer_group_struct.h" #include "soc/dport_reg.h" -#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 1, 0) -#include "esp32/rom/ets_sys.h" -#include "esp_intr_alloc.h" -#else -#include "rom/ets_sys.h" +//#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 1, 0) +//#include "esp32/rom/ets_sys.h" +//#include "esp_intr_alloc.h" +//#else +//#include "rom/ets_sys.h" #include "esp_intr.h" -#endif +//#endif #define HWTIMER_LOCK() portENTER_CRITICAL(timer->lock) #define HWTIMER_UNLOCK() portEXIT_CRITICAL(timer->lock) diff --git a/cores/esp32/esp32-hal-uart.c b/cores/esp32/esp32-hal-uart.c index d55d360bb11..2f28f28ec81 100644 --- a/cores/esp32/esp32-hal-uart.c +++ b/cores/esp32/esp32-hal-uart.c @@ -26,15 +26,15 @@ #include "soc/dport_reg.h" #include "soc/rtc.h" -#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 1, 0) -#include "esp32/rom/uart.h" -#include "esp32/rom/ets_sys.h" -#include "esp_intr_alloc.h" -#else +//#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 1, 0) +//#include "esp32/rom/uart.h" +//#include "esp32/rom/ets_sys.h" +//#include "esp_intr_alloc.h" +//#else #include "rom/uart.h" #include "esp_intr.h" #include "rom/ets_sys.h" -#endif +//#endif #define UART_REG_BASE(u) ((u==0)?DR_REG_UART_BASE:( (u==1)?DR_REG_UART1_BASE:( (u==2)?DR_REG_UART2_BASE:0)))