bus: mvebu: pass the coherency availability information at init time

tpetazzoni · Jason Cooper · commit 5686a1e5aa43 · 2014-04-24T05:00:36.000Z
Until now, the mvebu-mbus was guessing by itself whether hardware I/O coherency was available or not by poking into the Device Tree to see if the coherency fabric Device Tree node was present or not. However, on some upcoming SoCs, the presence or absence of the coherency fabric DT node isn't sufficient: in CONFIG_SMP, the coherency can be enabled, but not in !CONFIG_SMP. In order to clean this up, the mvebu_mbus_dt_init() function is extended to get a boolean argument telling whether coherency is enabled or not. Therefore, the logic to decide whether coherency is available or not now belongs to the core SoC code instead of the mvebu-mbus driver itself, which is much better. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1397483228-25625-4-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
@@ -195,7 +195,7 @@ static void __init kirkwood_dt_init(void)
 {
 	kirkwood_disable_mbus_error_propagation();
 
-	BUG_ON(mvebu_mbus_dt_init());
+	BUG_ON(mvebu_mbus_dt_init(false));
 
 #ifdef CONFIG_CACHE_FEROCEON_L2
 	feroceon_of_init();
diff --git a/arch/arm/mach-mvebu/board-v7.c b/arch/arm/mach-mvebu/board-v7.c
@@ -58,7 +58,7 @@ static void __init mvebu_timer_and_clk_init(void)
 	of_clk_init(NULL);
 	clocksource_of_init();
 	coherency_init();
-	BUG_ON(mvebu_mbus_dt_init());
+	BUG_ON(mvebu_mbus_dt_init(coherency_available()));
 #ifdef CONFIG_CACHE_L2X0
 	l2x0_of_init(0, ~0UL);
 #endif
diff --git a/arch/arm/mach-mvebu/dove.c b/arch/arm/mach-mvebu/dove.c
@@ -23,7 +23,7 @@ static void __init dove_init(void)
 #ifdef CONFIG_CACHE_TAUROS2
 	tauros2_init(0);
 #endif
-	BUG_ON(mvebu_mbus_dt_init());
+	BUG_ON(mvebu_mbus_dt_init(false));
 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 }
 
diff --git a/arch/arm/mach-mvebu/kirkwood.c b/arch/arm/mach-mvebu/kirkwood.c
@@ -169,7 +169,7 @@ static void __init kirkwood_dt_init(void)
 {
 	kirkwood_disable_mbus_error_propagation();
 
-	BUG_ON(mvebu_mbus_dt_init());
+	BUG_ON(mvebu_mbus_dt_init(false));
 
 #ifdef CONFIG_CACHE_FEROCEON_L2
 	feroceon_of_init();
diff --git a/drivers/bus/mvebu-mbus.c b/drivers/bus/mvebu-mbus.c
@@ -694,7 +694,6 @@ static int __init mvebu_mbus_common_init(struct mvebu_mbus_state *mbus,
 					 phys_addr_t sdramwins_phys_base,
 					 size_t sdramwins_size)
 {
-	struct device_node *np;
 	int win;
 
 	mbus->mbuswins_base = ioremap(mbuswins_phys_base, mbuswins_size);
@@ -707,12 +706,6 @@ static int __init mvebu_mbus_common_init(struct mvebu_mbus_state *mbus,
 		return -ENOMEM;
 	}
 
-	np = of_find_compatible_node(NULL, NULL, "marvell,coherency-fabric");
-	if (np) {
-		mbus->hw_io_coherency = 1;
-		of_node_put(np);
-	}
-
 	for (win = 0; win < mbus->soc->num_wins; win++)
 		mvebu_mbus_disable_window(mbus, win);
 
@@ -882,7 +875,7 @@ static void __init mvebu_mbus_get_pcie_resources(struct device_node *np,
 	}
 }
 
-int __init mvebu_mbus_dt_init(void)
+int __init mvebu_mbus_dt_init(bool is_coherent)
 {
 	struct resource mbuswins_res, sdramwins_res;
 	struct device_node *np, *controller;
@@ -920,6 +913,8 @@ int __init mvebu_mbus_dt_init(void)
 		return -EINVAL;
 	}
 
+	mbus_state.hw_io_coherency = is_coherent;
+
 	/* Get optional pcie-{mem,io}-aperture properties */
 	mvebu_mbus_get_pcie_resources(np, &mbus_state.pcie_mem_aperture,
 					  &mbus_state.pcie_io_aperture);
diff --git a/include/linux/mbus.h b/include/linux/mbus.h
@@ -73,6 +73,6 @@ int mvebu_mbus_del_window(phys_addr_t base, size_t size);
 int mvebu_mbus_init(const char *soc, phys_addr_t mbus_phys_base,
 		    size_t mbus_size, phys_addr_t sdram_phys_base,
 		    size_t sdram_size);
-int mvebu_mbus_dt_init(void);
+int mvebu_mbus_dt_init(bool is_coherent);
 
 #endif /* __LINUX_MBUS_H */

Original file line number	Diff line number	Diff line change
`@@ -195,7 +195,7 @@ static void __init kirkwood_dt_init(void)`
`195`	`195`	`{`
`196`	`196`	`kirkwood_disable_mbus_error_propagation();`
`197`	`197`
`198`		`- BUG_ON(mvebu_mbus_dt_init());`
	`198`	`+ BUG_ON(mvebu_mbus_dt_init(false));`
`199`	`199`
`200`	`200`	`#ifdef CONFIG_CACHE_FEROCEON_L2`
`201`	`201`	`feroceon_of_init();`
Original file line number	Diff line number	Diff line change
`@@ -23,7 +23,7 @@ static void __init dove_init(void)`
`23`	`23`	`#ifdef CONFIG_CACHE_TAUROS2`
`24`	`24`	`tauros2_init(0);`
`25`	`25`	`#endif`
`26`		`- BUG_ON(mvebu_mbus_dt_init());`
	`26`	`+ BUG_ON(mvebu_mbus_dt_init(false));`
`27`	`27`	`of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);`
`28`	`28`	`}`
`29`	`29`
Original file line number	Diff line number	Diff line change
`@@ -169,7 +169,7 @@ static void __init kirkwood_dt_init(void)`
`169`	`169`	`{`
`170`	`170`	`kirkwood_disable_mbus_error_propagation();`
`171`	`171`
`172`		`- BUG_ON(mvebu_mbus_dt_init());`
	`172`	`+ BUG_ON(mvebu_mbus_dt_init(false));`
`173`	`173`
`174`	`174`	`#ifdef CONFIG_CACHE_FEROCEON_L2`
`175`	`175`	`feroceon_of_init();`
Original file line number	Diff line number	Diff line change
`@@ -694,7 +694,6 @@ static int __init mvebu_mbus_common_init(struct mvebu_mbus_state *mbus,`
`694`	`694`	`phys_addr_t sdramwins_phys_base,`
`695`	`695`	`size_t sdramwins_size)`
`696`	`696`	`{`
`697`		`- struct device_node *np;`
`698`	`697`	`int win;`
`699`	`698`
`700`	`699`	`mbus->mbuswins_base = ioremap(mbuswins_phys_base, mbuswins_size);`
`@@ -707,12 +706,6 @@ static int __init mvebu_mbus_common_init(struct mvebu_mbus_state *mbus,`
`707`	`706`	`return -ENOMEM;`
`708`	`707`	`}`
`709`	`708`
`710`		`- np = of_find_compatible_node(NULL, NULL, "marvell,coherency-fabric");`
`711`		`- if (np) {`
`712`		`- mbus->hw_io_coherency = 1;`
`713`		`- of_node_put(np);`
`714`		`- }`
`715`		`-`
`716`	`709`	`for (win = 0; win < mbus->soc->num_wins; win++)`
`717`	`710`	`mvebu_mbus_disable_window(mbus, win);`
`718`	`711`
`@@ -882,7 +875,7 @@ static void __init mvebu_mbus_get_pcie_resources(struct device_node *np,`
`882`	`875`	`}`
`883`	`876`	`}`
`884`	`877`
`885`		`-int __init mvebu_mbus_dt_init(void)`
	`878`	`+int __init mvebu_mbus_dt_init(bool is_coherent)`
`886`	`879`	`{`
`887`	`880`	`struct resource mbuswins_res, sdramwins_res;`
`888`	`881`	`struct device_node np, controller;`
`@@ -920,6 +913,8 @@ int __init mvebu_mbus_dt_init(void)`
`920`	`913`	`return -EINVAL;`
`921`	`914`	`}`
`922`	`915`
	`916`	`+ mbus_state.hw_io_coherency = is_coherent;`
	`917`	`+`
`923`	`918`	`/* Get optional pcie-{mem,io}-aperture properties */`
`924`	`919`	`mvebu_mbus_get_pcie_resources(np, &mbus_state.pcie_mem_aperture,`
`925`	`920`	`&mbus_state.pcie_io_aperture);`