diff --git a/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt b/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt index 75e2e1999f87da..180e8835569e9e 100644 --- a/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt +++ b/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt @@ -8,12 +8,29 @@ Required Properties: - compatible: should be one of the following: - "samsung,exynos4210-audss-clock" - controller compatible with all Exynos4 SoCs. - - "samsung,exynos5250-audss-clock" - controller compatible with all Exynos5 SoCs. - + - "samsung,exynos5250-audss-clock" - controller compatible with Exynos5250 + SoCs. + - "samsung,exynos5420-audss-clock" - controller compatible with Exynos5420 + SoCs. - reg: physical base address and length of the controller's register set. - #clock-cells: should be 1. +- clocks: + - pll_ref: Fixed rate PLL reference clock, parent of mout_audss. "fin_pll" + is used if not specified. + - pll_in: Input PLL to the AudioSS block, parent of mout_audss. "fout_epll" + is used if not specified. + - cdclk: External i2s clock, parent of mout_i2s. "cdclk0" is used if not + specified. + - sclk_audio: Audio bus clock, parent of mout_i2s. "sclk_audio0" is used if + not specified. + - sclk_pcm_in: PCM clock, parent of sclk_pcm. "sclk_pcm0" is used if not + specified. + +- clock-names: Aliases for the above clocks. They should be "pll_ref", + "pll_in", "cdclk", "sclk_audio", and "sclk_pcm_in" respectively. + The following is the list of clocks generated by the controller. Each clock is assigned an identifier and client nodes use this identifier to specify the clock which they consume. Some of the clocks are available only on a particular @@ -34,16 +51,30 @@ i2s_bus 6 sclk_i2s 7 pcm_bus 8 sclk_pcm 9 +adma 10 Exynos5420 + +Example 1: An example of a clock controller node using the default input + clock names is listed below. + +clock_audss: audss-clock-controller@3810000 { + compatible = "samsung,exynos5250-audss-clock"; + reg = <0x03810000 0x0C>; + #clock-cells = <1>; +}; -Example 1: An example of a clock controller node is listed below. +Example 2: An example of a clock controller node with the input clocks + specified. clock_audss: audss-clock-controller@3810000 { compatible = "samsung,exynos5250-audss-clock"; reg = <0x03810000 0x0C>; #clock-cells = <1>; + clocks = <&clock 1>, <&clock 7>, <&clock 138>, <&clock 160>, + <&ext_i2s_clk>; + clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in", "cdclk"; }; -Example 2: I2S controller node that consumes the clock generated by the clock +Example 3: I2S controller node that consumes the clock generated by the clock controller. Refer to the standard clock bindings for information about 'clocks' and 'clock-names' property. diff --git a/Documentation/devicetree/bindings/sound/daisy-audio-max98095.txt b/Documentation/devicetree/bindings/sound/daisy-audio-max98095.txt new file mode 100644 index 00000000000000..3031abee4d7abe --- /dev/null +++ b/Documentation/devicetree/bindings/sound/daisy-audio-max98095.txt @@ -0,0 +1,40 @@ +Google Daisy audio complex + +Required properties: +- compatible : "google,daisy-audio-max988095" or "google,daisy-audio-max98090" +- samsung,i2s-controller: Reference to the i2s controller that will be used + as the CPU DAI. +- samsung,audio-codec: Reference to the audio codec. +- clocks: List of clock handles. The following must be specified: + - fout_epll: Parent of sclk_epll + - sclk_epll: Mux to select parent of epll + - mout_audio0: Mux to select parent of sclk_audio0 + - sclk_audio0: Controls gating of audio bus clock; parent of mout_i2s + - mout_audss: Mux to select parent of audio IP clock + - mout_i2s: Mux to select parent of i2s clock +- clock-names: Aliases for the above clocks. They should be "fout_epll", + "sclk_epll", "mout_audio0", "sclk_audio0", "mout_audss", and "mout_i2s", + respectively. + +Optional properties: +- samsung,hp-det-gpios : The GPIO that detects when headphones are plugged in. +- samsung,mic-det-gpios : The GPIO that detects when mic is plugged in. +- card-name : The name that we'll report for the sound card. If not present + will be "DAISY-I2S". + +Example: + +sound { + compatible = "google,daisy-audio-max98095"; + + samsung,i2s-controller = <&i2s0>; + samsung,audio-codec = <&max98095>; + samsung,mic-det-gpios = <&gpx2 0 2 0 0>; + samsung,hp-det-gpios = <&gpx2 2 2 0 0>; + card-name = "DAISY-I2S-98095"; + clocks = <&clock 3>, <&clock 4>, <&clock 1026>, + <&clock 138>, <&clock_audss EXYNOS_MOUT_AUDSS>, + <&clock_audss EXYNOS_MOUT_I2S>; + clock-names = "fout_epll", "sclk_epll", "mout_audio0", + "sclk_audio0", "mout_audss", "mout_i2s"; +}; diff --git a/Documentation/devicetree/bindings/sound/hdmi.txt b/Documentation/devicetree/bindings/sound/hdmi.txt new file mode 100644 index 00000000000000..31af7bca309979 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/hdmi.txt @@ -0,0 +1,17 @@ +Device-Tree bindings for dummy HDMI codec + +Required properties: + - compatible: should be "linux,hdmi-audio". + +CODEC output pins: + * TX + +CODEC input pins: + * RX + +Example node: + + hdmi_audio: hdmi_audio@0 { + compatible = "linux,hdmi-audio"; + status = "okay"; + }; diff --git a/Documentation/devicetree/bindings/sound/max98090.txt b/Documentation/devicetree/bindings/sound/max98090.txt new file mode 100644 index 00000000000000..e4c8b36dcf8922 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/max98090.txt @@ -0,0 +1,43 @@ +MAX98090 audio CODEC + +This device supports I2C only. + +Required properties: + +- compatible : "maxim,max98090". + +- reg : The I2C address of the device. + +- interrupts : The CODEC's interrupt output. + +Pins on the device (for linking into audio routes): + + * MIC1 + * MIC2 + * DMICL + * DMICR + * IN1 + * IN2 + * IN3 + * IN4 + * IN5 + * IN6 + * IN12 + * IN34 + * IN56 + * HPL + * HPR + * SPKL + * SPKR + * RCVL + * RCVR + * MICBIAS + +Example: + +audio-codec@10 { + compatible = "maxim,max98090"; + reg = <0x10>; + interrupt-parent = <&gpio>; + interrupts = ; +}; diff --git a/arch/arm/boot/dts/exynos5410-odroidxu.dts b/arch/arm/boot/dts/exynos5410-odroidxu.dts index e42de32eaed073..d621e6eea63832 100644 --- a/arch/arm/boot/dts/exynos5410-odroidxu.dts +++ b/arch/arm/boot/dts/exynos5410-odroidxu.dts @@ -32,20 +32,14 @@ samsung,mfc-l = <0x51000000 0x800000>; }; - clocks { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - fin_pll: clock-fin-pll { - compatible = "fixed-clock"; - reg = <0>; - #clock-cells = <0>; + fixed-rate-clocks { + xxti { + compatible = "samsung,clock-xxti"; clock-frequency = <24000000>; - clock-output-names = "fin_pll"; }; }; + mmc@12200000 { status = "okay"; num-slots = <1>; @@ -82,27 +76,27 @@ }; }; - leds { - compatible = "gpio-leds"; - hearbeat { - label = "red:heartbeart"; - gpios = <&gpb2 2 GPIO_ACTIVE_HIGH>; - default-state = "off"; - linux,default-trigger = "heartbeat"; - }; - eMMC { - label = "green:activity"; - gpios = <&gpb2 1 GPIO_ACTIVE_HIGH>; - default-state = "off"; - linux,default-trigger = "mmc0"; - }; - microSD { - label = "blue:activity"; - gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>; - default-state = "off"; - linux,default-trigger = "mmc1"; - }; - }; + leds { + compatible = "gpio-leds"; + hearbeat { + label = "red:heartbeart"; + gpios = <&gpx2 3 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "heartbeat"; + }; + eMMC { + label = "green:activity"; + gpios = <&gpb2 1 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "mmc0"; + }; + microSD { + label = "blue:activity"; + gpios = <&gpb2 2 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "mmc1"; + }; + }; pinctrl@13400000 { max77802_irq: max77802-irq { @@ -125,7 +119,7 @@ }; }; - pinctrl@14000000 { + pinctrl@14000000 { usb3_overcur0_u2: usb3-overcur0-u2 { samsung,pins = "gpk3-0"; samsung,pin-function = <2>; @@ -169,11 +163,11 @@ }; }; - /* ic21 */ + /* i2c1 */ i2c@12C70000 { status = "okay"; clock-frequency = <400000>; - codec@10 { + max98090: codec@10 { compatible = "maxim,max98090"; reg = <0x10>; interrupts = <2 0>; @@ -184,7 +178,7 @@ }; }; - /* ic22 */ + /* i2c2 */ i2c@12C80000 { samsung,i2c-sda-delay = <100>; samsung,i2c-max-bus-freq = <66000>; @@ -234,8 +228,8 @@ hdmi { hpd-gpio = <&gpx3 7 0>; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_hpd_irq>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_hpd_irq>; hdmi-en-supply = <&fixed_regulator>; vdd_osc-supply = <&ldo10_reg>; vdd_pll-supply = <&ldo8_reg>; @@ -243,18 +237,18 @@ phy = <&hdmiphy>; }; - fixed_regulator: fixed_regulator@0 { - compatible = "regulator-fixed"; - regulator-name = "hdmi-en"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; + fixed_regulator: fixed_regulator@0 { + compatible = "regulator-fixed"; + regulator-name = "hdmi-en"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; /* hsic24 */ hsi2c@12CA0000 { status = "okay"; samsung,hs-mode; - clock-frequency = <1000000>; + clock-frequency = <1000000>; max77802-pmic@9 { compatible = "maxim,max77802"; @@ -540,4 +534,32 @@ status = "okay"; }; + hdmiphy@145D0000 { + compatible = "samsung,exynos5410-odroidxu-hdmiphy"; + }; + + + i2s@03830000 { + status = "okay"; + }; + + sound { + compatible = "google,daisy-audio-max98090"; + + samsung,i2s-controller = <&i2s0>; + samsung,audio-codec = <&max98090>; + card-name = "ODROID-I2S-98090"; + clocks = <&clock CLK_FOUT_EPLL>, <&clock CLK_SCLK_EPLL>, <&clock CLK_MOUT_AUDIO0>, + <&clock CLK_SCLK_MAUDIO0>, <&clock_audss EXYNOS_MOUT_AUDSS>, + <&clock_audss EXYNOS_MOUT_I2S>; + clock-names = "fout_epll", "sclk_epll", "mout_audio0", + "sclk_audio0", "mout_audss", "mout_i2s"; + }; + + firmware@02073000 { + compatible = "samsung,secure-firmware"; + reg = <0x02073000 0x1000>; + }; + + }; diff --git a/arch/arm/boot/dts/exynos5410-pinctrl.dtsi b/arch/arm/boot/dts/exynos5410-pinctrl.dtsi index c62baf88b7c340..82a9acd523eb7b 100644 --- a/arch/arm/boot/dts/exynos5410-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5410-pinctrl.dtsi @@ -653,7 +653,7 @@ pwm0_out: pwm0-out { samsung,pins = "gpb2-0"; - samsung,pin-fuction = <2>; + samsung,pin-function = <2>; samsung,pin-pud = <0>; samsung,pin-drv = <0>; }; diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi index 9081406fe66632..2ea3d6174e6a36 100644 --- a/arch/arm/boot/dts/exynos5410.dtsi +++ b/arch/arm/boot/dts/exynos5410.dtsi @@ -14,6 +14,7 @@ */ #include +#include #include "exynos5.dtsi" #include "exynos5410-pinctrl.dtsi" / { @@ -85,7 +86,7 @@ interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>, <8>, <9>, <10>, <11>; - clocks = <&fin_pll>, <&clock CLK_MCT>; + clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; clock-names = "fin_pll", "mct"; interrupt_map: interrupt-map { @@ -107,7 +108,7 @@ }; }; - gsc_pd: power-domain@10044000 { + gsc_pd: power-domain@10044000 { compatible = "samsung,exynos4210-pd"; reg = <0x10044000 0x20>; }; @@ -246,7 +247,7 @@ status = "disabled"; }; - i2c_8: i2c@12CE0000 { + i2c_8: i2c@12CE0000 { compatible = "samsung,s3c2440-hdmiphy-i2c"; reg = <0x12CE0000 0x1000>; interrupts = <0 64 0>; @@ -316,9 +317,9 @@ compatible = "samsung,exynos5410-hdmi"; reg = <0x14530000 0x70000>; interrupts = <0 95 0>; - clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, <&clock CLK_SCLK_PIXEL>, + clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, <&clock CLK_DIV_HDMI_PIXEL>, <&clock CLK_SCLK_HDMIPHY>, <&clock CLK_MOUT_HDMI>; - clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", + clock-names = "hdmi", "sclk_hdmi", "div_hdmi_pixel", "sclk_hdmiphy", "mout_hdmi"; phy = <&hdmiphy>; }; @@ -380,10 +381,28 @@ samsung,power-domain = <&gsc_pd>; }; + usb@12110000 { + compatible = "samsung,exynos4210-ehci"; + reg = <0x12110000 0x100>; + interrupts = <0 71 0>; + + clocks = <&clock CLK_USBH20>; + clock-names = "usbhost"; + }; + + usb@12120000 { + compatible = "samsung,exynos4210-ohci"; + reg = <0x12120000 0x100>; + interrupts = <0 71 0>; + + clocks = <&clock CLK_USBH20>; + clock-names = "usbhost"; + }; + usb2_phy: usbphy@12130000 { compatible = "samsung,exynos5250-usb2phy"; reg = <0x12130000 0x100>; - clocks = <&fin_pll>, <&clock CLK_USBH20>; + clocks = <&clock CLK_FIN_PLL>, <&clock CLK_USBH20>; clock-names = "ext_xtal", "usbhost"; #address-cells = <1>; #size-cells = <1>; @@ -398,28 +417,30 @@ usb3_phy0: usbphy@12100000 { compatible = "samsung,exynos5250-usb3phy"; reg = <0x12100000 0x100>; - clocks = <&fin_pll>, <&clock CLK_USBD300>; + clocks = <&clock CLK_FIN_PLL>, <&clock CLK_USBD300>; clock-names = "ext_xtal", "usbdrd30"; #address-cells = <1>; #size-cells = <1>; ranges; usbphy-sys { - sysreg = <0x10040704 0xc>; + reg = <0x10040704 0xc>, + <0x10050230 0x4>; }; }; usb3_phy1: usbphy@12500000 { compatible = "samsung,exynos5250-usb3phy"; reg = <0x12500000 0x100>; - clocks = <&fin_pll>, <&clock CLK_USBD301>; + clocks = <&clock CLK_FIN_PLL>, <&clock CLK_USBD301>; clock-names = "ext_xtal", "usbdrd30"; #address-cells = <1>; #size-cells = <1>; ranges; usbphy-sys { - sysreg = <0x10040704 0xc>; + reg = <0x10040704 0xc>, + <0x10050230 0x4>; }; }; @@ -431,11 +452,11 @@ #size-cells = <1>; ranges; - dwc3 { + dwc3@12000000 { compatible = "snps,dwc3"; reg = <0x12000000 0x10000>; interrupts = <0 72 0>; - usb-phy = <&usb3_phy0>, <&usb2_phy>; + usb-phy = <&usb2_phy>, <&usb3_phy0>; }; }; @@ -447,32 +468,14 @@ #size-cells = <1>; ranges; - dwc3 { + dwc3@12400000 { compatible = "snps,dwc3"; reg = <0x12400000 0x10000>; interrupts = <0 200 0>; - usb-phy = <&usb3_phy1>, <&usb2_phy>; + usb-phy = <&usb2_phy>, <&usb3_phy1>; }; }; - usb@12110000 { - compatible = "samsung,exynos4210-ehci"; - reg = <0x12110000 0x100>; - interrupts = <0 71 0>; - - clocks = <&clock CLK_USBH20>; - clock-names = "usbhost"; - }; - - usb@12120000 { - compatible = "samsung,exynos4210-ohci"; - reg = <0x12120000 0x100>; - interrupts = <0 71 0>; - - clocks = <&clock CLK_USBH20>; - clock-names = "usbhost"; - }; - usb_hub_bus { compatible = "simple-bus"; #address-cells = <1>; @@ -485,7 +488,7 @@ reset-gpios = <&gpx1 4 1>; connect-gpios = <&gpx0 6 1>; intn-gpios = <&gpx0 7 1>; - secondary-refclk; + secondary-refclk; }; }; @@ -494,7 +497,7 @@ compatible = "samsung,exynos5410-tmu"; reg = <0x10060000 0x100>; interrupts = <0 65 0>; - clocks = <&clock 318>; + clocks = <&clock CLK_TMU_APBIF>; clock-names = "tmu_apbif"; }; @@ -503,7 +506,7 @@ compatible = "samsung,exynos5410-tmu"; reg = <0x10064000 0x100>; interrupts = <0 183 0>; - clocks = <&clock 318>; + clocks = <&clock CLK_TMU_APBIF>; clock-names = "tmu_apbif"; }; @@ -512,16 +515,16 @@ compatible = "samsung,exynos5410-tmu"; reg = <0x10068000 0x100>; interrupts = <0 184 0>; - clocks = <&clock 318>; + clocks = <&clock CLK_TMU_APBIF>; clock-names = "tmu_apbif"; }; /* tmu for CPU3 */ tmu@1006c000 { - compatible = "samsung,exynos5420-tmu"; + compatible = "samsung,exynos5410-tmu"; reg = <0x1006c000 0x100>; interrupts = <0 185 0>; - clocks = <&clock 318>; + clocks = <&clock CLK_TMU_APBIF>; clock-names = "tmu_apbif"; }; @@ -542,28 +545,141 @@ interrupts = <0 192 4>, <0 193 4>, <0 194 4>, <0 195 4>; }; - pwm@12dd0000 { - compatible = "samsung,exynos4210-pwm"; - reg = <0x139D0000 0x1000>; - interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>; - clocks = <&clock 336>; - clock-names = "timers"; - #pwm-cells = <2>; - status = "disabled"; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupts = <1 13 0xf08>, - <1 14 0xf08>, - <1 11 0xf08>, - <1 10 0xf08>; - /* Unfortunately we need this since some versions of U-Boot - * on Exynos don't set the CNTFRQ register, so we need the - * value from DT. - */ - clock-frequency = <24000000>; - }; + pwm@12dd0000 { + compatible = "samsung,exynos4210-pwm"; + reg = <0x12dd0000 0x100>; + /* interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>; */ + samsung,pwm-outputs = <0>, <1>, <2>, <3>, <4>; + #pwm-cells = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_out>; + clocks = <&clock CLK_PWM>; + clock-names = "timers"; + status = "disabled"; + }; + + + timer { + compatible = "arm,armv7-timer"; + interrupts = <1 13 0xf08>, + <1 14 0xf08>, + <1 11 0xf08>, + <1 10 0xf08>; + /* Unfortunately we need this since some versions of U-Boot + * on Exynos don't set the CNTFRQ register, so we need the + * value from DT. + */ + clock-frequency = <24000000>; + }; + + clock_audss: audss-clock-controller@3810000 { + compatible = "samsung,exynos5250-audss-clock"; /* Is it compatible with exynos5420 or exynos5250? */ + reg = <0x03810000 0x0C>; + #clock-cells = <1>; + clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>, <&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>; + clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in"; + }; + + + + amba { + #address-cells = <1>; + #size-cells = <1>; + compatible = "arm,amba-bus"; + interrupt-parent = <&gic>; + ranges; + + pdma0: pdma@121A0000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x121A0000 0x1000>; + interrupts = <0 34 0>; + clocks = <&clock CLK_PDMA0>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <32>; + }; + + /* + pdma1: pdma@121B0000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x121B0000 0x1000>; + interrupts = <0 35 0>; + clocks = <&clock CLK_PDMA1>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <32>; + }; + + mdma0: mdma@10800000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x10800000 0x1000>; + interrupts = <0 33 0>; + clocks = <&clock CLK_MDMA0>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <1>; + }; + + mdma1: mdma@11C10000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x11C10000 0x1000>; + interrupts = <0 124 0>; + clocks = <&clock CLK_MDMA1>; + clock-names = "apb_pclk"; + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <1>; + };*/ + }; + + + i2s0: i2s@03830000 { + compatible = "samsung,s5pv210-i2s"; + reg = <0x03830000 0x100>; + dmas = <&pdma0 10 + &pdma0 9 + &pdma0 8>; + dma-names = "tx", "rx", "tx-sec"; + clocks = <&clock_audss EXYNOS_I2S_BUS>, + <&clock_audss EXYNOS_I2S_BUS>, + <&clock_audss EXYNOS_SCLK_I2S>; + clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; + samsung,supports-6ch; + samsung,supports-rstclr; + samsung,supports-secdai; + samsung,idma-addr = <0x03000000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_bus>; + status = "disabled"; + }; + /* + i2s1: i2s@12D60000 { + compatible = "samsung,s5pv210-i2s"; + reg = <0x12D60000 0x100>; + dmas = <&pdma1 12 + &pdma1 11>; + dma-names = "tx", "rx"; + clocks = <&clock CLK_I2S1>, <&clock CLK_SCLK_I2S1>; + clock-names = "iis", "i2s_opclk0"; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1_bus>; + status = "disabled"; + }; + i2s2: i2s@12D70000 { + compatible = "samsung,s5pv210-i2s"; + reg = <0x12D70000 0x100>; + dmas = <&pdma0 12 + &pdma0 11>; + dma-names = "tx", "rx"; + clocks = <&clock CLK_I2S2>, <&clock CLK_SCLK_I2S2>; + clock-names = "iis", "i2s_opclk0"; + pinctrl-names = "default"; + pinctrl-0 = <&i2s2_bus>; + status = "disabled"; + };*/ }; diff --git a/arch/arm/configs/odroidxu_defconfig b/arch/arm/configs/odroidxu_defconfig index 7b9145e9f394f3..9197bad7585d56 100644 --- a/arch/arm/configs/odroidxu_defconfig +++ b/arch/arm/configs/odroidxu_defconfig @@ -1,1281 +1,129 @@ -# -# Automatically generated file; DO NOT EDIT. -# Linux/arm 3.13.11 Kernel Configuration -# -CONFIG_ARM=y -CONFIG_MIGHT_HAVE_PCI=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_HAVE_PROC_CPU=y -CONFIG_NO_IOPORT=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -CONFIG_ARCH_HAS_CPUFREQ=y -CONFIG_ARCH_HAS_BANDGAP=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_ARM_PATCH_PHYS_VIRT=y -CONFIG_NEED_MACH_MEMORY_H=y -CONFIG_GENERIC_BUG=y -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" -CONFIG_IRQ_WORK=y -CONFIG_BUILDTIME_EXTABLE_SORT=y - -# -# General setup -# -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_CROSS_COMPILE="" -# CONFIG_COMPILE_TEST is not set -CONFIG_LOCALVERSION="" # CONFIG_LOCALVERSION_AUTO is not set -CONFIG_HAVE_KERNEL_GZIP=y -CONFIG_HAVE_KERNEL_LZMA=y -CONFIG_HAVE_KERNEL_XZ=y -CONFIG_HAVE_KERNEL_LZO=y -CONFIG_HAVE_KERNEL_LZ4=y -# CONFIG_KERNEL_GZIP is not set -# CONFIG_KERNEL_LZMA is not set CONFIG_KERNEL_XZ=y -# CONFIG_KERNEL_LZO is not set -# CONFIG_KERNEL_LZ4 is not set -CONFIG_DEFAULT_HOSTNAME="(none)" -CONFIG_SWAP=y CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y -CONFIG_POSIX_MQUEUE_SYSCTL=y -# CONFIG_FHANDLE is not set -CONFIG_AUDIT=y -CONFIG_AUDITSYSCALL=y -CONFIG_AUDIT_WATCH=y -CONFIG_AUDIT_TREE=y - -# -# IRQ subsystem -# -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_IRQ_DOMAIN=y -# CONFIG_IRQ_DOMAIN_DEBUG is not set -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_SPARSE_IRQ=y -CONFIG_KTIME_SCALAR=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_ARCH_HAS_TICK_BROADCAST=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y - -# -# Timers subsystem -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ_COMMON=y -# CONFIG_HZ_PERIODIC is not set -CONFIG_NO_HZ_IDLE=y -# CONFIG_NO_HZ_FULL is not set +CONFIG_FHANDLE=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y - -# -# CPU/Task time and stats accounting -# -CONFIG_TICK_CPU_ACCOUNTING=y -# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set -# CONFIG_IRQ_TIME_ACCOUNTING is not set CONFIG_BSD_PROCESS_ACCT=y -# CONFIG_BSD_PROCESS_ACCT_V3 is not set -# CONFIG_TASKSTATS is not set - -# -# RCU Subsystem -# -CONFIG_TREE_RCU=y -# CONFIG_PREEMPT_RCU is not set -CONFIG_RCU_STALL_COMMON=y -# CONFIG_RCU_USER_QS is not set -CONFIG_RCU_FANOUT=32 -CONFIG_RCU_FANOUT_LEAF=16 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_RCU_FAST_NO_HZ is not set -# CONFIG_TREE_RCU_TRACE is not set -# CONFIG_RCU_NOCB_CPU is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=16 -CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_CGROUPS=y -# CONFIG_CGROUP_DEBUG is not set -# CONFIG_CGROUP_FREEZER is not set CONFIG_CGROUP_DEVICE=y -# CONFIG_CPUSETS is not set CONFIG_CGROUP_CPUACCT=y -# CONFIG_RESOURCE_COUNTERS is not set -# CONFIG_CGROUP_PERF is not set CONFIG_CGROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_CFS_BANDWIDTH is not set -# CONFIG_RT_GROUP_SCHED is not set CONFIG_BLK_CGROUP=y -# CONFIG_DEBUG_BLK_CGROUP is not set -# CONFIG_CHECKPOINT_RESTORE is not set -# CONFIG_NAMESPACES is not set -# CONFIG_UIDGID_STRICT_TYPE_CHECKS is not set -# CONFIG_SCHED_AUTOGROUP is not set -# CONFIG_SYSFS_DEPRECATED is not set -# CONFIG_RELAY is not set CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_RD_GZIP=y -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set CONFIG_RD_XZ=y -# CONFIG_RD_LZO is not set -# CONFIG_RD_LZ4 is not set -# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set -CONFIG_SYSCTL=y -CONFIG_ANON_INODES=y -CONFIG_HAVE_UID16=y -CONFIG_PANIC_TIMEOUT=0 -CONFIG_EXPERT=y -CONFIG_UID16=y -# CONFIG_SYSCTL_SYSCALL is not set -CONFIG_KALLSYMS=y CONFIG_KALLSYMS_ALL=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y CONFIG_EMBEDDED=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_PERF_USE_VMALLOC=y - -# -# Kernel Performance Events And Counters -# -CONFIG_PERF_EVENTS=y -# CONFIG_DEBUG_PERF_USE_VMALLOC is not set -CONFIG_VM_EVENT_COUNTERS=y # CONFIG_COMPAT_BRK is not set CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set CONFIG_PROFILING=y -CONFIG_TRACEPOINTS=y CONFIG_OPROFILE=y -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -# CONFIG_JUMP_LABEL is not set -# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_DMA_ATTRS=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_DMA_API_DEBUG=y -CONFIG_HAVE_HW_BREAKPOINT=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_SECCOMP_FILTER=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_OLD_SIGACTION=y - -# -# GCOV-based kernel profiling -# -# CONFIG_GCOV_KERNEL is not set -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -# CONFIG_SYSTEM_TRUSTED_KEYRING is not set CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -# CONFIG_MODULE_SIG is not set -CONFIG_STOP_MACHINE=y -CONFIG_BLOCK=y -CONFIG_LBDAF=y -CONFIG_BLK_DEV_BSG=y -# CONFIG_BLK_DEV_BSGLIB is not set -# CONFIG_BLK_DEV_INTEGRITY is not set -# CONFIG_BLK_DEV_THROTTLING is not set -# CONFIG_BLK_CMDLINE_PARSER is not set - -# -# Partition Types -# CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_AIX_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -CONFIG_EFI_PARTITION=y -# CONFIG_SYSV68_PARTITION is not set -# CONFIG_CMDLINE_PARTITION is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_CFQ_GROUP_IOSCHED is not set -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" -CONFIG_PREEMPT_NOTIFIERS=y -CONFIG_UNINLINE_SPIN_UNLOCK=y -CONFIG_FREEZER=y - -# -# System Type -# -CONFIG_MMU=y -# CONFIG_ARCH_MULTIPLATFORM is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_GEMINI is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_DOVE is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_MMP is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_W90X900 is not set -# CONFIG_ARCH_LPC32XX is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_SHMOBILE is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C24XX is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_S5P64X0 is not set -# CONFIG_ARCH_S5PC100 is not set -# CONFIG_ARCH_S5PV210 is not set CONFIG_ARCH_EXYNOS=y -# CONFIG_ARCH_DAVINCI is not set -# CONFIG_ARCH_OMAP1 is not set -# CONFIG_GPIO_PCA953X is not set -# CONFIG_KEYBOARD_GPIO_POLLED is not set -CONFIG_PLAT_SAMSUNG=y -CONFIG_SAMSUNG_PM=y - -# -# Boot options -# -# CONFIG_S3C_BOOT_ERROR_RESET is not set -CONFIG_S3C_BOOT_UART_FORCE_FIFO=y CONFIG_S3C_LOWLEVEL_UART_PORT=2 -# CONFIG_SAMSUNG_ATAGS is not set -CONFIG_SAMSUNG_DMADEV=y -CONFIG_S5P_DEV_MFC=y - -# -# Power management -# -# CONFIG_SAMSUNG_PM_DEBUG is not set -# CONFIG_SAMSUNG_PM_CHECK is not set -CONFIG_S5P_PM=y -CONFIG_S5P_SLEEP=y -# CONFIG_PLAT_SPEAR is not set - -# -# SAMSUNG EXYNOS SoCs Support -# -CONFIG_ARCH_EXYNOS4=y CONFIG_ARCH_EXYNOS5=y - -# -# EXYNOS SoCs -# -CONFIG_CPU_EXYNOS4210=y -CONFIG_SOC_EXYNOS4212=y -CONFIG_SOC_EXYNOS4412=y -CONFIG_SOC_EXYNOS5250=y -CONFIG_SOC_EXYNOS5410=y -CONFIG_SOC_EXYNOS5420=y -CONFIG_SOC_EXYNOS5440=y - -# -# Processor Type -# -CONFIG_CPU_V7=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# CONFIG_ARM_TRUSTZONE=y CONFIG_ARM_LPAE=y -CONFIG_ARCH_PHYS_ADDR_T_64BIT=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARM_THUMB=y CONFIG_ARM_THUMBEE=y -CONFIG_ARM_VIRT_EXT=y -CONFIG_SWP_EMULATE=y -# CONFIG_CPU_BIG_ENDIAN is not set -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_KUSER_HELPERS=y -CONFIG_OUTER_CACHE=y -CONFIG_OUTER_CACHE_SYNC=y -CONFIG_MIGHT_HAVE_CACHE_L2X0=y -CONFIG_CACHE_L2X0=y -CONFIG_CACHE_PL310=y -CONFIG_ARM_L1_CACHE_SHIFT_6=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_DMA_MEM_BUFFERABLE=y -CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y -CONFIG_ARM_NR_BANKS=8 -CONFIG_MULTI_IRQ_HANDLER=y -# CONFIG_ARM_ERRATA_430973 is not set -# CONFIG_ARM_ERRATA_458693 is not set -# CONFIG_ARM_ERRATA_460075 is not set -# CONFIG_ARM_ERRATA_742230 is not set -# CONFIG_ARM_ERRATA_742231 is not set -# CONFIG_PL310_ERRATA_588369 is not set -# CONFIG_ARM_ERRATA_643719 is not set -# CONFIG_ARM_ERRATA_720789 is not set -# CONFIG_PL310_ERRATA_727915 is not set -# CONFIG_ARM_ERRATA_743622 is not set -# CONFIG_ARM_ERRATA_751472 is not set -CONFIG_ARM_ERRATA_773769=y -# CONFIG_PL310_ERRATA_753970 is not set -# CONFIG_ARM_ERRATA_754322 is not set -# CONFIG_ARM_ERRATA_754327 is not set -# CONFIG_ARM_ERRATA_764369 is not set -# CONFIG_PL310_ERRATA_769419 is not set -# CONFIG_ARM_ERRATA_775420 is not set CONFIG_ARM_ERRATA_798181=y -# CONFIG_ARM_ERRATA_773022 is not set -# CONFIG_FIQ_DEBUGGER is not set - -# -# Bus support -# -CONFIG_ARM_AMBA=y -# CONFIG_PCI is not set -# CONFIG_PCI_SYSCALL is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_HAVE_SMP=y CONFIG_SMP=y -CONFIG_SMP_ON_UP=y -CONFIG_ARM_CPU_TOPOLOGY=y CONFIG_SCHED_MC=y CONFIG_SCHED_SMT=y -CONFIG_HAVE_ARM_SCU=y -CONFIG_HAVE_ARM_ARCH_TIMER=y -# CONFIG_MCPM is not set -# CONFIG_BIG_LITTLE is not set -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 CONFIG_NR_CPUS=8 -CONFIG_HOTPLUG_CPU=y -# CONFIG_ARM_PSCI is not set -CONFIG_ARCH_NR_GPIO=512 -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set -CONFIG_HZ_FIXED=200 -CONFIG_HZ=200 -CONFIG_SCHED_HRTICK=y CONFIG_THUMB2_KERNEL=y -CONFIG_THUMB2_AVOID_R_ARM_THM_JUMP11=y -CONFIG_ARM_ASM_UNIFIED=y -CONFIG_AEABI=y -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SPARSEMEM_DEFAULT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_HAVE_ARCH_PFN_VALID=y CONFIG_HIGHMEM=y -# CONFIG_HIGHPTE is not set -CONFIG_HW_PERF_EVENTS=y -CONFIG_SYS_SUPPORTS_HUGETLBFS=y -CONFIG_ARCH_WANT_GENERAL_HUGETLB=y -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_SPARSEMEM_MANUAL=y -CONFIG_SPARSEMEM=y -CONFIG_HAVE_MEMORY_PRESENT=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_MEMORY_ISOLATION=y -# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set -CONFIG_SPLIT_PTLOCK_CPUS=4 -CONFIG_COMPACTION=y -CONFIG_MIGRATION=y -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_BOUNCE=y -CONFIG_MMU_NOTIFIER=y -# CONFIG_KSM is not set CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 -# CONFIG_TRANSPARENT_HUGEPAGE is not set -CONFIG_CROSS_MEMORY_ATTACH=y -# CONFIG_CLEANCACHE is not set -# CONFIG_FRONTSWAP is not set CONFIG_CMA=y -# CONFIG_CMA_DEBUG is not set -# CONFIG_ZBUD is not set -CONFIG_FORCE_MAX_ZONEORDER=11 -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_UACCESS_WITH_MEMCPY is not set CONFIG_SECCOMP=y CONFIG_CC_STACKPROTECTOR=y -CONFIG_SWIOTLB=y -CONFIG_IOMMU_HELPER=y -# CONFIG_XEN is not set -# CONFIG_ARM_FLUSH_CONSOLE_ON_RESTART is not set - -# -# Boot options -# -CONFIG_USE_OF=y -CONFIG_ATAGS=y -# CONFIG_DEPRECATED_PARAM_STRUCT is not set -# CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE is not set -CONFIG_ZBOOT_ROM_TEXT=0 -CONFIG_ZBOOT_ROM_BSS=0 -# CONFIG_ARM_APPENDED_DTB is not set CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC3,115200 init=/linuxrc mem=256M" -CONFIG_CMDLINE_FROM_BOOTLOADER=y -# CONFIG_CMDLINE_EXTEND is not set -# CONFIG_CMDLINE_FORCE is not set -# CONFIG_KEXEC is not set -# CONFIG_CRASH_DUMP is not set -CONFIG_AUTO_ZRELADDR=y - -# -# CPU Power Management -# - -# -# CPU Frequency scaling -# CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_STAT=y -# CONFIG_CPU_FREQ_STAT_DETAILS is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_GOV_USERSPACE is not set -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_GOV_INTERACTIVE is not set -# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -# CONFIG_GENERIC_CPUFREQ_CPU0 is not set - -# -# ARM CPU frequency scaling drivers -# -# CONFIG_ARM_BIG_LITTLE_CPUFREQ is not set -CONFIG_ARM_EXYNOS_CPUFREQ=y -CONFIG_ARM_EXYNOS4210_CPUFREQ=y -CONFIG_ARM_EXYNOS4X12_CPUFREQ=y -CONFIG_ARM_EXYNOS5250_CPUFREQ=y -CONFIG_ARM_EXYNOS5410_CPUFREQ=y -CONFIG_ARM_EXYNOS5440_CPUFREQ=y -# CONFIG_ARM_KIRKWOOD_CPUFREQ is not set - -# -# CPU Idle -# CONFIG_CPU_IDLE=y -# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y - -# -# ARM CPU Idle Drivers -# -# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# CONFIG_VFP=y -CONFIG_VFPv3=y CONFIG_NEON=y -# CONFIG_KERNEL_MODE_NEON is not set - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y -CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y -CONFIG_BINFMT_SCRIPT=y -# CONFIG_HAVE_AOUT is not set CONFIG_BINFMT_MISC=y -CONFIG_COREDUMP=y - -# -# Power management options -# -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_HAS_WAKELOCK=y -CONFIG_WAKELOCK=y -CONFIG_PM_SLEEP=y -CONFIG_PM_SLEEP_SMP=y -# CONFIG_PM_AUTOSLEEP is not set -# CONFIG_PM_WAKELOCKS is not set CONFIG_PM_RUNTIME=y -CONFIG_PM=y -# CONFIG_PM_DEBUG is not set -# CONFIG_APM_EMULATION is not set -CONFIG_ARCH_HAS_OPP=y -CONFIG_PM_OPP=y -CONFIG_PM_CLK=y -CONFIG_PM_GENERIC_DOMAINS=y -# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set -CONFIG_PM_GENERIC_DOMAINS_SLEEP=y -CONFIG_PM_GENERIC_DOMAINS_RUNTIME=y -CONFIG_CPU_PM=y -# CONFIG_SUSPEND_TIME is not set -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARM_CPU_SUSPEND=y CONFIG_NET=y - -# -# Networking options -# CONFIG_PACKET=y -# CONFIG_PACKET_DIAG is not set CONFIG_UNIX=y -# CONFIG_UNIX_DIAG is not set -CONFIG_XFRM=y -CONFIG_XFRM_ALGO=y CONFIG_XFRM_USER=y -# CONFIG_XFRM_SUB_POLICY is not set -CONFIG_XFRM_MIGRATE=y -# CONFIG_XFRM_STATISTICS is not set CONFIG_NET_KEY=y CONFIG_NET_KEY_MIGRATE=y CONFIG_INET=y CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set CONFIG_IP_PNP=y CONFIG_IP_PNP_DHCP=y CONFIG_IP_PNP_BOOTP=y CONFIG_IP_PNP_RARP=y -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE_DEMUX is not set -CONFIG_NET_IP_TUNNEL=y -# CONFIG_IP_MROUTE is not set CONFIG_SYN_COOKIES=y -# CONFIG_NET_IPVTI is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -CONFIG_INET_TUNNEL=y -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y # CONFIG_INET_LRO is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_INET_UDP_DIAG is not set -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set CONFIG_IPV6=y -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_IPV6_OPTIMISTIC_DAD is not set -# CONFIG_INET6_AH is not set -# CONFIG_INET6_ESP is not set -# CONFIG_INET6_IPCOMP is not set -# CONFIG_IPV6_MIP6 is not set -# CONFIG_INET6_XFRM_TUNNEL is not set -# CONFIG_INET6_TUNNEL is not set -CONFIG_INET6_XFRM_MODE_TRANSPORT=y -CONFIG_INET6_XFRM_MODE_TUNNEL=y -CONFIG_INET6_XFRM_MODE_BEET=y -# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set -# CONFIG_IPV6_VTI is not set -CONFIG_IPV6_SIT=y -# CONFIG_IPV6_SIT_6RD is not set -CONFIG_IPV6_NDISC_NODETYPE=y -# CONFIG_IPV6_TUNNEL is not set -# CONFIG_IPV6_GRE is not set -# CONFIG_IPV6_MULTIPLE_TABLES is not set -# CONFIG_IPV6_MROUTE is not set -CONFIG_NETLABEL=y -# CONFIG_ANDROID_PARANOID_NETWORK is not set -# CONFIG_NET_ACTIVITY_STATS is not set -CONFIG_NETWORK_SECMARK=y -# CONFIG_NETWORK_PHY_TIMESTAMPING is not set CONFIG_NETFILTER=y -# CONFIG_NETFILTER_DEBUG is not set -CONFIG_NETFILTER_ADVANCED=y -CONFIG_BRIDGE_NETFILTER=y - -# -# Core Netfilter Configuration -# -# CONFIG_NETFILTER_NETLINK_ACCT is not set -# CONFIG_NETFILTER_NETLINK_QUEUE is not set -# CONFIG_NETFILTER_NETLINK_LOG is not set CONFIG_NF_CONNTRACK=m -CONFIG_NF_CONNTRACK_MARK=y -# CONFIG_NF_CONNTRACK_SECMARK is not set -CONFIG_NF_CONNTRACK_PROCFS=y -# CONFIG_NF_CONNTRACK_EVENTS is not set -# CONFIG_NF_CONNTRACK_TIMEOUT is not set -# CONFIG_NF_CONNTRACK_TIMESTAMP is not set -# CONFIG_NF_CT_PROTO_DCCP is not set -# CONFIG_NF_CT_PROTO_SCTP is not set -# CONFIG_NF_CT_PROTO_UDPLITE is not set -# CONFIG_NF_CONNTRACK_AMANDA is not set -# CONFIG_NF_CONNTRACK_FTP is not set -# CONFIG_NF_CONNTRACK_H323 is not set -# CONFIG_NF_CONNTRACK_IRC is not set -# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set -# CONFIG_NF_CONNTRACK_SNMP is not set -# CONFIG_NF_CONNTRACK_PPTP is not set -# CONFIG_NF_CONNTRACK_SANE is not set -# CONFIG_NF_CONNTRACK_SIP is not set -# CONFIG_NF_CONNTRACK_TFTP is not set -# CONFIG_NF_CT_NETLINK is not set -# CONFIG_NF_CT_NETLINK_TIMEOUT is not set -CONFIG_NF_NAT=m -CONFIG_NF_NAT_NEEDED=y -# CONFIG_NF_NAT_AMANDA is not set -# CONFIG_NF_NAT_FTP is not set -# CONFIG_NF_NAT_IRC is not set -# CONFIG_NF_NAT_SIP is not set -# CONFIG_NF_NAT_TFTP is not set -CONFIG_NETFILTER_XTABLES=m - -# -# Xtables combined modules -# CONFIG_NETFILTER_XT_MARK=m CONFIG_NETFILTER_XT_CONNMARK=m - -# -# Xtables targets -# -# CONFIG_NETFILTER_XT_TARGET_AUDIT is not set CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m -# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set -# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set -# CONFIG_NETFILTER_XT_TARGET_DSCP is not set -# CONFIG_NETFILTER_XT_TARGET_HL is not set -# CONFIG_NETFILTER_XT_TARGET_HMARK is not set -# CONFIG_NETFILTER_XT_TARGET_IDLETIMER is not set -# CONFIG_NETFILTER_XT_TARGET_LED is not set CONFIG_NETFILTER_XT_TARGET_LOG=m -# CONFIG_NETFILTER_XT_TARGET_MARK is not set -# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set -# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set -# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set -# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set CONFIG_NETFILTER_XT_TARGET_REDIRECT=m -# CONFIG_NETFILTER_XT_TARGET_TEE is not set -# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set -# CONFIG_NETFILTER_XT_TARGET_SECMARK is not set -# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set -# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set - -# -# Xtables matches -# -# CONFIG_NETFILTER_XT_MATCH_ADDRTYPE is not set -# CONFIG_NETFILTER_XT_MATCH_BPF is not set -# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set -# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set -# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set -# CONFIG_NETFILTER_XT_MATCH_CONNLABEL is not set -# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set -# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set -# CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set -# CONFIG_NETFILTER_XT_MATCH_CPU is not set -# CONFIG_NETFILTER_XT_MATCH_DCCP is not set -# CONFIG_NETFILTER_XT_MATCH_DEVGROUP is not set -# CONFIG_NETFILTER_XT_MATCH_DSCP is not set -# CONFIG_NETFILTER_XT_MATCH_ECN is not set -# CONFIG_NETFILTER_XT_MATCH_ESP is not set -# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set -# CONFIG_NETFILTER_XT_MATCH_HELPER is not set -# CONFIG_NETFILTER_XT_MATCH_HL is not set -# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set -# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set CONFIG_NETFILTER_XT_MATCH_LIMIT=m -# CONFIG_NETFILTER_XT_MATCH_MAC is not set -# CONFIG_NETFILTER_XT_MATCH_MARK is not set CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -# CONFIG_NETFILTER_XT_MATCH_NFACCT is not set -# CONFIG_NETFILTER_XT_MATCH_OWNER is not set -# CONFIG_NETFILTER_XT_MATCH_POLICY is not set -# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set -# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set -# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set -# CONFIG_NETFILTER_XT_MATCH_QUOTA2 is not set -# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set -# CONFIG_NETFILTER_XT_MATCH_REALM is not set -# CONFIG_NETFILTER_XT_MATCH_RECENT is not set -# CONFIG_NETFILTER_XT_MATCH_SCTP is not set -# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set -# CONFIG_NETFILTER_XT_MATCH_STATE is not set -# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set -# CONFIG_NETFILTER_XT_MATCH_STRING is not set -# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set -# CONFIG_NETFILTER_XT_MATCH_TIME is not set -# CONFIG_NETFILTER_XT_MATCH_U32 is not set -# CONFIG_IP_SET is not set -# CONFIG_IP_VS is not set - -# -# IP: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV4=m CONFIG_NF_CONNTRACK_IPV4=m -CONFIG_NF_CONNTRACK_PROC_COMPAT=y CONFIG_IP_NF_IPTABLES=m -# CONFIG_IP_NF_MATCH_AH is not set -# CONFIG_IP_NF_MATCH_ECN is not set -# CONFIG_IP_NF_MATCH_RPFILTER is not set -# CONFIG_IP_NF_MATCH_TTL is not set CONFIG_IP_NF_FILTER=m CONFIG_IP_NF_TARGET_REJECT=m -# CONFIG_IP_NF_TARGET_REJECT_SKERR is not set -# CONFIG_IP_NF_TARGET_SYNPROXY is not set -# CONFIG_IP_NF_TARGET_ULOG is not set CONFIG_NF_NAT_IPV4=m CONFIG_IP_NF_TARGET_MASQUERADE=m -# CONFIG_IP_NF_TARGET_NETMAP is not set -# CONFIG_IP_NF_TARGET_REDIRECT is not set -# CONFIG_NF_NAT_PPTP is not set -# CONFIG_NF_NAT_H323 is not set CONFIG_IP_NF_MANGLE=m -# CONFIG_IP_NF_TARGET_CLUSTERIP is not set -# CONFIG_IP_NF_TARGET_ECN is not set -# CONFIG_IP_NF_TARGET_TTL is not set -# CONFIG_IP_NF_RAW is not set -# CONFIG_IP_NF_SECURITY is not set -# CONFIG_IP_NF_ARPTABLES is not set - -# -# IPv6: Netfilter Configuration -# -CONFIG_NF_DEFRAG_IPV6=m CONFIG_NF_CONNTRACK_IPV6=m CONFIG_IP6_NF_IPTABLES=m -# CONFIG_IP6_NF_MATCH_AH is not set -# CONFIG_IP6_NF_MATCH_EUI64 is not set -# CONFIG_IP6_NF_MATCH_FRAG is not set -# CONFIG_IP6_NF_MATCH_OPTS is not set -# CONFIG_IP6_NF_MATCH_HL is not set -# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set -# CONFIG_IP6_NF_MATCH_MH is not set -# CONFIG_IP6_NF_MATCH_RPFILTER is not set -# CONFIG_IP6_NF_MATCH_RT is not set -# CONFIG_IP6_NF_TARGET_HL is not set CONFIG_IP6_NF_FILTER=m CONFIG_IP6_NF_TARGET_REJECT=m -# CONFIG_IP6_NF_TARGET_REJECT_SKERR is not set -# CONFIG_IP6_NF_TARGET_SYNPROXY is not set CONFIG_IP6_NF_MANGLE=m -# CONFIG_IP6_NF_RAW is not set -# CONFIG_IP6_NF_SECURITY is not set CONFIG_NF_NAT_IPV6=m CONFIG_IP6_NF_TARGET_MASQUERADE=m -# CONFIG_IP6_NF_TARGET_NPT is not set CONFIG_BRIDGE_NF_EBTABLES=m -# CONFIG_BRIDGE_EBT_BROUTE is not set -# CONFIG_BRIDGE_EBT_T_FILTER is not set CONFIG_BRIDGE_EBT_T_NAT=m -# CONFIG_BRIDGE_EBT_802_3 is not set -# CONFIG_BRIDGE_EBT_AMONG is not set -# CONFIG_BRIDGE_EBT_ARP is not set -# CONFIG_BRIDGE_EBT_IP is not set -# CONFIG_BRIDGE_EBT_IP6 is not set -# CONFIG_BRIDGE_EBT_LIMIT is not set -# CONFIG_BRIDGE_EBT_MARK is not set -# CONFIG_BRIDGE_EBT_PKTTYPE is not set -# CONFIG_BRIDGE_EBT_STP is not set CONFIG_BRIDGE_EBT_VLAN=m -# CONFIG_BRIDGE_EBT_ARPREPLY is not set -# CONFIG_BRIDGE_EBT_DNAT is not set CONFIG_BRIDGE_EBT_MARK_T=m -# CONFIG_BRIDGE_EBT_REDIRECT is not set -# CONFIG_BRIDGE_EBT_SNAT is not set -# CONFIG_BRIDGE_EBT_LOG is not set -# CONFIG_BRIDGE_EBT_ULOG is not set -# CONFIG_BRIDGE_EBT_NFLOG is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_RDS is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_L2TP is not set -CONFIG_STP=m -CONFIG_GARP=m -CONFIG_MRP=m CONFIG_BRIDGE=m -CONFIG_BRIDGE_IGMP_SNOOPING=y CONFIG_BRIDGE_VLAN_FILTERING=y -CONFIG_HAVE_NET_DSA=y CONFIG_VLAN_8021Q=m CONFIG_VLAN_8021Q_GVRP=y CONFIG_VLAN_8021Q_MVRP=y -# CONFIG_DECNET is not set -CONFIG_LLC=m -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_PHONET is not set -# CONFIG_IEEE802154 is not set -# CONFIG_NET_SCHED is not set -# CONFIG_DCB is not set -CONFIG_DNS_RESOLVER=y -# CONFIG_BATMAN_ADV is not set -# CONFIG_OPENVSWITCH is not set -# CONFIG_VSOCKETS is not set -# CONFIG_NETLINK_MMAP is not set -# CONFIG_NETLINK_DIAG is not set -# CONFIG_NET_MPLS_GSO is not set -# CONFIG_HSR is not set -CONFIG_RPS=y -CONFIG_RFS_ACCEL=y -CONFIG_XPS=y CONFIG_NETPRIO_CGROUP=y -CONFIG_NET_RX_BUSY_POLL=y -CONFIG_BQL=y -# CONFIG_BPF_JIT is not set -CONFIG_NET_FLOW_LIMIT=y - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_NET_DROP_MONITOR is not set -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_AF_RXRPC is not set -CONFIG_WIRELESS=y -CONFIG_WIRELESS_EXT=y -CONFIG_WEXT_CORE=y -CONFIG_WEXT_PROC=y -CONFIG_WEXT_PRIV=y CONFIG_CFG80211=m -# CONFIG_NL80211_TESTMODE is not set -# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set -# CONFIG_CFG80211_REG_DEBUG is not set CONFIG_CFG80211_CERTIFICATION_ONUS=y # CONFIG_CFG80211_DEFAULT_PS is not set -# CONFIG_CFG80211_DEBUGFS is not set -# CONFIG_CFG80211_INTERNAL_REGDB is not set CONFIG_CFG80211_WEXT=y -# CONFIG_LIB80211 is not set CONFIG_CFG80211_ALLOW_RECONNECT=y CONFIG_MAC80211=m -CONFIG_MAC80211_HAS_RC=y -# CONFIG_MAC80211_RC_PID is not set -CONFIG_MAC80211_RC_MINSTREL=y -CONFIG_MAC80211_RC_MINSTREL_HT=y -CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y -CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" CONFIG_MAC80211_MESH=y -CONFIG_MAC80211_LEDS=y -# CONFIG_MAC80211_DEBUGFS is not set -# CONFIG_MAC80211_MESSAGE_TRACING is not set -# CONFIG_MAC80211_DEBUG_MENU is not set -# CONFIG_WIMAX is not set -# CONFIG_RFKILL is not set -# CONFIG_RFKILL_REGULATOR is not set -# CONFIG_NET_9P is not set -# CONFIG_CAIF is not set -# CONFIG_CEPH_LIB is not set -# CONFIG_NFC is not set -CONFIG_HAVE_BPF_JIT=y - -# -# Device Drivers -# - -# -# Generic Driver Options -# CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=y -CONFIG_FIRMWARE_IN_KERNEL=y CONFIG_EXTRA_FIRMWARE="edid/1024x768.fw edid/1280x1024.fw edid/1280x720.fw edid/1920x1080.fw" -CONFIG_EXTRA_FIRMWARE_DIR="firmware" -CONFIG_FW_LOADER_USER_HELPER=y -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_GENERIC_CPU_DEVICES is not set -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_IRQ=y -CONFIG_DMA_SHARED_BUFFER=y CONFIG_DMA_CMA=y - -# -# Default contiguous memory area size: -# CONFIG_CMA_SIZE_MBYTES=128 -CONFIG_CMA_SIZE_SEL_MBYTES=y -# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set -# CONFIG_CMA_SIZE_SEL_MIN is not set -# CONFIG_CMA_SIZE_SEL_MAX is not set -CONFIG_CMA_ALIGNMENT=8 -CONFIG_CMA_AREAS=7 - -# -# Bus devices -# -# CONFIG_ARM_CCI is not set CONFIG_CONNECTOR=y -CONFIG_PROC_EVENTS=y -# CONFIG_MTD is not set -CONFIG_DTC=y -CONFIG_OF=y - -# -# Device Tree and Open Firmware support -# CONFIG_PROC_DEVICETREE=y -# CONFIG_OF_SELFTEST is not set -CONFIG_OF_FLATTREE=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_IRQ=y -CONFIG_OF_NET=y -CONFIG_OF_MDIO=y -# CONFIG_PARPORT is not set -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_NULL_BLK is not set -# CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_DRBD is not set -# CONFIG_BLK_DEV_NBD is not set CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=65536 -# CONFIG_BLK_DEV_XIP is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MG_DISK is not set -# CONFIG_BLK_DEV_RBD is not set - -# -# Misc devices -# -# CONFIG_SENSORS_LIS3LV02D is not set -# CONFIG_AD525X_DPOT is not set -# CONFIG_ATMEL_PWM is not set -# CONFIG_DUMMY_IRQ is not set -# CONFIG_ICS932S401 is not set -# CONFIG_ATMEL_SSC is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_APDS9802ALS is not set -# CONFIG_ISL29003 is not set -# CONFIG_ISL29020 is not set -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_SENSORS_BH1780 is not set -# CONFIG_SENSORS_BH1770 is not set -# CONFIG_SENSORS_APDS990X is not set -# CONFIG_HMC6352 is not set -# CONFIG_DS1682 is not set -# CONFIG_UID_STAT is not set -# CONFIG_BMP085_I2C is not set -# CONFIG_USB_SWITCH_FSA9480 is not set -# CONFIG_SRAM is not set -# CONFIG_C2PORT is not set - -# -# EEPROM support -# -# CONFIG_EEPROM_AT24 is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_EEPROM_MAX6875 is not set -CONFIG_EEPROM_93CX6=y - -# -# Texas Instruments shared transport line discipline -# -# CONFIG_TI_ST is not set -# CONFIG_SENSORS_LIS3_I2C is not set - -# -# Altera FPGA firmware download module -# -# CONFIG_ALTERA_STAPL is not set - -# -# Intel MIC Host Driver -# - -# -# Intel MIC Card Driver -# - -# -# SCSI device support -# -CONFIG_SCSI_MOD=y -# CONFIG_RAID_ATTRS is not set CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -# CONFIG_BLK_DEV_SD is not set -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set -# CONFIG_CHR_DEV_SCH is not set -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_ISCSI_BOOT_SYSFS is not set -# CONFIG_SCSI_UFSHCD is not set -# CONFIG_LIBFC is not set -# CONFIG_LIBFCOE is not set -# CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_DH is not set -# CONFIG_SCSI_OSD_INITIATOR is not set -# CONFIG_ATA is not set CONFIG_MD=y -# CONFIG_BLK_DEV_MD is not set -# CONFIG_BCACHE is not set -CONFIG_BLK_DEV_DM_BUILTIN=y CONFIG_BLK_DEV_DM=y -# CONFIG_DM_DEBUG is not set -# CONFIG_DM_CRYPT is not set -# CONFIG_DM_SNAPSHOT is not set -# CONFIG_DM_THIN_PROVISIONING is not set -# CONFIG_DM_CACHE is not set -# CONFIG_DM_MIRROR is not set -# CONFIG_DM_RAID is not set -# CONFIG_DM_ZERO is not set -# CONFIG_DM_MULTIPATH is not set -# CONFIG_DM_DELAY is not set -# CONFIG_DM_UEVENT is not set -# CONFIG_DM_FLAKEY is not set -# CONFIG_DM_VERITY is not set -# CONFIG_DM_SWITCH is not set -# CONFIG_TARGET_CORE is not set CONFIG_NETDEVICES=y -CONFIG_MII=y -CONFIG_NET_CORE=y CONFIG_BONDING=m -# CONFIG_DUMMY is not set -# CONFIG_EQUALIZER is not set -# CONFIG_NET_TEAM is not set CONFIG_MACVLAN=m -# CONFIG_MACVTAP is not set -# CONFIG_VXLAN is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_TUN is not set -# CONFIG_VETH is not set -# CONFIG_NLMON is not set - -# -# CAIF transport drivers -# - -# -# Distributed Switch Architecture drivers -# -# CONFIG_NET_DSA_MV88E6XXX is not set -# CONFIG_NET_DSA_MV88E6060 is not set -# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set -# CONFIG_NET_DSA_MV88E6131 is not set -# CONFIG_NET_DSA_MV88E6123_61_65 is not set -CONFIG_ETHERNET=y -CONFIG_NET_VENDOR_ARC=y -# CONFIG_ARC_EMAC is not set -CONFIG_NET_CADENCE=y -# CONFIG_ARM_AT91_ETHER is not set -# CONFIG_MACB is not set -CONFIG_NET_VENDOR_BROADCOM=y -# CONFIG_B44 is not set -# CONFIG_NET_CALXEDA_XGMAC is not set -CONFIG_NET_VENDOR_CIRRUS=y -# CONFIG_CS89x0 is not set -# CONFIG_DM9000 is not set -# CONFIG_DNET is not set -CONFIG_NET_VENDOR_FARADAY=y -# CONFIG_FTMAC100 is not set -# CONFIG_FTGMAC100 is not set -CONFIG_NET_VENDOR_INTEL=y -CONFIG_NET_VENDOR_I825XX=y -CONFIG_NET_VENDOR_MARVELL=y -# CONFIG_MVMDIO is not set -CONFIG_NET_VENDOR_MICREL=y -# CONFIG_KS8842 is not set -# CONFIG_KS8851_MLL is not set -CONFIG_NET_VENDOR_NATSEMI=y -CONFIG_NET_VENDOR_8390=y CONFIG_AX88796=y CONFIG_AX88796_93CX6=y -# CONFIG_ETHOC is not set -# CONFIG_SH_ETH is not set -CONFIG_NET_VENDOR_SEEQ=y -CONFIG_NET_VENDOR_SMSC=y -# CONFIG_SMC91X is not set -# CONFIG_SMC911X is not set -# CONFIG_SMSC911X is not set -CONFIG_NET_VENDOR_STMICRO=y -# CONFIG_STMMAC_ETH is not set -CONFIG_NET_VENDOR_VIA=y -# CONFIG_VIA_VELOCITY is not set -CONFIG_NET_VENDOR_WIZNET=y -# CONFIG_WIZNET_W5100 is not set -# CONFIG_WIZNET_W5300 is not set -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_AT803X_PHY is not set -# CONFIG_AMD_PHY is not set -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -# CONFIG_LXT_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_SMSC_PHY is not set -# CONFIG_BROADCOM_PHY is not set -# CONFIG_BCM87XX_PHY is not set -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -# CONFIG_LSI_ET1011C_PHY is not set -# CONFIG_MICREL_PHY is not set -# CONFIG_FIXED_PHY is not set -CONFIG_MDIO_BITBANG=y -# CONFIG_MDIO_GPIO is not set -# CONFIG_MDIO_BUS_MUX_GPIO is not set -# CONFIG_MDIO_BUS_MUX_MMIOREG is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set - -# -# USB Network Adapters -# CONFIG_USB_CATC=m CONFIG_USB_KAWETH=m CONFIG_USB_PEGASUS=m @@ -1284,766 +132,81 @@ CONFIG_USB_RTL8152=m CONFIG_USB_USBNET=y CONFIG_USB_NET_AX8817X=m CONFIG_USB_NET_AX88179_178A=m -CONFIG_USB_NET_CDCETHER=y -# CONFIG_USB_NET_CDC_EEM is not set CONFIG_USB_NET_CDC_NCM=m CONFIG_USB_NET_HUAWEI_CDC_NCM=m -# CONFIG_USB_NET_CDC_MBIM is not set CONFIG_USB_NET_DM9601=m CONFIG_USB_NET_SR9700=m CONFIG_USB_NET_SMSC75XX=m CONFIG_USB_NET_SMSC95XX=m -# CONFIG_USB_NET_GL620A is not set -CONFIG_USB_NET_NET1080=y -# CONFIG_USB_NET_PLUSB is not set CONFIG_USB_NET_MCS7830=y -CONFIG_USB_NET_RNDIS_HOST=m CONFIG_USB_NET_CDC_SUBSET=m CONFIG_USB_ALI_M5632=y CONFIG_USB_AN2720=y -CONFIG_USB_BELKIN=y -CONFIG_USB_ARMLINUX=y -# CONFIG_USB_EPSON2888 is not set CONFIG_USB_KC2190=y -CONFIG_USB_NET_ZAURUS=y CONFIG_USB_NET_CX82310_ETH=m CONFIG_USB_NET_KALMIA=m CONFIG_USB_NET_QMI_WWAN=m -# CONFIG_USB_NET_INT51X1 is not set CONFIG_USB_IPHETH=m CONFIG_USB_SIERRA_NET=m -# CONFIG_USB_VL600 is not set -CONFIG_WLAN=y -# CONFIG_LIBERTAS_THINFIRM is not set -# CONFIG_AT76C50X_USB is not set -# CONFIG_USB_ZD1201 is not set CONFIG_USB_NET_RNDIS_WLAN=m CONFIG_RTL8187=m -CONFIG_RTL8187_LEDS=y -# CONFIG_MAC80211_HWSIM is not set -# CONFIG_WIFI_CONTROL_FUNC is not set -CONFIG_ATH_COMMON=m CONFIG_ATH_CARDS=m -# CONFIG_ATH_DEBUG is not set CONFIG_ATH_REG_DYNAMIC_USER_REG_HINTS=y -# CONFIG_ATH_REG_DYNAMIC_USER_CERT_TESTING is not set -CONFIG_ATH9K_HW=m -CONFIG_ATH9K_COMMON=m -CONFIG_ATH9K_BTCOEX_SUPPORT=y CONFIG_ATH9K=m CONFIG_ATH9K_AHB=y -# CONFIG_ATH9K_DEBUGFS is not set -# CONFIG_ATH9K_DFS_CERTIFIED is not set -# CONFIG_ATH9K_TX99 is not set CONFIG_ATH9K_LEGACY_RATE_CONTROL=y CONFIG_ATH9K_HTC=m -# CONFIG_ATH9K_HTC_DEBUGFS is not set CONFIG_CARL9170=m -CONFIG_CARL9170_LEDS=y -CONFIG_CARL9170_WPC=y -# CONFIG_CARL9170_HWRNG is not set CONFIG_ATH6KL=m -# CONFIG_ATH6KL_SDIO is not set CONFIG_ATH6KL_USB=m -# CONFIG_ATH6KL_DEBUG is not set -# CONFIG_ATH6KL_TRACING is not set -# CONFIG_ATH6KL_REGDOMAIN is not set CONFIG_AR5523=m CONFIG_ATH10K=m -# CONFIG_ATH10K_DEBUG is not set -# CONFIG_ATH10K_DEBUGFS is not set -# CONFIG_ATH10K_TRACING is not set CONFIG_WCN36XX=m -# CONFIG_WCN36XX_DEBUGFS is not set -# CONFIG_B43 is not set -# CONFIG_B43LEGACY is not set -# CONFIG_BRCMFMAC is not set -# CONFIG_HOSTAP is not set -# CONFIG_LIBERTAS is not set -# CONFIG_P54_COMMON is not set CONFIG_RT2X00=m CONFIG_RT2500USB=m CONFIG_RT73USB=m CONFIG_RT2800USB=m -CONFIG_RT2800USB_RT33XX=y -CONFIG_RT2800USB_RT35XX=y -# CONFIG_RT2800USB_RT3573 is not set CONFIG_RT2800USB_RT53XX=y CONFIG_RT2800USB_RT55XX=y -# CONFIG_RT2800USB_UNKNOWN is not set -CONFIG_RT2800_LIB=m -CONFIG_RT2X00_LIB_USB=m -CONFIG_RT2X00_LIB=m -CONFIG_RT2X00_LIB_FIRMWARE=y -CONFIG_RT2X00_LIB_CRYPTO=y -CONFIG_RT2X00_LIB_LEDS=y -# CONFIG_RT2X00_DEBUG is not set -CONFIG_RTL_CARDS=m CONFIG_RTL8192CU=m -CONFIG_RTLWIFI=m -CONFIG_RTLWIFI_USB=m -CONFIG_RTLWIFI_DEBUG=y -CONFIG_RTL8192C_COMMON=m -# CONFIG_WL_TI is not set CONFIG_ZD1211RW=m -# CONFIG_ZD1211RW_DEBUG is not set -# CONFIG_MWIFIEX is not set -# CONFIG_CW1200 is not set - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# -# CONFIG_WAN is not set -# CONFIG_ISDN is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set -# CONFIG_INPUT_SPARSEKMAP is not set -CONFIG_INPUT_MATRIXKMAP=y - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set -# CONFIG_INPUT_KEYRESET is not set - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -# CONFIG_KEYBOARD_ADP5588 is not set -# CONFIG_KEYBOARD_ADP5589 is not set -CONFIG_KEYBOARD_ATKBD=y -# CONFIG_KEYBOARD_QT1070 is not set -# CONFIG_KEYBOARD_QT2160 is not set -# CONFIG_KEYBOARD_LKKBD is not set CONFIG_KEYBOARD_GPIO=y -# CONFIG_KEYBOARD_TCA6416 is not set -# CONFIG_KEYBOARD_TCA8418 is not set -# CONFIG_KEYBOARD_MATRIX is not set -# CONFIG_KEYBOARD_LM8323 is not set -# CONFIG_KEYBOARD_LM8333 is not set -# CONFIG_KEYBOARD_MAX7359 is not set -# CONFIG_KEYBOARD_MCS is not set -# CONFIG_KEYBOARD_MPR121 is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_OPENCORES is not set -CONFIG_KEYBOARD_SAMSUNG=y -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_SH_KEYSC is not set -# CONFIG_KEYBOARD_XTKBD is not set -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=y -CONFIG_MOUSE_PS2_ALPS=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_CYPRESS=y -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_PS2_ELANTECH is not set -# CONFIG_MOUSE_PS2_SENTELIC is not set -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_APPLETOUCH is not set -# CONFIG_MOUSE_BCM5974 is not set -# CONFIG_MOUSE_CYAPA is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_MOUSE_GPIO is not set -# CONFIG_MOUSE_SYNAPTICS_I2C is not set -# CONFIG_MOUSE_SYNAPTICS_USB is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set CONFIG_INPUT_TOUCHSCREEN=y -# CONFIG_TOUCHSCREEN_AD7879 is not set -# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set -# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set -# CONFIG_TOUCHSCREEN_BU21013 is not set -# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set -# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set -# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set -# CONFIG_TOUCHSCREEN_DYNAPRO is not set -# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set -# CONFIG_TOUCHSCREEN_EETI is not set -# CONFIG_TOUCHSCREEN_EGALAX is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -# CONFIG_TOUCHSCREEN_ILI210X is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_WACOM_I2C is not set -# CONFIG_TOUCHSCREEN_MAX11801 is not set -# CONFIG_TOUCHSCREEN_MCS5000 is not set -# CONFIG_TOUCHSCREEN_MMS114 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_EDT_FT5X06 is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_PIXCIR is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC_SERIO is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_TOUCHSCREEN_W90X900 is not set -# CONFIG_TOUCHSCREEN_ST1232 is not set -# CONFIG_TOUCHSCREEN_SUR40 is not set -# CONFIG_TOUCHSCREEN_TPS6507X is not set -# CONFIG_TOUCHSCREEN_ZFORCE is not set -# CONFIG_TOUCHSCREEN_MXT224E is not set CONFIG_INPUT_MISC=y -# CONFIG_INPUT_AD714X is not set -# CONFIG_INPUT_BMA150 is not set -# CONFIG_INPUT_MMA8450 is not set -# CONFIG_INPUT_MPU3050 is not set -# CONFIG_INPUT_GP2A is not set -# CONFIG_INPUT_GPIO_TILT_POLLED is not set -# CONFIG_INPUT_ATI_REMOTE2 is not set -# CONFIG_INPUT_KEYCHORD is not set -# CONFIG_INPUT_KEYSPAN_REMOTE is not set -# CONFIG_INPUT_KXTJ9 is not set -# CONFIG_INPUT_POWERMATE is not set -# CONFIG_INPUT_YEALINK is not set -# CONFIG_INPUT_CM109 is not set CONFIG_INPUT_UINPUT=y -# CONFIG_INPUT_GPIO is not set -# CONFIG_INPUT_PCF8574 is not set -# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set -# CONFIG_INPUT_ADXL34X is not set -# CONFIG_INPUT_IMS_PCU is not set -# CONFIG_INPUT_CMA3000 is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -CONFIG_SERIO_SERPORT=y -# CONFIG_SERIO_AMBAKMI is not set -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_SERIO_ALTERA_PS2 is not set -# CONFIG_SERIO_PS2MULT is not set -# CONFIG_SERIO_ARC_PS2 is not set -# CONFIG_SERIO_APBPS2 is not set -# CONFIG_SERIO_OLPC_APSP is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_TTY=y -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_CONSOLE_SLEEP=y -CONFIG_HW_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_SERIAL_NONSTANDARD is not set -# CONFIG_N_GSM is not set -# CONFIG_TRACE_SINK is not set -CONFIG_DEVMEM=y # CONFIG_DEVKMEM is not set - -# -# Serial drivers -# CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y -# CONFIG_SERIAL_8250_CONSOLE is not set -CONFIG_SERIAL_8250_DMA=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -# CONFIG_SERIAL_8250_EXTENDED is not set -# CONFIG_SERIAL_8250_DW is not set -# CONFIG_SERIAL_8250_EM is not set - -# -# Non-8250 serial port support -# -# CONFIG_SERIAL_AMBA_PL010 is not set -# CONFIG_SERIAL_AMBA_PL011 is not set CONFIG_SERIAL_SAMSUNG=y -CONFIG_SERIAL_SAMSUNG_UARTS_4=y -CONFIG_SERIAL_SAMSUNG_UARTS=4 CONFIG_SERIAL_SAMSUNG_CONSOLE=y -# CONFIG_SERIAL_SH_SCI is not set -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_SERIAL_OF_PLATFORM is not set -# CONFIG_SERIAL_SCCNXP is not set -# CONFIG_SERIAL_TIMBERDALE is not set -# CONFIG_SERIAL_ALTERA_JTAGUART is not set -# CONFIG_SERIAL_ALTERA_UART is not set -# CONFIG_SERIAL_XILINX_PS_UART is not set -# CONFIG_SERIAL_ARC is not set -# CONFIG_SERIAL_FSL_LPUART is not set -# CONFIG_SERIAL_ST_ASC is not set -# CONFIG_TTY_PRINTK is not set -# CONFIG_HVC_DCC is not set -# CONFIG_IPMI_HANDLER is not set CONFIG_HW_RANDOM=y -# CONFIG_HW_RANDOM_TIMERIOMEM is not set -# CONFIG_HW_RANDOM_ATMEL is not set CONFIG_HW_RANDOM_EXYNOS=y -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -# CONFIG_DCC_TTY is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_COMPAT=y -# CONFIG_I2C_CHARDEV is not set -# CONFIG_I2C_MUX is not set -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_ALGOBIT=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# CONFIG_I2C_CBUS_GPIO=y -# CONFIG_I2C_DESIGNWARE_PLATFORM is not set CONFIG_I2C_EXYNOS5=y CONFIG_I2C_GPIO=y -# CONFIG_I2C_NOMADIK is not set -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_PXA_PCI is not set -CONFIG_HAVE_S3C2410_I2C=y CONFIG_I2C_S3C2410=y -# CONFIG_I2C_SH_MOBILE is not set -# CONFIG_I2C_SIMTEC is not set -# CONFIG_I2C_XILINX is not set -# CONFIG_I2C_RCAR is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_DIOLAN_U2C is not set -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_STUB is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_SPI is not set -# CONFIG_HSI is not set - -# -# PPS support -# -# CONFIG_PPS is not set - -# -# PPS generators support -# - -# -# PTP clock support -# -# CONFIG_PTP_1588_CLOCK is not set - -# -# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks. -# -CONFIG_PINCTRL=y - -# -# Pin controllers -# -CONFIG_PINMUX=y -CONFIG_PINCONF=y -# CONFIG_DEBUG_PINCTRL is not set -# CONFIG_PINCTRL_SINGLE is not set -CONFIG_PINCTRL_SAMSUNG=y -CONFIG_PINCTRL_EXYNOS=y -CONFIG_PINCTRL_EXYNOS5440=y -CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -CONFIG_GPIO_DEVRES=y -CONFIG_OF_GPIO=y -# CONFIG_DEBUG_GPIO is not set CONFIG_GPIO_SYSFS=y - -# -# Memory mapped GPIO drivers: -# -# CONFIG_GPIO_GENERIC_PLATFORM is not set -# CONFIG_GPIO_EM is not set -# CONFIG_GPIO_PL061 is not set -# CONFIG_GPIO_RCAR is not set -# CONFIG_GPIO_TS5500 is not set -# CONFIG_GPIO_GRGPIO is not set - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX7300 is not set -# CONFIG_GPIO_MAX732X is not set -# CONFIG_GPIO_PCF857X is not set -# CONFIG_GPIO_SX150X is not set -# CONFIG_GPIO_ADP5588 is not set -# CONFIG_GPIO_ADNP is not set - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MCP23S08 is not set - -# -# AC97 GPIO expanders: -# - -# -# LPC GPIO expanders: -# - -# -# MODULbus GPIO expanders: -# -# CONFIG_GPIO_BCM_KONA is not set - -# -# USB GPIO expanders: -# -# CONFIG_W1 is not set CONFIG_POWER_SUPPLY=y -# CONFIG_POWER_SUPPLY_DEBUG is not set -# CONFIG_PDA_POWER is not set -# CONFIG_TEST_POWER is not set -# CONFIG_BATTERY_DS2780 is not set -# CONFIG_BATTERY_DS2781 is not set -# CONFIG_BATTERY_DS2782 is not set -# CONFIG_BATTERY_SBS is not set -# CONFIG_BATTERY_BQ27x00 is not set -# CONFIG_BATTERY_MAX17040 is not set -# CONFIG_BATTERY_MAX17042 is not set -# CONFIG_CHARGER_ISP1704 is not set -# CONFIG_CHARGER_MAX8903 is not set -# CONFIG_CHARGER_LP8727 is not set -# CONFIG_CHARGER_GPIO is not set -# CONFIG_CHARGER_MANAGER is not set -# CONFIG_CHARGER_BQ2415X is not set -# CONFIG_CHARGER_BQ24190 is not set -# CONFIG_CHARGER_BQ24735 is not set -# CONFIG_CHARGER_SMB347 is not set -# CONFIG_POWER_RESET is not set -# CONFIG_POWER_RESET_RESTART is not set -# CONFIG_POWER_AVS is not set CONFIG_POWER_ASV=y CONFIG_POWER_EXYNOS_ASV=y -CONFIG_HWMON=y -# CONFIG_HWMON_VID is not set -# CONFIG_HWMON_DEBUG_CHIP is not set - -# -# Native drivers -# -# CONFIG_SENSORS_AD7414 is not set -# CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1029 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ADT7410 is not set -# CONFIG_SENSORS_ADT7411 is not set -# CONFIG_SENSORS_ADT7462 is not set -# CONFIG_SENSORS_ADT7470 is not set -# CONFIG_SENSORS_ADT7475 is not set -# CONFIG_SENSORS_ASC7621 is not set -# CONFIG_SENSORS_ATXP1 is not set -# CONFIG_SENSORS_DS620 is not set -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_F75375S is not set -# CONFIG_SENSORS_G760A is not set -# CONFIG_SENSORS_G762 is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set CONFIG_SENSORS_GPIO_FAN=y -# CONFIG_SENSORS_HIH6130 is not set -# CONFIG_SENSORS_HTU21 is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_JC42 is not set -# CONFIG_SENSORS_LINEAGE is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM73 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -# CONFIG_SENSORS_LM90 is not set -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_LM93 is not set -# CONFIG_SENSORS_LTC4151 is not set -# CONFIG_SENSORS_LTC4215 is not set -# CONFIG_SENSORS_LTC4245 is not set -# CONFIG_SENSORS_LTC4261 is not set -# CONFIG_SENSORS_LM95234 is not set -# CONFIG_SENSORS_LM95241 is not set -# CONFIG_SENSORS_LM95245 is not set -# CONFIG_SENSORS_MAX16065 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_MAX1668 is not set -# CONFIG_SENSORS_MAX197 is not set -# CONFIG_SENSORS_MAX6639 is not set -# CONFIG_SENSORS_MAX6642 is not set -# CONFIG_SENSORS_MAX6650 is not set -# CONFIG_SENSORS_MAX6697 is not set -# CONFIG_SENSORS_MCP3021 is not set -# CONFIG_SENSORS_NCT6775 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_PMBUS is not set -# CONFIG_SENSORS_SHT15 is not set -# CONFIG_SENSORS_SHT21 is not set -# CONFIG_SENSORS_SMM665 is not set -# CONFIG_SENSORS_DME1737 is not set -# CONFIG_SENSORS_EMC1403 is not set -# CONFIG_SENSORS_EMC2103 is not set -# CONFIG_SENSORS_EMC6W201 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47M192 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_SCH56XX_COMMON is not set -# CONFIG_SENSORS_ADS1015 is not set -# CONFIG_SENSORS_ADS7828 is not set -# CONFIG_SENSORS_AMC6821 is not set -# CONFIG_SENSORS_INA209 is not set CONFIG_SENSORS_INA2XX=y -# CONFIG_SENSORS_THMC50 is not set -# CONFIG_SENSORS_TMP102 is not set -# CONFIG_SENSORS_TMP401 is not set -# CONFIG_SENSORS_TMP421 is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83791D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83793 is not set -# CONFIG_SENSORS_W83795 is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83L786NG is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set CONFIG_THERMAL=y -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set -# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set -# CONFIG_THERMAL_GOV_FAIR_SHARE is not set -CONFIG_THERMAL_GOV_STEP_WISE=y -# CONFIG_THERMAL_GOV_USER_SPACE is not set CONFIG_CPU_THERMAL=y CONFIG_THERMAL_EMULATION=y - -# -# Texas Instruments thermal drivers -# -# CONFIG_TI_SOC_THERMAL is not set - -# -# Samsung thermal drivers -# CONFIG_EXYNOS_THERMAL=y CONFIG_EXYNOS_THERMAL_CORE=y -# CONFIG_WATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -# CONFIG_SSB is not set -CONFIG_BCMA_POSSIBLE=y - -# -# Broadcom specific AMBA -# -# CONFIG_BCMA is not set - -# -# Multifunction device drivers -# -CONFIG_MFD_CORE=y -# CONFIG_MFD_AS3711 is not set -# CONFIG_MFD_AS3722 is not set -# CONFIG_PMIC_ADP5520 is not set -# CONFIG_MFD_AAT2870_CORE is not set -# CONFIG_MFD_CROS_EC is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_MFD_DA9052_I2C is not set -# CONFIG_MFD_DA9055 is not set -# CONFIG_MFD_DA9063 is not set -# CONFIG_MFD_MC13XXX_I2C is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_HTC_I2CPLD is not set -# CONFIG_MFD_KEMPLD is not set -# CONFIG_MFD_88PM800 is not set -# CONFIG_MFD_88PM805 is not set -# CONFIG_MFD_88PM860X is not set -# CONFIG_MFD_MAX77686 is not set CONFIG_MFD_MAX77XXX=y -# CONFIG_MFD_MAX77693 is not set -# CONFIG_MFD_MAX8907 is not set -# CONFIG_MFD_MAX8925 is not set -# CONFIG_MFD_MAX8997 is not set -# CONFIG_MFD_MAX8998 is not set -# CONFIG_MFD_VIPERBOARD is not set -# CONFIG_MFD_RETU is not set -# CONFIG_MFD_PCF50633 is not set -# CONFIG_MFD_RC5T583 is not set CONFIG_MFD_SEC_CORE=y -# CONFIG_MFD_SI476X_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_SMSC is not set -# CONFIG_ABX500_CORE is not set -# CONFIG_MFD_STMPE is not set -# CONFIG_MFD_SYSCON is not set -# CONFIG_MFD_TI_AM335X_TSCADC is not set -# CONFIG_MFD_LP8788 is not set -# CONFIG_MFD_PALMAS is not set -# CONFIG_TPS6105X is not set -# CONFIG_TPS65010 is not set -# CONFIG_TPS6507X is not set -# CONFIG_MFD_TPS65090 is not set -# CONFIG_MFD_TPS65217 is not set -# CONFIG_MFD_TPS6586X is not set -# CONFIG_MFD_TPS65910 is not set -# CONFIG_MFD_TPS65912 is not set -# CONFIG_MFD_TPS65912_I2C is not set -# CONFIG_MFD_TPS80031 is not set -# CONFIG_TWL4030_CORE is not set -# CONFIG_TWL6040_CORE is not set -# CONFIG_MFD_WL1273_CORE is not set -# CONFIG_MFD_LM3533 is not set -# CONFIG_MFD_TC3589X is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_MFD_ARIZONA_I2C is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM831X_I2C is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_WM8994 is not set -# CONFIG_MFD_HI6421_PMIC is not set -# CONFIG_VEXPRESS_CONFIG is not set CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set CONFIG_REGULATOR_FIXED_VOLTAGE=y -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set -# CONFIG_REGULATOR_AD5398 is not set -# CONFIG_REGULATOR_DA9210 is not set -# CONFIG_REGULATOR_FAN53555 is not set -# CONFIG_REGULATOR_GPIO is not set -# CONFIG_REGULATOR_ISL6271A is not set -# CONFIG_REGULATOR_LP3971 is not set -# CONFIG_REGULATOR_LP3972 is not set -# CONFIG_REGULATOR_LP872X is not set -# CONFIG_REGULATOR_LP8755 is not set -# CONFIG_REGULATOR_MAX1586 is not set -# CONFIG_REGULATOR_MAX8649 is not set -# CONFIG_REGULATOR_MAX8660 is not set -# CONFIG_REGULATOR_MAX8952 is not set -# CONFIG_REGULATOR_MAX8973 is not set CONFIG_REGULATOR_MAX77XXX=y -# CONFIG_REGULATOR_PFUZE100 is not set CONFIG_REGULATOR_S2MPS11=y -# CONFIG_REGULATOR_S5M8767 is not set -# CONFIG_REGULATOR_TPS51632 is not set -# CONFIG_REGULATOR_TPS62360 is not set -# CONFIG_REGULATOR_TPS65023 is not set -# CONFIG_REGULATOR_TPS6507X is not set CONFIG_MEDIA_SUPPORT=m - -# -# Multimedia core support -# -# CONFIG_MEDIA_CAMERA_SUPPORT is not set -# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y -# CONFIG_MEDIA_RADIO_SUPPORT is not set CONFIG_MEDIA_RC_SUPPORT=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -CONFIG_DVB_CORE=m -CONFIG_DVB_NET=y -CONFIG_TTPCI_EEPROM=m -CONFIG_DVB_MAX_ADAPTERS=8 -# CONFIG_DVB_DYNAMIC_MINORS is not set - -# -# Media drivers -# -CONFIG_RC_CORE=m -CONFIG_RC_MAP=m -CONFIG_RC_DECODERS=y -# CONFIG_LIRC is not set -CONFIG_IR_NEC_DECODER=m -CONFIG_IR_RC5_DECODER=m -CONFIG_IR_RC6_DECODER=m -CONFIG_IR_JVC_DECODER=m -CONFIG_IR_SONY_DECODER=m -CONFIG_IR_RC5_SZ_DECODER=m -CONFIG_IR_SANYO_DECODER=m -CONFIG_IR_MCE_KBD_DECODER=m CONFIG_RC_DEVICES=y -# CONFIG_RC_ATI_REMOTE is not set -# CONFIG_IR_IMON is not set -# CONFIG_IR_MCEUSB is not set -# CONFIG_IR_REDRAT3 is not set -# CONFIG_IR_STREAMZAP is not set -# CONFIG_IR_IGUANA is not set -# CONFIG_IR_TTUSBIR is not set -# CONFIG_RC_LOOPBACK is not set -# CONFIG_IR_GPIO_CIR is not set CONFIG_MEDIA_USB_SUPPORT=y - -# -# Analog/digital TV USB devices -# -# CONFIG_VIDEO_AU0828 is not set - -# -# Digital TV USB devices -# CONFIG_DVB_USB=m CONFIG_DVB_USB_DEBUG=y CONFIG_DVB_USB_A800=m @@ -2084,157 +247,8 @@ CONFIG_DVB_USB_IT913X=m CONFIG_DVB_USB_LME2510=m CONFIG_DVB_USB_MXL111SF=m CONFIG_DVB_USB_RTL28XXU=m -# CONFIG_SMS_USB_DRV is not set -# CONFIG_DVB_B2C2_FLEXCOP_USB is not set - -# -# Webcam, TV (analog/digital) USB devices -# - -# -# Supported MMC/SDIO adapters -# -# CONFIG_SMS_SDIO_DRV is not set -CONFIG_VIDEO_TVEEPROM=m -CONFIG_CYPRESS_FIRMWARE=m - -# -# Media ancillary drivers (tuners, sensors, i2c, frontends) -# -CONFIG_MEDIA_SUBDRV_AUTOSELECT=y -CONFIG_MEDIA_ATTACH=y -CONFIG_MEDIA_TUNER_SIMPLE=m -CONFIG_MEDIA_TUNER_TDA827X=m -CONFIG_MEDIA_TUNER_TDA18271=m -CONFIG_MEDIA_TUNER_TDA9887=m -CONFIG_MEDIA_TUNER_MT2060=m -CONFIG_MEDIA_TUNER_MT2063=m -CONFIG_MEDIA_TUNER_MT2266=m -CONFIG_MEDIA_TUNER_QT1010=m -CONFIG_MEDIA_TUNER_XC2028=m -CONFIG_MEDIA_TUNER_XC5000=m -CONFIG_MEDIA_TUNER_XC4000=m -CONFIG_MEDIA_TUNER_MXL5005S=m -CONFIG_MEDIA_TUNER_MXL5007T=m -CONFIG_MEDIA_TUNER_MC44S803=m -CONFIG_MEDIA_TUNER_MAX2165=m -CONFIG_MEDIA_TUNER_TDA18218=m -CONFIG_MEDIA_TUNER_FC0011=m -CONFIG_MEDIA_TUNER_FC0012=m -CONFIG_MEDIA_TUNER_FC0013=m -CONFIG_MEDIA_TUNER_TDA18212=m -CONFIG_MEDIA_TUNER_E4000=m -CONFIG_MEDIA_TUNER_FC2580=m -CONFIG_MEDIA_TUNER_TUA9001=m -CONFIG_MEDIA_TUNER_IT913X=m -CONFIG_MEDIA_TUNER_R820T=m - -# -# Multistandard (satellite) frontends -# -CONFIG_DVB_STB0899=m -CONFIG_DVB_STB6100=m -CONFIG_DVB_STV090x=m -CONFIG_DVB_STV6110x=m - -# -# Multistandard (cable + terrestrial) frontends -# -CONFIG_DVB_DRXK=m - -# -# DVB-S (satellite) frontends -# -CONFIG_DVB_MT312=m -CONFIG_DVB_ZL10039=m -CONFIG_DVB_STV0288=m -CONFIG_DVB_STB6000=m -CONFIG_DVB_STV0299=m -CONFIG_DVB_STV6110=m -CONFIG_DVB_STV0900=m -CONFIG_DVB_TDA10086=m -CONFIG_DVB_TDA826X=m -CONFIG_DVB_CX24116=m -CONFIG_DVB_SI21XX=m -CONFIG_DVB_TS2020=m -CONFIG_DVB_DS3000=m - -# -# DVB-T (terrestrial) frontends -# -CONFIG_DVB_CX22702=m -CONFIG_DVB_TDA1004X=m -CONFIG_DVB_NXT6000=m -CONFIG_DVB_MT352=m -CONFIG_DVB_ZL10353=m -CONFIG_DVB_DIB3000MB=m -CONFIG_DVB_DIB3000MC=m -CONFIG_DVB_DIB7000M=m -CONFIG_DVB_DIB7000P=m -CONFIG_DVB_TDA10048=m -CONFIG_DVB_AF9013=m -CONFIG_DVB_EC100=m -CONFIG_DVB_CXD2820R=m -CONFIG_DVB_RTL2830=m -CONFIG_DVB_RTL2832=m - -# -# DVB-C (cable) frontends -# -CONFIG_DVB_TDA10023=m - -# -# ATSC (North American/Korean Terrestrial/Cable DTV) frontends -# -CONFIG_DVB_LGDT330X=m -CONFIG_DVB_LGDT3305=m -CONFIG_DVB_LG2160=m -CONFIG_DVB_S5H1411=m - -# -# ISDB-T (terrestrial) frontends -# -CONFIG_DVB_DIB8000=m - -# -# Digital terrestrial only tuners/PLL -# -CONFIG_DVB_PLL=m -CONFIG_DVB_TUNER_DIB0070=m -CONFIG_DVB_TUNER_DIB0090=m - -# -# SEC control devices for DVB-S -# -CONFIG_DVB_LNBP21=m -CONFIG_DVB_LNBP22=m -CONFIG_DVB_ISL6423=m -CONFIG_DVB_LGS8GXX=m -CONFIG_DVB_ATBM8830=m -CONFIG_DVB_IX2505V=m -CONFIG_DVB_IT913X_FE=m -CONFIG_DVB_M88RS2000=m -CONFIG_DVB_AF9033=m - -# -# Tools to develop new frontends -# -# CONFIG_DVB_DUMMY_FE is not set - -# -# Graphics support -# CONFIG_DRM=y -CONFIG_DRM_KMS_HELPER=y -CONFIG_DRM_KMS_FB_HELPER=y CONFIG_DRM_LOAD_EDID_FIRMWARE=y - -# -# I2C encoder or helper chips -# -# CONFIG_DRM_I2C_CH7006 is not set -# CONFIG_DRM_I2C_SIL164 is not set -# CONFIG_DRM_I2C_NXP_TDA998X is not set CONFIG_DRM_EXYNOS=y CONFIG_DRM_EXYNOS_DMABUF=y CONFIG_DRM_EXYNOS_FIMD=y @@ -2244,300 +258,33 @@ CONFIG_DRM_EXYNOS_G2D=y CONFIG_DRM_EXYNOS_IPP=y CONFIG_DRM_EXYNOS_ROTATOR=y CONFIG_DRM_EXYNOS_GSC=y -# CONFIG_DRM_UDL is not set -# CONFIG_DRM_ARMADA is not set -# CONFIG_DRM_RCAR_DU is not set -# CONFIG_DRM_SHMOBILE is not set -# CONFIG_DRM_TILCDC is not set -# CONFIG_VGASTATE is not set CONFIG_VIDEO_OUTPUT_CONTROL=y -CONFIG_VIDEOMODE_HELPERS=y -CONFIG_HDMI=y -CONFIG_FB=y CONFIG_FIRMWARE_EDID=y -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -CONFIG_FB_MODE_HELPERS=y -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_ARMCLCD is not set -# CONFIG_FB_ARMHDLCD is not set -# CONFIG_FB_UVESA is not set -# CONFIG_FB_S1D13XXX is not set -# CONFIG_FB_TMIO is not set -# CONFIG_FB_S3C is not set -# CONFIG_FB_SMSCUFX is not set -# CONFIG_FB_UDL is not set -# CONFIG_FB_GOLDFISH is not set -# CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_BROADSHEET is not set -# CONFIG_FB_AUO_K190X is not set -# CONFIG_FB_SIMPLE is not set CONFIG_EXYNOS_VIDEO=y CONFIG_EXYNOS_MIPI_DSI=y CONFIG_EXYNOS_DP=y -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Console display driver support -# -CONFIG_DUMMY_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set CONFIG_LOGO=y -CONFIG_LOGO_LINUX_MONO=y -CONFIG_LOGO_LINUX_VGA16=y -CONFIG_LOGO_LINUX_CLUT224=y -# CONFIG_FB_SSD1307 is not set CONFIG_SOUND=y -# CONFIG_SOUND_OSS_CORE is not set CONFIG_SND=y -CONFIG_SND_TIMER=y -CONFIG_SND_PCM=y -CONFIG_SND_COMPRESS_OFFLOAD=y -CONFIG_SND_JACK=y -# CONFIG_SND_SEQUENCER is not set -# CONFIG_SND_MIXER_OSS is not set -# CONFIG_SND_PCM_OSS is not set -# CONFIG_SND_HRTIMER is not set -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -# CONFIG_SND_RAWMIDI_SEQ is not set -# CONFIG_SND_OPL3_LIB_SEQ is not set -# CONFIG_SND_OPL4_LIB_SEQ is not set -# CONFIG_SND_SBAWE_SEQ is not set -# CONFIG_SND_EMU10K1_SEQ is not set -CONFIG_SND_DRIVERS=y -# CONFIG_SND_DUMMY is not set -# CONFIG_SND_ALOOP is not set -# CONFIG_SND_MTPAV is not set -# CONFIG_SND_SERIAL_U16550 is not set -# CONFIG_SND_MPU401 is not set -CONFIG_SND_ARM=y -# CONFIG_SND_ARMAACI is not set -CONFIG_SND_USB=y -# CONFIG_SND_USB_AUDIO is not set -# CONFIG_SND_USB_UA101 is not set -# CONFIG_SND_USB_CAIAQ is not set -# CONFIG_SND_USB_6FIRE is not set -# CONFIG_SND_USB_HIFACE is not set CONFIG_SND_SOC=y -# CONFIG_SND_ATMEL_SOC is not set -# CONFIG_SND_DESIGNWARE_I2S is not set CONFIG_SND_SOC_SAMSUNG=y -CONFIG_SND_SAMSUNG_I2S=y -# CONFIG_SND_SOC_SAMSUNG_SMDK_WM8994 is not set -# CONFIG_SND_SOC_SAMSUNG_SMDK_SPDIF is not set -# CONFIG_SND_SOC_SMDK_WM8994_PCM is not set +CONFIG_SND_SOC_SAMSUNG_HDMI_AUDIO=m CONFIG_SND_SOC_SMDK_I2S_STUB=y -CONFIG_SND_SOC_I2C_AND_SPI=y -CONFIG_SND_SOC_I2S_STUB=y -# CONFIG_SND_SIMPLE_CARD is not set -# CONFIG_SOUND_PRIME is not set - -# -# HID support -# -CONFIG_HID=y -# CONFIG_HID_BATTERY_STRENGTH is not set +CONFIG_SND_SOC_EXYNOS_MAX98095=y CONFIG_HIDRAW=y -# CONFIG_UHID is not set -CONFIG_HID_GENERIC=y - -# -# Special HID drivers -# -# CONFIG_HID_A4TECH is not set -# CONFIG_HID_ACRUX is not set -# CONFIG_HID_APPLE is not set -# CONFIG_HID_APPLEIR is not set -# CONFIG_HID_AUREAL is not set -# CONFIG_HID_BELKIN is not set -# CONFIG_HID_CHERRY is not set -# CONFIG_HID_CHICONY is not set -# CONFIG_HID_PRODIKEYS is not set -# CONFIG_HID_CYPRESS is not set -# CONFIG_HID_DRAGONRISE is not set -# CONFIG_HID_EMS_FF is not set -# CONFIG_HID_ELECOM is not set -# CONFIG_HID_ELO is not set -# CONFIG_HID_EZKEY is not set -# CONFIG_HID_HOLTEK is not set -# CONFIG_HID_HUION is not set -# CONFIG_HID_KEYTOUCH is not set -# CONFIG_HID_KYE is not set -# CONFIG_HID_UCLOGIC is not set -# CONFIG_HID_WALTOP is not set -# CONFIG_HID_GYRATION is not set -# CONFIG_HID_ICADE is not set -# CONFIG_HID_TWINHAN is not set -# CONFIG_HID_KENSINGTON is not set -# CONFIG_HID_LCPOWER is not set -# CONFIG_HID_LENOVO_TPKBD is not set -# CONFIG_HID_LOGITECH is not set -# CONFIG_HID_MAGICMOUSE is not set -# CONFIG_HID_MICROSOFT is not set -# CONFIG_HID_MONTEREY is not set -# CONFIG_HID_MULTITOUCH is not set -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_ORTEK is not set -# CONFIG_HID_PANTHERLORD is not set -# CONFIG_HID_PETALYNX is not set -# CONFIG_HID_PICOLCD is not set -# CONFIG_HID_PRIMAX is not set -# CONFIG_HID_ROCCAT is not set -# CONFIG_HID_SAITEK is not set -# CONFIG_HID_SAMSUNG is not set -# CONFIG_HID_SONY is not set -# CONFIG_HID_SPEEDLINK is not set -# CONFIG_HID_STEELSERIES is not set -# CONFIG_HID_SUNPLUS is not set -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_SMARTJOYPLUS is not set -# CONFIG_HID_TIVO is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_HID_THINGM is not set -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_WACOM is not set -# CONFIG_HID_WIIMOTE is not set -# CONFIG_HID_XINMO is not set -# CONFIG_HID_ZEROPLUS is not set -# CONFIG_HID_ZYDACRON is not set -# CONFIG_HID_SENSOR_HUB is not set - -# -# USB HID support -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set CONFIG_USB_HIDDEV=y - -# -# I2C HID support -# -# CONFIG_I2C_HID is not set -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -CONFIG_USB_ARCH_HAS_XHCI=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_COMMON=y -CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB=y -# CONFIG_USB_DEBUG is not set CONFIG_USB_ANNOUNCE_NEW_DEVICES=y - -# -# Miscellaneous USB options -# -CONFIG_USB_DEFAULT_PERSIST=y -# CONFIG_USB_DYNAMIC_MINORS is not set -# CONFIG_USB_OTG is not set -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -# CONFIG_USB_MON is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_PLATFORM=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y -CONFIG_USB_EHCI_TT_NEWSCHED=y CONFIG_USB_EHCI_EXYNOS=y -# CONFIG_USB_EHCI_HCD_PLATFORM is not set -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -# CONFIG_USB_ISP1362_HCD is not set -# CONFIG_USB_FUSBH200_HCD is not set -# CONFIG_USB_FOTG210_HCD is not set CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_EXYNOS=y -# CONFIG_USB_OHCI_HCD_PLATFORM is not set -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HCD_TEST_MODE is not set -# CONFIG_USB_MUSB_HDRC is not set -# CONFIG_USB_RENESAS_USBHS is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set -CONFIG_USB_WDM=m -# CONFIG_USB_TMC is not set - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may -# - -# -# also be needed; see USB_STORAGE Help for more info -# CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_REALTEK is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_STORAGE_ENE_UB6250 is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set CONFIG_USB_DWC3=y -# CONFIG_USB_DWC3_HOST is not set -# CONFIG_USB_DWC3_GADGET is not set -CONFIG_USB_DWC3_DUAL_ROLE=y - -# -# Platform Glue Driver Support -# # CONFIG_USB_DWC3_OMAP is not set -CONFIG_USB_DWC3_EXYNOS=y - -# -# Debugging features -# -# CONFIG_USB_DWC3_DEBUG is not set -# CONFIG_USB_CHIPIDEA is not set - -# -# USB port drivers -# CONFIG_USB_SERIAL=m CONFIG_USB_SERIAL_GENERIC=y CONFIG_USB_SERIAL_SIMPLE=m @@ -2562,18 +309,6 @@ CONFIG_USB_SERIAL_IPW=m CONFIG_USB_SERIAL_IUU=m CONFIG_USB_SERIAL_KEYSPAN_PDA=m CONFIG_USB_SERIAL_KEYSPAN=m -# CONFIG_USB_SERIAL_KEYSPAN_MPR is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19QW is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA19QI is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set -# CONFIG_USB_SERIAL_KEYSPAN_USA49WLC is not set CONFIG_USB_SERIAL_KLSI=m CONFIG_USB_SERIAL_KOBIL_SCT=m CONFIG_USB_SERIAL_MCT_U232=m @@ -2586,13 +321,11 @@ CONFIG_USB_SERIAL_OTI6858=m CONFIG_USB_SERIAL_QCAUX=m CONFIG_USB_SERIAL_QUALCOMM=m CONFIG_USB_SERIAL_SPCP8X5=m -# CONFIG_USB_SERIAL_SAFE is not set CONFIG_USB_SERIAL_SIERRAWIRELESS=m CONFIG_USB_SERIAL_SYMBOL=m CONFIG_USB_SERIAL_TI=m CONFIG_USB_SERIAL_CYBERJACK=m CONFIG_USB_SERIAL_XIRCOM=m -CONFIG_USB_SERIAL_WWAN=m CONFIG_USB_SERIAL_OPTION=m CONFIG_USB_SERIAL_OMNINET=m CONFIG_USB_SERIAL_OPTICON=m @@ -2601,954 +334,84 @@ CONFIG_USB_SERIAL_WISHBONE=m CONFIG_USB_SERIAL_ZTE=m CONFIG_USB_SERIAL_SSU100=m CONFIG_USB_SERIAL_QT2=m -# CONFIG_USB_SERIAL_DEBUG is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_TEST is not set -# CONFIG_USB_EHSET_TEST_FIXTURE is not set -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_YUREX is not set -CONFIG_USB_EZUSB_FX2=m CONFIG_USB_HSIC_USB3503=y - -# -# USB Physical Layer drivers -# -# CONFIG_USB_OTG_WAKELOCK is not set -CONFIG_USB_PHY=y -# CONFIG_NOP_USB_XCEIV is not set -# CONFIG_AM335X_PHY_USB is not set -CONFIG_SAMSUNG_USBPHY=y CONFIG_SAMSUNG_USB2PHY=y CONFIG_SAMSUNG_USB3PHY=y -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_USB_ISP1301 is not set -# CONFIG_USB_RCAR_PHY is not set -# CONFIG_USB_ULPI is not set CONFIG_USB_GADGET=y -# CONFIG_USB_GADGET_DEBUG is not set -# CONFIG_USB_GADGET_DEBUG_FILES is not set -# CONFIG_USB_GADGET_DEBUG_FS is not set -CONFIG_USB_GADGET_VBUS_DRAW=2 -CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 - -# -# USB Peripheral Controller -# -# CONFIG_USB_FOTG210_UDC is not set -# CONFIG_USB_R8A66597 is not set -# CONFIG_USB_PXA27X is not set -# CONFIG_USB_S3C_HSOTG is not set -# CONFIG_USB_MV_UDC is not set -# CONFIG_USB_MV_U3D is not set -# CONFIG_USB_M66592 is not set -# CONFIG_USB_NET2272 is not set -# CONFIG_USB_DUMMY_HCD is not set -CONFIG_USB_LIBCOMPOSITE=m -CONFIG_USB_F_ACM=m -CONFIG_USB_U_SERIAL=m -CONFIG_USB_F_SERIAL=m -CONFIG_USB_F_OBEX=m -# CONFIG_USB_CONFIGFS is not set -# CONFIG_USB_ZERO is not set -# CONFIG_USB_AUDIO is not set -# CONFIG_USB_ETH is not set -# CONFIG_USB_G_NCM is not set -# CONFIG_USB_GADGETFS is not set -# CONFIG_USB_FUNCTIONFS is not set -# CONFIG_USB_MASS_STORAGE is not set CONFIG_USB_G_SERIAL=m -# CONFIG_USB_MIDI_GADGET is not set -# CONFIG_USB_G_PRINTER is not set -# CONFIG_USB_CDC_COMPOSITE is not set -# CONFIG_USB_G_ACM_MS is not set -# CONFIG_USB_G_MULTI is not set -# CONFIG_USB_G_HID is not set -# CONFIG_USB_G_DBGP is not set CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set CONFIG_MMC_UNSAFE_RESUME=y -# CONFIG_MMC_CLKGATE is not set -# CONFIG_MMC_EMBEDDED_SDIO is not set -# CONFIG_MMC_PARANOID_SD_INIT is not set - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_MINORS=8 -CONFIG_MMC_BLOCK_BOUNCE=y -# CONFIG_MMC_BLOCK_DEFERRED_RESUME is not set -# CONFIG_SDIO_UART is not set -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_ARMMMCI is not set -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_SDHCI_PXAV3 is not set -# CONFIG_MMC_SDHCI_PXAV2 is not set CONFIG_MMC_DW=y CONFIG_MMC_DW_IDMAC=y -CONFIG_MMC_DW_PLTFM=y CONFIG_MMC_DW_EXYNOS=y -# CONFIG_MMC_DW_K3 is not set -# CONFIG_MMC_VUB300 is not set -# CONFIG_MMC_USHC is not set -# CONFIG_MEMSTICK is not set -CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y - -# -# LED drivers -# -# CONFIG_LEDS_LM3530 is not set -# CONFIG_LEDS_LM3642 is not set -# CONFIG_LEDS_PCA9532 is not set CONFIG_LEDS_GPIO=y -# CONFIG_LEDS_LP3944 is not set -# CONFIG_LEDS_LP5521 is not set -# CONFIG_LEDS_LP5523 is not set -# CONFIG_LEDS_LP5562 is not set -# CONFIG_LEDS_LP8501 is not set -# CONFIG_LEDS_PCA955X is not set -# CONFIG_LEDS_PCA963X is not set -# CONFIG_LEDS_PCA9685 is not set CONFIG_LEDS_PWM=y -# CONFIG_LEDS_REGULATOR is not set -# CONFIG_LEDS_BD2802 is not set -# CONFIG_LEDS_LT3593 is not set -# CONFIG_LEDS_TCA6507 is not set -# CONFIG_LEDS_LM355x is not set -# CONFIG_LEDS_OT200 is not set -# CONFIG_LEDS_BLINKM is not set - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_TIMER=y CONFIG_LEDS_TRIGGER_ONESHOT=y CONFIG_LEDS_TRIGGER_HEARTBEAT=y -# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set CONFIG_LEDS_TRIGGER_CPU=y CONFIG_LEDS_TRIGGER_GPIO=y CONFIG_LEDS_TRIGGER_DEFAULT_ON=y - -# -# iptables trigger is under Netfilter config (LED target) -# CONFIG_LEDS_TRIGGER_TRANSIENT=y -# CONFIG_LEDS_TRIGGER_CAMERA is not set -# CONFIG_SWITCH is not set -# CONFIG_ACCESSIBILITY is not set -# CONFIG_EDAC is not set -CONFIG_RTC_LIB=y CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_SYSTOHC=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_DS3232 is not set -# CONFIG_RTC_DRV_MAX6900 is not set CONFIG_RTC_DRV_MAX77XXX=y -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_ISL12022 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF2127 is not set -# CONFIG_RTC_DRV_PCF8523 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_BQ32K is not set -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set -# CONFIG_RTC_DRV_RX8025 is not set -# CONFIG_RTC_DRV_EM3027 is not set -# CONFIG_RTC_DRV_RV3029C2 is not set -# CONFIG_RTC_DRV_S5M is not set - -# -# SPI RTC drivers -# - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_MSM6242 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_RP5C01 is not set -# CONFIG_RTC_DRV_V3020 is not set -# CONFIG_RTC_DRV_DS2404 is not set - -# -# on-CPU RTC drivers -# -CONFIG_HAVE_S3C_RTC=y -# CONFIG_RTC_DRV_S3C is not set -# CONFIG_RTC_DRV_PL030 is not set -# CONFIG_RTC_DRV_PL031 is not set -# CONFIG_RTC_DRV_SNVS is not set -# CONFIG_RTC_DRV_MOXART is not set - -# -# HID Sensor RTC drivers -# -# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set -CONFIG_DMADEVICES=y -# CONFIG_DMADEVICES_DEBUG is not set - -# -# DMA Devices -# -# CONFIG_AMBA_PL08X is not set -# CONFIG_DW_DMAC_CORE is not set -# CONFIG_DW_DMAC is not set -# CONFIG_TIMB_DMA is not set -CONFIG_PL330_DMA=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_OF=y - -# -# DMA Clients -# -# CONFIG_ASYNC_TX_DMA is not set -# CONFIG_DMATEST is not set -# CONFIG_AUXDISPLAY is not set -# CONFIG_UIO is not set CONFIG_VIRT_DRIVERS=y - -# -# Virtio drivers -# -# CONFIG_VIRTIO_MMIO is not set - -# -# Microsoft Hyper-V guest support -# CONFIG_STAGING=y -# CONFIG_USBIP_CORE is not set -# CONFIG_W35UND is not set -# CONFIG_PRISM2_USB is not set -# CONFIG_ECHO is not set -# CONFIG_COMEDI is not set -# CONFIG_RTLLIB is not set -# CONFIG_R8712U is not set CONFIG_R8188EU=m CONFIG_88EU_AP_MODE=y -# CONFIG_88EU_P2P is not set -# CONFIG_RTS5139 is not set -# CONFIG_TRANZPORT is not set -# CONFIG_LINE6_USB is not set -# CONFIG_USB_SERIAL_QUATECH2 is not set -# CONFIG_VT6656 is not set -# CONFIG_ZSMALLOC is not set -# CONFIG_USB_ENESTORAGE is not set -# CONFIG_BCM_WIMAX is not set -# CONFIG_FT1000 is not set - -# -# Speakup console speech -# -# CONFIG_SPEAKUP is not set -# CONFIG_TOUCHSCREEN_CLEARPAD_TM1217 is not set -# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set -# CONFIG_STAGING_MEDIA is not set - -# -# Android -# -# CONFIG_ANDROID is not set -# CONFIG_USB_WPAN_HCD is not set -# CONFIG_WIMAX_GDM72XX is not set -# CONFIG_LTE_GDM724X is not set -# CONFIG_CED1401 is not set -# CONFIG_DGRP is not set -# CONFIG_USB_DWC2 is not set -# CONFIG_LUSTRE_FS is not set -# CONFIG_XILLYBUS is not set -# CONFIG_DGAP is not set -CONFIG_CLKDEV_LOOKUP=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_COMMON_CLK=y - -# -# Common Clock Framework -# CONFIG_COMMON_CLK_DEBUG=y -# CONFIG_COMMON_CLK_SI5351 is not set -# CONFIG_COMMON_CLK_S2MPS11 is not set -CONFIG_HI3xxx_CLK_CORE=y - -# -# Hardware Spinlock drivers -# -CONFIG_CLKSRC_OF=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_CLKSRC_EXYNOS_MCT=y -CONFIG_CLKSRC_SAMSUNG_PWM=y -# CONFIG_MAILBOX is not set -CONFIG_IOMMU_SUPPORT=y -CONFIG_OF_IOMMU=y -# CONFIG_SHMOBILE_IOMMU is not set -# CONFIG_ARM_SMMU is not set - -# -# Remoteproc drivers -# -# CONFIG_STE_MODEM_RPROC is not set - -# -# Rpmsg drivers -# CONFIG_PM_DEVFREQ=y - -# -# DEVFREQ Governors -# -CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y CONFIG_DEVFREQ_GOV_PERFORMANCE=y CONFIG_DEVFREQ_GOV_POWERSAVE=y CONFIG_DEVFREQ_GOV_USERSPACE=y - -# -# DEVFREQ Drivers -# -# CONFIG_ARM_EXYNOS4_BUS_DEVFREQ is not set -# CONFIG_ARM_EXYNOS5_BUS_DEVFREQ is not set CONFIG_ARM_EXYNOS5410_BUS_DEVFREQ=y -# CONFIG_SAMSUNG_NOCP_MONITOR is not set CONFIG_EXTCON=y - -# -# Extcon Device Drivers -# -CONFIG_OF_EXTCON=y -# CONFIG_EXTCON_GPIO is not set -# CONFIG_MEMORY is not set -# CONFIG_IIO is not set CONFIG_PWM=y -CONFIG_PWM_SYSFS=y -# CONFIG_PWM_PCA9685 is not set CONFIG_PWM_SAMSUNG=y -CONFIG_IRQCHIP=y -CONFIG_ARM_GIC=y -CONFIG_GIC_NON_BANKED=y -# CONFIG_IPACK_BUS is not set -# CONFIG_RESET_CONTROLLER is not set -# CONFIG_FMC is not set - -# -# PHY Subsystem -# -CONFIG_GENERIC_PHY=y CONFIG_PHY_EXYNOS_MIPI_VIDEO=y CONFIG_PHY_EXYNOS_DP_VIDEO=y -# CONFIG_BCM_KONA_USB2_PHY is not set -# CONFIG_POWERCAP is not set -CONFIG_GATOR=m - -# -# File systems -# -CONFIG_DCACHE_WORD_ACCESS=y CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set CONFIG_EXT3_FS=y -CONFIG_EXT3_DEFAULTS_TO_ORDERED=y -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set CONFIG_EXT4_FS=y -# CONFIG_EXT4_FS_POSIX_ACL is not set -# CONFIG_EXT4_FS_SECURITY is not set -# CONFIG_EXT4_DEBUG is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_JBD2=y -# CONFIG_JBD2_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_XFS_FS is not set -# CONFIG_GFS2_FS is not set -# CONFIG_OCFS2_FS is not set CONFIG_BTRFS_FS=y -# CONFIG_BTRFS_FS_POSIX_ACL is not set -# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set -# CONFIG_BTRFS_FS_RUN_SANITY_TESTS is not set -# CONFIG_BTRFS_DEBUG is not set -# CONFIG_BTRFS_ASSERT is not set -# CONFIG_NILFS2_FS is not set -CONFIG_FS_POSIX_ACL=y -CONFIG_FILE_LOCKING=y -CONFIG_FSNOTIFY=y -CONFIG_DNOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_FANOTIFY is not set CONFIG_QUOTA=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_PRINT_QUOTA_WARNING=y -# CONFIG_QUOTA_DEBUG is not set -CONFIG_QUOTA_TREE=y -# CONFIG_QFMT_V1 is not set CONFIG_QFMT_V2=y -CONFIG_QUOTACTL=y CONFIG_AUTOFS4_FS=y -# CONFIG_FUSE_FS is not set -CONFIG_GENERIC_ACL=y - -# -# Caches -# -# CONFIG_FSCACHE is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=y CONFIG_MSDOS_FS=y CONFIG_VFAT_FS=y -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_SYSFS=y CONFIG_TMPFS=y CONFIG_TMPFS_POSIX_ACL=y -CONFIG_TMPFS_XATTR=y -# CONFIG_HUGETLBFS is not set -# CONFIG_HUGETLB_PAGE is not set -CONFIG_CONFIGFS_FS=m -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set CONFIG_ECRYPT_FS=y -# CONFIG_ECRYPT_FS_MESSAGING is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_LOGFS is not set CONFIG_CRAMFS=y -# CONFIG_SQUASHFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_QNX6FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_PSTORE is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -# CONFIG_F2FS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NFS_FS=y # CONFIG_NFS_V2 is not set -CONFIG_NFS_V3=y CONFIG_NFS_V3_ACL=y CONFIG_NFS_V4=y -# CONFIG_NFS_SWAP is not set -# CONFIG_NFS_V4_1 is not set CONFIG_ROOT_NFS=y -# CONFIG_NFS_USE_LEGACY_DNS is not set -CONFIG_NFS_USE_KERNEL_DNS=y -# CONFIG_NFSD is not set -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_ACL_SUPPORT=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -CONFIG_SUNRPC_GSS=y -# CONFIG_SUNRPC_DEBUG is not set -# CONFIG_CEPH_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set -CONFIG_NLS=y -CONFIG_NLS_DEFAULT="iso8859-1" CONFIG_NLS_CODEPAGE_437=y -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set CONFIG_NLS_ISO8859_1=y -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -# CONFIG_NLS_MAC_ROMAN is not set -# CONFIG_NLS_MAC_CELTIC is not set -# CONFIG_NLS_MAC_CENTEURO is not set -# CONFIG_NLS_MAC_CROATIAN is not set -# CONFIG_NLS_MAC_CYRILLIC is not set -# CONFIG_NLS_MAC_GAELIC is not set -# CONFIG_NLS_MAC_GREEK is not set -# CONFIG_NLS_MAC_ICELAND is not set -# CONFIG_NLS_MAC_INUIT is not set -# CONFIG_NLS_MAC_ROMANIAN is not set -# CONFIG_NLS_MAC_TURKISH is not set -# CONFIG_NLS_UTF8 is not set -# CONFIG_DLM is not set - -# -# Kernel hacking -# - -# -# printk and dmesg options -# CONFIG_PRINTK_TIME=y -CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_DYNAMIC_DEBUG is not set - -# -# Compile-time checks and compiler options -# -# CONFIG_DEBUG_INFO is not set -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=1024 -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_READABLE_ASM is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -# CONFIG_DEBUG_SECTION_MISMATCH is not set -# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set CONFIG_MAGIC_SYSRQ=y -CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1 -CONFIG_DEBUG_KERNEL=y - -# -# Memory Debugging -# -# CONFIG_DEBUG_PAGEALLOC is not set -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_SLAB is not set -CONFIG_HAVE_DEBUG_KMEMLEAK=y -# CONFIG_DEBUG_KMEMLEAK is not set -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_PER_CPU_MAPS is not set -# CONFIG_DEBUG_HIGHMEM is not set -# CONFIG_DEBUG_SHIRQ is not set - -# -# Debug Lockups and Hangs -# -# CONFIG_LOCKUP_DETECTOR is not set CONFIG_DETECT_HUNG_TASK=y -CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -# CONFIG_PANIC_ON_OOPS is not set -CONFIG_PANIC_ON_OOPS_VALUE=0 -CONFIG_SCHED_DEBUG=y CONFIG_SCHEDSTATS=y CONFIG_TIMER_STATS=y - -# -# Lock Debugging (spinlocks, mutexes, etc...) -# CONFIG_DEBUG_RT_MUTEXES=y -CONFIG_DEBUG_PI_LIST=y -# CONFIG_RT_MUTEX_TESTER is not set CONFIG_DEBUG_SPINLOCK=y CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_ATOMIC_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -CONFIG_STACKTRACE=y -# CONFIG_DEBUG_KOBJECT is not set -CONFIG_DEBUG_BUGVERBOSE=y -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_CREDENTIALS is not set - -# -# RCU Debugging -# -# CONFIG_SPARSE_RCU_POINTER is not set -# CONFIG_RCU_TORTURE_TEST is not set -CONFIG_RCU_CPU_STALL_TIMEOUT=21 -# CONFIG_RCU_CPU_STALL_INFO is not set -# CONFIG_RCU_TRACE is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_NOTIFIER_ERROR_INJECTION is not set -# CONFIG_FAULT_INJECTION is not set -CONFIG_NOP_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_TRACE_CLOCK=y -CONFIG_RING_BUFFER=y -CONFIG_EVENT_TRACING=y -CONFIG_CONTEXT_SWITCH_TRACER=y -CONFIG_RING_BUFFER_ALLOW_SWAP=y -CONFIG_TRACING=y -CONFIG_GENERIC_TRACER=y -CONFIG_TRACING_SUPPORT=y -CONFIG_FTRACE=y CONFIG_FUNCTION_TRACER=y -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_FTRACE_SYSCALLS is not set -# CONFIG_TRACER_SNAPSHOT is not set -CONFIG_BRANCH_PROFILE_NONE=y -# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set -# CONFIG_PROFILE_ALL_BRANCHES is not set -# CONFIG_STACK_TRACER is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_UPROBE_EVENT is not set -# CONFIG_PROBE_EVENTS is not set -CONFIG_DYNAMIC_FTRACE=y -# CONFIG_FUNCTION_PROFILER is not set -CONFIG_FTRACE_MCOUNT_RECORD=y -# CONFIG_FTRACE_STARTUP_TEST is not set -# CONFIG_RING_BUFFER_BENCHMARK is not set -# CONFIG_RING_BUFFER_STARTUP_TEST is not set - -# -# Runtime Testing -# -# CONFIG_LKDTM is not set -# CONFIG_TEST_LIST_SORT is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_RBTREE_TEST is not set -# CONFIG_INTERVAL_TREE_TEST is not set -# CONFIG_PERCPU_TEST is not set -# CONFIG_ATOMIC64_SELFTEST is not set -# CONFIG_TEST_STRING_HELPERS is not set -# CONFIG_TEST_KSTRTOX is not set -# CONFIG_DMA_API_DEBUG is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set CONFIG_STRICT_DEVMEM=y -CONFIG_ARM_UNWIND=y CONFIG_DEBUG_USER=y -# CONFIG_DEBUG_RODATA is not set -# CONFIG_DEBUG_LL is not set -CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" -# CONFIG_DEBUG_UART_PL01X is not set -# CONFIG_DEBUG_UART_8250 is not set -CONFIG_UNCOMPRESS_INCLUDE="mach/uncompress.h" -# CONFIG_OC_ETM is not set -# CONFIG_PID_IN_CONTEXTIDR is not set - -# -# Security options -# -CONFIG_KEYS=y -# CONFIG_PERSISTENT_KEYRINGS is not set -# CONFIG_BIG_KEYS is not set -# CONFIG_ENCRYPTED_KEYS is not set -# CONFIG_KEYS_DEBUG_PROC_KEYS is not set -# CONFIG_SECURITY_DMESG_RESTRICT is not set CONFIG_SECURITY=y -CONFIG_SECURITYFS=y -CONFIG_SECURITY_NETWORK=y -# CONFIG_SECURITY_NETWORK_XFRM is not set -CONFIG_SECURITY_PATH=y CONFIG_LSM_MMAP_MIN_ADDR=0 CONFIG_SECURITY_SELINUX=y -# CONFIG_SECURITY_SELINUX_BOOTPARAM is not set -# CONFIG_SECURITY_SELINUX_DISABLE is not set -CONFIG_SECURITY_SELINUX_DEVELOP=y -CONFIG_SECURITY_SELINUX_AVC_STATS=y -CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 -# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set CONFIG_SECURITY_SMACK=y -# CONFIG_SECURITY_TOMOYO is not set CONFIG_SECURITY_APPARMOR=y -CONFIG_SECURITY_APPARMOR_BOOTPARAM_VALUE=1 -CONFIG_SECURITY_APPARMOR_HASH=y -# CONFIG_SECURITY_YAMA is not set -# CONFIG_IMA is not set -# CONFIG_EVM is not set -# CONFIG_DEFAULT_SECURITY_SELINUX is not set -# CONFIG_DEFAULT_SECURITY_SMACK is not set CONFIG_DEFAULT_SECURITY_APPARMOR=y -# CONFIG_DEFAULT_SECURITY_DAC is not set -CONFIG_DEFAULT_SECURITY="apparmor" -CONFIG_XOR_BLOCKS=y -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD=m -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG=m -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_PCOMP2=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -# CONFIG_CRYPTO_USER is not set -CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y -# CONFIG_CRYPTO_GF128MUL is not set -# CONFIG_CRYPTO_NULL is not set -# CONFIG_CRYPTO_PCRYPT is not set -CONFIG_CRYPTO_WORKQUEUE=y -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_AUTHENC is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Authenticated Encryption with Associated Data -# -CONFIG_CRYPTO_CCM=m -# CONFIG_CRYPTO_GCM is not set -CONFIG_CRYPTO_SEQIV=m - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CTR=m -# CONFIG_CRYPTO_CTS is not set -CONFIG_CRYPTO_ECB=y -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_PCBC is not set -# CONFIG_CRYPTO_XTS is not set - -# -# Hash modes -# -# CONFIG_CRYPTO_CMAC is not set -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -# CONFIG_CRYPTO_CRC32 is not set -CONFIG_CRYPTO_CRCT10DIF=y -# CONFIG_CRYPTO_GHASH is not set -# CONFIG_CRYPTO_MD4 is not set -CONFIG_CRYPTO_MD5=y CONFIG_CRYPTO_MICHAEL_MIC=y -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -CONFIG_CRYPTO_SHA1=y -# CONFIG_CRYPTO_SHA1_ARM is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -CONFIG_CRYPTO_AES=y -# CONFIG_CRYPTO_AES_ARM is not set -# CONFIG_CRYPTO_ANUBIS is not set -CONFIG_CRYPTO_ARC4=m -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_DES is not set -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_ZLIB is not set -# CONFIG_CRYPTO_LZO is not set -# CONFIG_CRYPTO_LZ4 is not set -# CONFIG_CRYPTO_LZ4HC is not set - -# -# Random Number Generation -# -CONFIG_CRYPTO_ANSI_CPRNG=m -# CONFIG_CRYPTO_USER_API_HASH is not set -# CONFIG_CRYPTO_USER_API_SKCIPHER is not set -CONFIG_CRYPTO_HW=y -# CONFIG_ASYMMETRIC_KEY_TYPE is not set -CONFIG_BINARY_PRINTF=y - -# -# Library routines -# -CONFIG_RAID6_PQ=y -CONFIG_BITREVERSE=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_NET_UTILS=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_IO=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_CRC_CCITT=y -CONFIG_CRC16=y CONFIG_CRC_T10DIF=y CONFIG_CRC_ITU_T=y -CONFIG_CRC32=y -# CONFIG_CRC32_SELFTEST is not set -CONFIG_CRC32_SLICEBY8=y -# CONFIG_CRC32_SLICEBY4 is not set -# CONFIG_CRC32_SARWATE is not set -# CONFIG_CRC32_BIT is not set CONFIG_CRC7=y -CONFIG_LIBCRC32C=y -# CONFIG_CRC8 is not set -CONFIG_AUDIT_GENERIC=y -# CONFIG_RANDOM32_SELFTEST is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_XZ_DEC=y -# CONFIG_XZ_DEC_X86 is not set -# CONFIG_XZ_DEC_POWERPC is not set -# CONFIG_XZ_DEC_IA64 is not set -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_ARMTHUMB=y -# CONFIG_XZ_DEC_SPARC is not set -CONFIG_XZ_DEC_BCJ=y -# CONFIG_XZ_DEC_TEST is not set -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_XZ=y -CONFIG_ASSOCIATIVE_ARRAY=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_DMA=y -CONFIG_CPU_RMAP=y -CONFIG_DQL=y -CONFIG_NLATTR=y -CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y -CONFIG_AVERAGE=y -# CONFIG_CORDIC is not set -# CONFIG_DDR is not set -CONFIG_OID_REGISTRY=y -CONFIG_FONT_SUPPORT=y -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_HAVE_KVM_IRQCHIP=y -CONFIG_KVM_MMIO=y -CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y CONFIG_VIRTUALIZATION=y CONFIG_KVM=y -CONFIG_KVM_ARM_HOST=y -CONFIG_KVM_ARM_MAX_VCPUS=4 -CONFIG_KVM_ARM_VGIC=y -CONFIG_KVM_ARM_TIMER=y diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c index e61df85d650e14..db921a2d77ed51 100644 --- a/arch/arm/mach-exynos/firmware.c +++ b/arch/arm/mach-exynos/firmware.c @@ -37,7 +37,12 @@ static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr) { void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c; - if (!soc_is_exynos5420()) + /* + * Almost all Exynos-series of SoCs that run in secure mode don't need + * additional offset for every CPU, with Exynos4412 being the only + * exception. + */ + if (soc_is_exynos4412()) boot_reg += 4 * cpu; writel_relaxed(boot_addr, boot_reg); diff --git a/drivers/clk/samsung/clk-exynos-audss.c b/drivers/clk/samsung/clk-exynos-audss.c index 68e515d093d864..884187fbfe0066 100644 --- a/drivers/clk/samsung/clk-exynos-audss.c +++ b/drivers/clk/samsung/clk-exynos-audss.c @@ -14,9 +14,17 @@ #include #include #include +#include +#include #include +enum exynos_audss_clk_type { + TYPE_EXYNOS4210, + TYPE_EXYNOS5250, + TYPE_EXYNOS5420, +}; + static DEFINE_SPINLOCK(lock); static struct clk **clk_table; static void __iomem *reg_base; @@ -26,10 +34,6 @@ static struct clk_onecell_data clk_data; #define ASS_CLK_DIV 0x4 #define ASS_CLK_GATE 0x8 -/* list of all parent clock list */ -static const char *mout_audss_p[] = { "fin_pll", "fout_epll" }; -static const char *mout_i2s_p[] = { "mout_audss", "cdclk0", "sclk_audio0" }; - #ifdef CONFIG_PM_SLEEP static unsigned long reg_save[][2] = { {ASS_CLK_SRC, 0}, @@ -61,31 +65,69 @@ static struct syscore_ops exynos_audss_clk_syscore_ops = { }; #endif /* CONFIG_PM_SLEEP */ +static const struct of_device_id exynos_audss_clk_of_match[] = { + { .compatible = "samsung,exynos4210-audss-clock", + .data = (void *)TYPE_EXYNOS4210, }, + { .compatible = "samsung,exynos5250-audss-clock", + .data = (void *)TYPE_EXYNOS5250, }, + { .compatible = "samsung,exynos5420-audss-clock", + .data = (void *)TYPE_EXYNOS5420, }, + {}, +}; + /* register exynos_audss clocks */ -static void __init exynos_audss_clk_init(struct device_node *np) +static int exynos_audss_clk_probe(struct platform_device *pdev) { - reg_base = of_iomap(np, 0); - if (!reg_base) { - pr_err("%s: failed to map audss registers\n", __func__); - return; + int i, ret = 0; + struct resource *res; + const char *mout_audss_p[] = {"fin_pll", "fout_epll"}; + const char *mout_i2s_p[] = {"mout_audss", "cdclk0", "sclk_audio0"}; + const char *sclk_pcm_p = "sclk_pcm0"; + struct clk *pll_ref, *pll_in, *cdclk, *sclk_audio, *sclk_pcm_in; + const struct of_device_id *match; + enum exynos_audss_clk_type variant; + + match = of_match_node(exynos_audss_clk_of_match, pdev->dev.of_node); + if (!match) + return -EINVAL; + variant = (enum exynos_audss_clk_type)match->data; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + reg_base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(reg_base)) { + dev_err(&pdev->dev, "failed to map audss registers\n"); + return PTR_ERR(reg_base); } - clk_table = kzalloc(sizeof(struct clk *) * EXYNOS_AUDSS_MAX_CLKS, + clk_table = devm_kzalloc(&pdev->dev, + sizeof(struct clk *) * EXYNOS_AUDSS_MAX_CLKS, GFP_KERNEL); - if (!clk_table) { - pr_err("%s: could not allocate clk lookup table\n", __func__); - return; - } + if (!clk_table) + return -ENOMEM; clk_data.clks = clk_table; - clk_data.clk_num = EXYNOS_AUDSS_MAX_CLKS; - of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); - + if (variant == TYPE_EXYNOS5420) + clk_data.clk_num = EXYNOS_AUDSS_MAX_CLKS; + else + clk_data.clk_num = EXYNOS_AUDSS_MAX_CLKS - 1; + + pll_ref = devm_clk_get(&pdev->dev, "pll_ref"); + pll_in = devm_clk_get(&pdev->dev, "pll_in"); + if (!IS_ERR(pll_ref)) + mout_audss_p[0] = __clk_get_name(pll_ref); + if (!IS_ERR(pll_in)) + mout_audss_p[1] = __clk_get_name(pll_in); clk_table[EXYNOS_MOUT_AUDSS] = clk_register_mux(NULL, "mout_audss", mout_audss_p, ARRAY_SIZE(mout_audss_p), CLK_SET_RATE_NO_REPARENT, reg_base + ASS_CLK_SRC, 0, 1, 0, &lock); + cdclk = devm_clk_get(&pdev->dev, "cdclk"); + sclk_audio = devm_clk_get(&pdev->dev, "sclk_audio"); + if (!IS_ERR(cdclk)) + mout_i2s_p[1] = __clk_get_name(cdclk); + if (!IS_ERR(sclk_audio)) + mout_i2s_p[2] = __clk_get_name(sclk_audio); clk_table[EXYNOS_MOUT_I2S] = clk_register_mux(NULL, "mout_i2s", mout_i2s_p, ARRAY_SIZE(mout_i2s_p), CLK_SET_RATE_NO_REPARENT, @@ -119,17 +161,88 @@ static void __init exynos_audss_clk_init(struct device_node *np) "sclk_pcm", CLK_SET_RATE_PARENT, reg_base + ASS_CLK_GATE, 4, 0, &lock); + sclk_pcm_in = devm_clk_get(&pdev->dev, "sclk_pcm_in"); + if (!IS_ERR(sclk_pcm_in)) + sclk_pcm_p = __clk_get_name(sclk_pcm_in); clk_table[EXYNOS_SCLK_PCM] = clk_register_gate(NULL, "sclk_pcm", - "div_pcm0", CLK_SET_RATE_PARENT, + sclk_pcm_p, CLK_SET_RATE_PARENT, reg_base + ASS_CLK_GATE, 5, 0, &lock); + if (variant == TYPE_EXYNOS5420) { + clk_table[EXYNOS_ADMA] = clk_register_gate(NULL, "adma", + "dout_srp", CLK_SET_RATE_PARENT, + reg_base + ASS_CLK_GATE, 9, 0, &lock); + } + + for (i = 0; i < clk_data.clk_num; i++) { + if (IS_ERR(clk_table[i])) { + dev_err(&pdev->dev, "failed to register clock %d\n", i); + ret = PTR_ERR(clk_table[i]); + goto unregister; + } + } + + ret = of_clk_add_provider(pdev->dev.of_node, of_clk_src_onecell_get, + &clk_data); + if (ret) { + dev_err(&pdev->dev, "failed to add clock provider\n"); + goto unregister; + } + #ifdef CONFIG_PM_SLEEP register_syscore_ops(&exynos_audss_clk_syscore_ops); #endif - pr_info("Exynos: Audss: clock setup completed\n"); + dev_info(&pdev->dev, "setup completed\n"); + + return 0; + +unregister: + for (i = 0; i < clk_data.clk_num; i++) { + if (!IS_ERR(clk_table[i])) + clk_unregister(clk_table[i]); + } + + return ret; } -CLK_OF_DECLARE(exynos4210_audss_clk, "samsung,exynos4210-audss-clock", - exynos_audss_clk_init); -CLK_OF_DECLARE(exynos5250_audss_clk, "samsung,exynos5250-audss-clock", - exynos_audss_clk_init); + +static int exynos_audss_clk_remove(struct platform_device *pdev) +{ + int i; + + of_clk_del_provider(pdev->dev.of_node); + + for (i = 0; i < clk_data.clk_num; i++) { + if (!IS_ERR(clk_table[i])) + clk_unregister(clk_table[i]); + } + + return 0; +} + +static struct platform_driver exynos_audss_clk_driver = { + .driver = { + .name = "exynos-audss-clk", + .owner = THIS_MODULE, + .of_match_table = exynos_audss_clk_of_match, + }, + .probe = exynos_audss_clk_probe, + .remove = exynos_audss_clk_remove, +}; + +static int __init exynos_audss_clk_init(void) +{ + return platform_driver_register(&exynos_audss_clk_driver); +} +core_initcall(exynos_audss_clk_init); + +static void __exit exynos_audss_clk_exit(void) +{ + platform_driver_unregister(&exynos_audss_clk_driver); +} +module_exit(exynos_audss_clk_exit); + +MODULE_AUTHOR("Padmavathi Venna "); +MODULE_DESCRIPTION("Exynos Audio Subsystem Clock Controller"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:exynos-audss-clk"); diff --git a/drivers/clk/samsung/clk-exynos5410.c b/drivers/clk/samsung/clk-exynos5410.c index 66829ac5f0802f..d57a375b5c6784 100644 --- a/drivers/clk/samsung/clk-exynos5410.c +++ b/drivers/clk/samsung/clk-exynos5410.c @@ -36,6 +36,12 @@ #define VPLL_CON0 0x10140 #define DPLL_LOCK 0x10030 #define DPLL_CON0 0x10128 +#define EPLL_LOCK 0x10040 +#define EPLL_CON0 0x10130 +#define IPLL_LOCK 0x10060 +#define IPLL_CON0 0x10150 +#define GATE_IP_ACP 0x8800 + #define SRC_CPU 0x200 #define DIV_CPU0 0x500 @@ -46,7 +52,13 @@ #define DIV_FSYS1 0x1054c #define DIV_FSYS2 0x10550 #define DIV_PERIC0 0x10558 +#define DIV_PERIC1 0x1055c +#define DIV_PERIC2 0x10560 +#define DIV_PERIC3 0x10564 +#define DIV_PERIC4 0x10568 +#define DIV_PERIC5 0x1056C #define DIV_DISP1_0 0x1052c +#define DIV_MAU 0x10544 #define DIV_FSYS0 0x10548 #define SRC_TOP0 0x10210 #define SRC_TOP1 0x10214 @@ -54,14 +66,19 @@ #define SRC_TOP3 0x1021c #define SRC_FSYS 0x10244 #define SRC_DISP1_0 0x1022c +#define SRC_MAU 0x10240 #define SRC_PERIC0 0x10250 +#define SRC_PERIC1 0x10254 #define SRC_MASK_DISP1_0 0x1032c +#define SRC_MASK_MAU 0x10334 #define SRC_MASK_FSYS 0x10340 #define SRC_MASK_PERIC0 0x10350 #define GATE_BUS_FSYS0 0x10740 #define GATE_TOP_SCLK_GSCL 0x10820 #define GATE_TOP_SCLK_DISP1 0x10828 +#define GATE_TOP_SCLK_MAU 0x1083c #define GATE_TOP_SCLK_FSYS 0x10840 +#define GATE_TOP_SCLK_PERIC 0x10850 #define GATE_IP_FSYS 0x10944 #define GATE_IP_PERIC 0x10950 #define GATE_IP_PERIS 0x10960 @@ -69,6 +86,7 @@ #define GATE_IP_GSCL0 0x10910 #define GATE_IP_GSCL1 0x10920 #define GATE_IP_MFC 0x1092c +#define GATE_IP_GEN 0x10934 #define SRC_CDREX 0x20200 #define SRC_KFC 0x28200 #define DIV_KFC0 0x28500 @@ -77,7 +95,7 @@ enum exynos5410_plls { apll, cpll, mpll, bpll, kpll, vpll, - dpll, + dpll, epll, ipll, nr_plls /* number of PLLs */ }; @@ -89,18 +107,26 @@ static unsigned long exynos5410_clk_regs[] __initdata = { SRC_CPU, DIV_CPU0, SRC_CPERI1, + SRC_TOP0, + SRC_TOP1, + SRC_TOP2, + SRC_TOP3, + SRC_MAU, + SRC_FSYS, + SRC_PERIC0, + SRC_PERIC1, DIV_TOP0, DIV_TOP1, DIV_TOP2, + DIV_MAU, DIV_FSYS0, DIV_FSYS1, DIV_FSYS2, DIV_PERIC0, - SRC_TOP0, - SRC_TOP1, - SRC_TOP2, - SRC_FSYS, - SRC_PERIC0, + DIV_PERIC1, + DIV_PERIC2, + DIV_PERIC3, + DIV_PERIC4, SRC_MASK_FSYS, SRC_MASK_PERIC0, GATE_BUS_FSYS0, @@ -110,9 +136,13 @@ static unsigned long exynos5410_clk_regs[] __initdata = { GATE_IP_GSCL0, GATE_IP_GSCL1, GATE_IP_MFC, + GATE_IP_GEN, + GATE_IP_ACP, GATE_TOP_SCLK_GSCL, GATE_TOP_SCLK_DISP1, + GATE_TOP_SCLK_MAU, GATE_TOP_SCLK_FSYS, + GATE_TOP_SCLK_PERIC, SRC_CDREX, SRC_KFC, DIV_KFC0, @@ -125,6 +155,8 @@ PNAME(cpll_p) = { "fin_pll", "fout_cpll" }; PNAME(mpll_p) = { "fin_pll", "fout_mpll", }; PNAME(kpll_p) = { "fin_pll", "fout_kpll", }; PNAME(dpll_p) = { "fin_pll", "fout_dpll", }; +PNAME(epll_p) = { "fin_pll", "fout_epll", }; +PNAME(ipll_p) = { "fin_pll", "fout_ipll", }; PNAME(mout_cpu_p) = { "mout_apll", "sclk_mpll", }; PNAME(mout_kfc_p) = { "mout_kpll", "sclk_mpll", }; @@ -137,7 +169,7 @@ PNAME(mpll_user_p) = { "fin_pll", "sclk_mpll", }; PNAME(bpll_user_p) = { "fin_pll", "sclk_bpll", }; PNAME(mpll_bpll_p) = { "sclk_mpll_muxed", "sclk_bpll_muxed", }; PNAME(cpll_mpll_p) = { "sclk_cpll", "sclk_mpll_muxed", }; -PNAME(aclk200_disp1_p) = { "fin_pll", "aclk200", }; +PNAME(aclk200_disp1_p) = { "fin_pll", "div_aclk200", }; PNAME(aclk300_disp0_p) = { "fin_pll", "div_aclk300_disp0", }; PNAME(aclk300_disp1_p) = { "fin_pll", "div_aclk300_disp1", }; PNAME(aclk300_gscl_p) = { "fin_pll", "div_aclk300_gscl", }; @@ -148,6 +180,22 @@ PNAME(group2_p) = { "fin_pll", "fin_pll", "sclk_hdmi27m", "sclk_dptxphy", "sclk_uhostphy", "sclk_hdmiphy", "sclk_mpll_bpll", "sclk_dpll", "sclk_vpll", "sclk_cpll" }; +PNAME(audio0_p) = { "cdclk0", "fin_pll", "sclk_hdmi27m", + "sclk_dptxphy", "sclk_uhostphy", "sclk_hdmiphy", + "sclk_mpll_bpll", "sclk_epll", "sclk_vpll", "sclk_cpll" }; +PNAME(audio1_p) = { "cdclk1", "fin_pll", "sclk_hdmi27m", + "sclk_dptxphy", "sclk_uhostphy", "sclk_hdmiphy", + "sclk_mpll_bpll", "sclk_epll", "sclk_vpll", "sclk_cpll" }; +PNAME(audio2_p) = { "cdclk2", "fin_pll", "sclk_hdmi27m", + "sclk_dptxphy", "sclk_uhostphy", "sclk_hdmiphy", + "sclk_mpll_bpll", "sclk_epll", "sclk_vpll", "sclk_cpll" }; +PNAME(spdif_p) = { "dout_audio0", "dout_audio1", "dout_audio2", + "spdif_extclk" }; +PNAME(maudio0_p) = { "cdclk0", "fin_pll", "sclk_hdmi27m", + "sclk_dptxphy", "sclk_uhostphy", "sclk_hdmiphy", + "sclk_mpll_bpll", "sclk_epll", "sclk_vpll", "sclk_cpll" }; + + static const struct samsung_pll_rate_table apll_tbl[] = { /* sorted in descending order */ /* PLL_35XX_RATE(rate, m, p, s) */ @@ -214,7 +262,7 @@ static const struct samsung_pll_rate_table kpll_tbl[] = { /* - * The Exynos 5410 VPLL Clock is actually an PLL_2650, + * The Exynos 5410 VPLL Clock is actually an PLL_2650, * which is very similar to the PLL_36XX, except for the size * of MDIV field. This field should have 10 bits and not 9. * However, since the parameter MDIV for the table below @@ -238,6 +286,33 @@ static const struct samsung_pll_rate_table vpll_tbl[] = { +static const struct samsung_pll_rate_table epll_tbl[] = { + /* sorted in descending order */ + /* PLL_36XX_RATE(rate, m, p, s, k) */ + PLL_36XX_RATE(600000000, 100, 2, 1, 0), + PLL_36XX_RATE(400000000, 200, 3, 2, 0), + PLL_36XX_RATE(200000000, 200, 3, 3, 0), + PLL_36XX_RATE(180633600, 301, 5, 3, 3670), + PLL_36XX_RATE( 67737600, 452, 5, 5, 27263), + PLL_36XX_RATE( 49152000, 197, 3, 5, 25690), + PLL_36XX_RATE( 45158400, 181, 3, 5, 24012), +}; + + +static const struct samsung_pll_rate_table ipll_tbl[] = { + /* sorted in descending order */ + /* PLL_35XX_RATE(rate, m, p, s, k) */ + PLL_35XX_RATE(864000000, 288, 4, 1), + PLL_35XX_RATE(666000000, 222, 4, 1), + PLL_35XX_RATE(432000000, 288, 4, 2), +}; + + +/* fixed rate clocks generated outside the soc */ +static struct samsung_fixed_rate_clock exynos5410_fixed_rate_ext_clks[] __initdata = { + FRATE(CLK_FIN_PLL, "fin_pll", NULL, CLK_IS_ROOT, 0), +}; + /* fixed rate clocks generated inside the soc */ static struct samsung_fixed_rate_clock exynos5410_fixed_rate_clks[] __initdata = { FRATE(CLK_SCLK_HDMIPHY, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), @@ -264,11 +339,16 @@ static struct samsung_mux_clock exynos5410_mux_clks[] __initdata = { MUX(0, "sclk_bpll_muxed", bpll_user_p, SRC_TOP2, 24, 1), MUX_A(0, "sclk_vpll", mout_vpll_p, SRC_TOP2, 16, 1, "sclk_vpll"), + MUX(CLK_SCLK_EPLL, "sclk_epll", epll_p, SRC_TOP2, 12, 1), + MUX(0, "sclk_ipll", ipll_p, SRC_TOP2, 14, 1), + MUX(0, "sclk_cpll", cpll_p, SRC_TOP2, 8, 1), MUX_A(0, "sclk_dpll", dpll_p, SRC_TOP2, 10, 1, "sclk_dpll"), MUX(0, "sclk_mpll_bpll", mpll_bpll_p, SRC_TOP1, 20, 1), + /* MAU Block */ + MUX(0, "mout_maudio0", maudio0_p, SRC_MAU, 0, 4), MUX(0, "mout_mmc0", group2_p, SRC_FSYS, 0, 4), MUX(0, "mout_mmc1", group2_p, SRC_FSYS, 4, 4), @@ -280,6 +360,13 @@ static struct samsung_mux_clock exynos5410_mux_clks[] __initdata = { MUX(0, "mout_uart0", group2_p, SRC_PERIC0, 0, 4), MUX(0, "mout_uart1", group2_p, SRC_PERIC0, 4, 4), MUX(0, "mout_uart2", group2_p, SRC_PERIC0, 8, 4), + MUX(0, "mout_uart3", group2_p, SRC_PERIC0, 12, 4), + + + MUX(0, "mout_spdif", spdif_p, SRC_PERIC0, 8, 2), + MUX(CLK_MOUT_AUDIO0, "mout_audio0", audio0_p, SRC_PERIC1, 12, 4), + MUX(0, "mout_audio1", audio1_p, SRC_PERIC1, 0, 4), + MUX(0, "mout_audio2", audio2_p, SRC_PERIC1, 4, 4), MUX(0, "mout_aclk166", mpll_bpll_p, SRC_TOP0, 8, 1), MUX(0, "mout_aclk200", mpll_bpll_p, SRC_TOP0, 12, 1), @@ -315,7 +402,11 @@ static struct samsung_div_clock exynos5410_div_clks[] __initdata = { DIV(0, "sclk_kpll", "mout_kpll", DIV_KFC0, 24, 3), DIV(0, "aclk66_pre", "sclk_mpll_muxed", DIV_TOP1, 24, 3), - DIV(0, "aclk66", "aclk66_pre", DIV_TOP0, 0, 3), + DIV(0, "div_aclk66", "aclk66_pre", DIV_TOP0, 0, 3), + + /* Audio Block */ + DIV(0, "dout_maudio0", "mout_maudio0", DIV_MAU, 0, 4), + DIV(0, "dout_maupcm0", "dout_maudio0", DIV_MAU, 4, 8), DIV(CLK_SCLK_USBPHY300, "sclk_usbphy300", "mout_usbd300", DIV_FSYS0, 16, 4), DIV(CLK_SCLK_USBPHY301, "sclk_usbphy301", "mout_usbd301", DIV_FSYS0, 20, 4), @@ -338,23 +429,38 @@ static struct samsung_div_clock exynos5410_div_clks[] __initdata = { DIV(0, "div_uart2", "mout_uart2", DIV_PERIC0, 8, 4), DIV(0, "div_uart3", "mout_uart3", DIV_PERIC0, 12, 4), - DIV(0, "aclk166", "mout_aclk166", DIV_TOP0, 8, 3), - DIV_A(0, "aclk200", "mout_aclk200", DIV_TOP0, 12, 3, "aclk200"), - DIV(0, "aclk266", "sclk_mpll_muxed", DIV_TOP0, 16, 3), + /* PCM */ + DIV(0, "dout_pcm", "dout_audio0", DIV_MAU, 4, 8), + DIV(0, "dout_pcm0", "dout_audio2", DIV_PERIC4, 20, 8), + DIV(0, "dout_pcm1", "dout_audio1", DIV_PERIC4, 4, 8), + DIV(0, "dout_pcm2", "dout_audio2", DIV_PERIC4, 12, 8), + /* this seems to overlap with "dout_audio2", which is strange */ + + /* Audio - I2S */ + DIV(0, "dout_i2s1", "dout_audio1", DIV_PERIC5, 0, 6), + DIV(0, "dout_i2s2", "dout_audio2", DIV_PERIC5, 8, 6), + DIV(0, "dout_audio0", "mout_audio0", DIV_PERIC5, 24, 4), + DIV(0, "dout_audio1", "mout_audio1", DIV_PERIC4, 0, 4), + DIV(0, "dout_audio2", "mout_audio2", DIV_PERIC4, 16, 4), + + DIV(0, "div_aclk166", "mout_aclk166", DIV_TOP0, 8, 3), + DIV_A(0, "div_aclk200", "mout_aclk200", DIV_TOP0, 12, 3, "aclk200"), + DIV(0, "div_aclk266", "sclk_mpll_muxed", DIV_TOP0, 16, 3), DIV(0, "div_aclk333", "mout_aclk333", DIV_TOP0, 20, 3), - DIV(0, "aclk400", "mout_aclk400", DIV_TOP0, 24, 3), + DIV(0, "div_aclk400", "mout_aclk400", DIV_TOP0, 24, 3), DIV(0, "div_aclk300_gscl", "sclk_dpll", DIV_TOP2, 8, 3), DIV(0, "div_aclk300_disp0", "sclk_dpll", DIV_TOP2, 12, 3), DIV_A(0, "div_aclk300_disp1", "sclk_dpll", DIV_TOP2, 16, 3, "daclk300disp1"), DIV(0, "div_aclk300_jpeg", "sclk_dpll", DIV_TOP2, 17, 3), - DIV(0, "div_hdmi_pixel", "sclk_vpll", DIV_DISP1_0, 28, 4), + DIV(CLK_DIV_HDMI_PIXEL, "div_hdmi_pixel", "sclk_vpll", + DIV_DISP1_0, 28, 4), DIV(0, "div_fimd1", "mout_fimd1", DIV_DISP1_0, 0, 4), }; static struct samsung_gate_clock exynos5410_gate_clks[] __initdata = { - GATE(CLK_MCT, "mct", "aclk66", GATE_IP_PERIS, 18, 0, 0), - GATE(CLK_TMU_APBIF, "tmu_apbif", "aclk66", + GATE(CLK_MCT, "mct", "div_aclk66", GATE_IP_PERIS, 18, 0, 0), + GATE(CLK_TMU_APBIF, "tmu_apbif", "div_aclk66", GATE_IP_PERIS, 21, CLK_IGNORE_UNUSED, 0), GATE(CLK_SCLK_MMC0, "sclk_mmc0", "div_mmc_pre0", @@ -375,24 +481,58 @@ static struct samsung_gate_clock exynos5410_gate_clks[] __initdata = { GATE_TOP_SCLK_DISP1, 10, CLK_SET_RATE_PARENT, 0), GATE(CLK_SCLK_DP1, "sclk_dp1", "mout_aclk300_disp0", GATE_TOP_SCLK_DISP1, 20, CLK_SET_RATE_PARENT, 0), - - GATE(CLK_MMC0, "sdmmc0", "aclk200", GATE_BUS_FSYS0, 12, 0, 0), - GATE(CLK_MMC1, "sdmmc1", "aclk200", GATE_BUS_FSYS0, 13, 0, 0), - GATE(CLK_MMC2, "sdmmc2", "aclk200", GATE_BUS_FSYS0, 14, 0, 0), - - GATE(CLK_UART0, "uart0", "aclk66", GATE_IP_PERIC, 0, 0, 0), - GATE(CLK_UART1, "uart1", "aclk66", GATE_IP_PERIC, 1, 0, 0), - GATE(CLK_UART2, "uart2", "aclk66", GATE_IP_PERIC, 2, 0, 0), - - GATE(CLK_I2C0, "i2c0", "aclk66", GATE_IP_PERIC, 6, 0, 0), - GATE(CLK_I2C1, "i2c1", "aclk66", GATE_IP_PERIC, 7, 0, 0), - GATE(CLK_I2C2, "i2c2", "aclk66", GATE_IP_PERIC, 8, 0, 0), - GATE(CLK_I2C3, "i2c3", "aclk66", GATE_IP_PERIC, 9, 0, 0), - GATE(CLK_I2C4, "i2c4", "aclk66", GATE_IP_PERIC, 10, 0, 0), - GATE(CLK_I2C5, "i2c5", "aclk66", GATE_IP_PERIC, 11, 0, 0), - GATE(CLK_I2C6, "i2c6", "aclk66", GATE_IP_PERIC, 12, 0, 0), - GATE(CLK_I2C7, "i2c7", "aclk66", GATE_IP_PERIC, 13, 0, 0), - GATE(CLK_I2C_HDMI, "i2c_hdmi", "aclk66", GATE_IP_PERIC, 14, 0, 0), + + GATE(CLK_PDMA0, "pdma0", "div_aclk200", GATE_IP_FSYS, 1, 0, 0), + GATE(CLK_PDMA1, "pdma1", "div_aclk200", GATE_IP_FSYS, 2, 0, 0), + + GATE(CLK_MDMA0, "mdma0", "div_aclk266", GATE_IP_ACP, 1, 0, 0), + GATE(CLK_MDMA1, "mdma1", "div_aclk266", GATE_IP_GEN, 4, 0, 0), + + GATE(CLK_MMC0, "sdmmc0", "div_aclk200", GATE_BUS_FSYS0, 12, 0, 0), + GATE(CLK_MMC1, "sdmmc1", "div_aclk200", GATE_BUS_FSYS0, 13, 0, 0), + GATE(CLK_MMC2, "sdmmc2", "div_aclk200", GATE_BUS_FSYS0, 14, 0, 0), + + GATE(CLK_UART0, "uart0", "div_aclk66", GATE_IP_PERIC, 0, 0, 0), + GATE(CLK_UART1, "uart1", "div_aclk66", GATE_IP_PERIC, 1, 0, 0), + GATE(CLK_UART2, "uart2", "div_aclk66", GATE_IP_PERIC, 2, 0, 0), + GATE(CLK_UART3, "uart3", "div_aclk66", GATE_IP_PERIC, 3, 0, 0), + + GATE(CLK_I2C0, "i2c0", "div_aclk66", GATE_IP_PERIC, 6, 0, 0), + GATE(CLK_I2C1, "i2c1", "div_aclk66", GATE_IP_PERIC, 7, 0, 0), + GATE(CLK_I2C2, "i2c2", "div_aclk66", GATE_IP_PERIC, 8, 0, 0), + GATE(CLK_I2C3, "i2c3", "div_aclk66", GATE_IP_PERIC, 9, 0, 0), + GATE(CLK_I2C4, "i2c4", "div_aclk66", GATE_IP_PERIC, 10, 0, 0), + GATE(CLK_I2C5, "i2c5", "div_aclk66", GATE_IP_PERIC, 11, 0, 0), + GATE(CLK_I2C6, "i2c6", "div_aclk66", GATE_IP_PERIC, 12, 0, 0), + GATE(CLK_I2C7, "i2c7", "div_aclk66", GATE_IP_PERIC, 13, 0, 0), + GATE(CLK_I2C_HDMI, "i2c_hdmi", "div_aclk66", GATE_IP_PERIC, 14, 0, 0), + + /* Maudio Block */ + /* Not even sure if this is correct for exynos5410. */ + GATE(CLK_SCLK_MAUDIO0, "sclk_maudio0", "dout_maudio0", + GATE_TOP_SCLK_MAU, 0, CLK_SET_RATE_PARENT, 0), + GATE(CLK_SCLK_MAUPCM0, "sclk_maupcm0", "dout_maupcm0", + GATE_TOP_SCLK_MAU, 1, CLK_SET_RATE_PARENT, 0), + + GATE(CLK_I2S1, "i2s1", "div_aclk66", GATE_IP_PERIC, 20, 0, 0), + GATE(CLK_I2S2, "i2s2", "div_aclk66", GATE_IP_PERIC, 21, 0, 0), + + GATE_A(CLK_CHIPID, "chipid", "div_aclk66", GATE_IP_PERIS, 0, 0, 0, + "chipid"), + + /* Copied from exynos5420, but again this might also + * be wrong. + */ + GATE(CLK_SCLK_SPDIF, "sclk_spdif", "mout_spdif", + GATE_TOP_SCLK_PERIC, 9, CLK_SET_RATE_PARENT, 0), + GATE(CLK_SCLK_PCM1, "sclk_pcm1", "dout_pcm1", + GATE_TOP_SCLK_PERIC, 15, CLK_SET_RATE_PARENT, 0), + GATE(CLK_SCLK_PCM2, "sclk_pcm2", "dout_pcm2", + GATE_TOP_SCLK_PERIC, 16, CLK_SET_RATE_PARENT, 0), + GATE(CLK_SCLK_I2S1, "sclk_i2s1", "dout_i2s1", + GATE_TOP_SCLK_PERIC, 17, CLK_SET_RATE_PARENT, 0), + GATE(CLK_SCLK_I2S2, "sclk_i2s2", "dout_i2s2", + GATE_TOP_SCLK_PERIC, 18, CLK_SET_RATE_PARENT, 0), GATE(CLK_SCLK_UART0, "sclk_uart0", "div_uart0", SRC_MASK_PERIC0, 0, CLK_SET_RATE_PARENT, 0), @@ -400,12 +540,14 @@ static struct samsung_gate_clock exynos5410_gate_clks[] __initdata = { SRC_MASK_PERIC0, 4, CLK_SET_RATE_PARENT, 0), GATE(CLK_SCLK_UART2, "sclk_uart2", "div_uart2", SRC_MASK_PERIC0, 8, CLK_SET_RATE_PARENT, 0), + GATE(CLK_SCLK_UART3, "sclk_uart3", "div_uart3", + SRC_MASK_PERIC0, 12, CLK_SET_RATE_PARENT, 0), GATE(CLK_FIMD1, "fimd1", "mout_aclk300_disp1", GATE_IP_DISP1, 0, 0, 0), GATE(CLK_MIE1, "mie1", "mout_aclk300_disp1", GATE_IP_DISP1, 1, 0, 0), GATE(CLK_DSIM1, "dsim1", "mout_aclk300_disp1", GATE_IP_DISP1, 3, 0, 0), - GATE(CLK_DP, "dp", "aclk200", GATE_IP_DISP1, 4, 0, 0), + GATE(CLK_DP, "dp", "div_aclk200", GATE_IP_DISP1, 4, 0, 0), GATE(CLK_MIXER, "mixer", "mout_aclk200_disp1", GATE_IP_DISP1, 5, 0, 0), - GATE(CLK_HDMI, "hdmi", "aclk66", GATE_IP_DISP1, 6, 0, 0), + GATE(CLK_HDMI, "hdmi", "div_aclk66", GATE_IP_DISP1, 6, 0, 0), GATE(CLK_GSCL0, "gscl0", "mout_aclk300_disp1", GATE_IP_GSCL0, 0, 0, 0), GATE(CLK_GSCL1, "gscl1", "mout_aclk300_disp1", GATE_IP_GSCL0, 1, 0, 0), GATE(CLK_GSCL2, "gscl2", "mout_aclk300_disp1", GATE_IP_GSCL0, 1, 0, 0), @@ -414,12 +556,9 @@ static struct samsung_gate_clock exynos5410_gate_clks[] __initdata = { GATE(CLK_MFC, "mfc", "mout_aclk333_sub", GATE_IP_MFC, 0, 0, 0), GATE(CLK_SMMU_MFCL, "smmu_mfcl", "mout_aclk333_sub", GATE_IP_MFC, 1, 0, 0), GATE(CLK_SMMU_MFCR, "smmu_mfcr", "mout_aclk333_sub", GATE_IP_MFC, 2, 0, 0), - GATE(CLK_PWM, "pwm", "aclk66", GATE_IP_PERIC, 24, 0, 0), + GATE(CLK_PWM, "pwm", "div_aclk66", GATE_IP_PERIC, 24, 0, 0), }; -/* Added the rate tables, and changed PLL to 'pll_36xx' instead of - * 'pll_35xx'. - */ static struct samsung_pll_clock exynos5410_plls[nr_plls] __initdata = { [apll] = PLL(pll_35xx, CLK_FOUT_APLL, "fout_apll", "fin_pll", APLL_LOCK, APLL_CON0, apll_tbl), @@ -435,6 +574,10 @@ static struct samsung_pll_clock exynos5410_plls[nr_plls] __initdata = { VPLL_LOCK, VPLL_CON0, vpll_tbl), [dpll] = PLL(pll_35xx, CLK_FOUT_DPLL, "fout_dpll", "fin_pll", DPLL_LOCK, DPLL_CON0, dpll_tbl), + [epll] = PLL(pll_36xx, CLK_FOUT_EPLL, "fout_epll", "fin_pll", EPLL_LOCK, + EPLL_CON0, epll_tbl), + [ipll] = PLL(pll_35xx, CLK_FOUT_IPLL, "fout_ipll", "fin_pll", IPLL_LOCK, + IPLL_CON0, ipll_tbl), }; @@ -517,6 +660,10 @@ static __init int set_rate_by_name(const char *name, unsigned long rate) return ret; } +static struct of_device_id ext_clk_match[] __initdata = { + { .compatible = "samsung,clock-xxti", .data = (void *)0, }, + { }, +}; /* register exynos5410 clocks */ static void __init exynos5410_clk_init(struct device_node *np) @@ -530,6 +677,9 @@ static void __init exynos5410_clk_init(struct device_node *np) samsung_clk_init(np, reg_base, CLK_NR_CLKS, exynos5410_clk_regs, ARRAY_SIZE(exynos5410_clk_regs), NULL, 0); + samsung_clk_of_register_fixed_ext(exynos5410_fixed_rate_ext_clks, + ARRAY_SIZE(exynos5410_fixed_rate_ext_clks), + ext_clk_match); samsung_clk_register_mux(exynos5410_pll_pmux_clks, ARRAY_SIZE(exynos5410_pll_pmux_clks)); samsung_clk_register_pll(exynos5410_plls, ARRAY_SIZE(exynos5410_plls), diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index 6f34e43a717804..2a671f38192455 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -83,7 +83,7 @@ enum hdmi_type { struct hdmi_resources { struct clk *hdmi; struct clk *sclk_hdmi; - struct clk *sclk_pixel; + struct clk *div_hdmi_pixel; struct clk *sclk_hdmiphy; struct clk *mout_hdmi; struct regulator_bulk_data *regul_bulk; @@ -1128,7 +1128,7 @@ static void hdmiphy_conf_reset(struct hdmi_context *hdata) u32 reg; clk_disable_unprepare(hdata->res.sclk_hdmi); - clk_set_parent(hdata->res.mout_hdmi, hdata->res.sclk_pixel); + clk_set_parent(hdata->res.mout_hdmi, hdata->res.div_hdmi_pixel); clk_prepare_enable(hdata->res.sclk_hdmi); hdata->phy_ops->enable(hdata->phy_dev, 0); @@ -1576,9 +1576,9 @@ static int hdmi_resources_init(struct hdmi_context *hdata) DRM_ERROR("failed to get clock 'sclk_hdmi'\n"); goto fail; } - res->sclk_pixel = devm_clk_get(dev, "sclk_pixel"); - if (IS_ERR(res->sclk_pixel)) { - DRM_ERROR("failed to get clock 'sclk_pixel'\n"); + res->div_hdmi_pixel = devm_clk_get(dev, "div_hdmi_pixel"); + if (IS_ERR(res->div_hdmi_pixel)) { + DRM_ERROR("failed to get clock 'div_hdmi_pixel'\n"); goto fail; } res->sclk_hdmiphy = devm_clk_get(dev, "sclk_hdmiphy"); @@ -1592,7 +1592,7 @@ static int hdmi_resources_init(struct hdmi_context *hdata) goto fail; } - clk_set_parent(res->mout_hdmi, res->sclk_pixel); + clk_set_parent(res->mout_hdmi, res->div_hdmi_pixel); #if 0 res->regul_bulk = devm_kzalloc(dev, ARRAY_SIZE(supply) * sizeof(res->regul_bulk[0]), GFP_KERNEL); @@ -1898,7 +1898,7 @@ static int hdmi_probe(struct platform_device *pdev) err_clk_res: clk_unprepare(hdata->res.hdmi); clk_unprepare(hdata->res.sclk_hdmi); - clk_unprepare(hdata->res.sclk_pixel); + clk_unprepare(hdata->res.div_hdmi_pixel); clk_unprepare(hdata->res.sclk_hdmiphy); return ret; } @@ -1922,7 +1922,7 @@ static int hdmi_remove(struct platform_device *pdev) clk_unprepare(hdata->res.hdmi); clk_unprepare(hdata->res.sclk_hdmi); - clk_unprepare(hdata->res.sclk_pixel); + clk_unprepare(hdata->res.div_hdmi_pixel); clk_unprepare(hdata->res.sclk_hdmiphy); return 0; } diff --git a/drivers/gpu/drm/exynos/exynos_hdmiphy_platform.c b/drivers/gpu/drm/exynos/exynos_hdmiphy_platform.c index 7ba1ee6007d388..9872f3968e89fe 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmiphy_platform.c +++ b/drivers/gpu/drm/exynos/exynos_hdmiphy_platform.c @@ -278,6 +278,149 @@ static struct hdmiphy_config hdmiphy_5410_configs[] = { }, }; +/* default phy config settings for exynos5410-odroidxu + * Copied from branch 3.4.y + */ +#if 0 // HDMI PHY Configuration + buffer[3] |= 0xC0; // PHY ADDR 0x10 : CH0 LEVEL MAX + buffer[18] |= 0x03; // PHY ADDR 0x4C : CH1 LEVEL MAX + buffer[22] |= 0xFB; // PHY ADDR 0x5C : CH2 LEVEL MAX & TX_CLK_LEVEL_MAX + + buffer[14] |= 0x80; // PHY ADDR 0x3C : TX_AMP_LEVEL MAX + buffer[15] |= 0x0F; // PHY ADDR 0x40 : TX_AMP_LEVEL_MAX +#endif + +static struct hdmiphy_config hdmiphy_odroidxu_configs[] = { + { + .pixel_clock = 25200000, + .conf = { + 0x52, 0x3F, 0x55, (0x40 | 0xC0), 0x01, 0x00, 0xC8, 0x82, + 0xC8, 0xBD, 0xD8, 0x45, 0xA0, 0xAC, (0x80 | 0x80), (0x06 | 0x0F), + 0x80, 0x01, (0x84 | 0x03), 0x05, 0x02, 0x24, (0x66 | 0xFB), 0x54, + 0xF4, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 27000000, + .conf = { + 0xD1, 0x22, 0x51, (0x40 | 0xC0), 0x08, 0xFC, 0x20, 0x98, + 0xE8, 0xCB, 0xD8, 0x45, 0xA0, 0xAC, (0x80 | 0x80), (0x06 | 0x0F), + 0x80, 0x01, (0x84 | 0x03), 0x05, 0x22, 0x24, (0x86 | 0xFB), 0x54, + 0xE4, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 27027000, + .conf = { + 0xD1, 0x2D, 0x72, (0x40 | 0xC0), 0x64, 0x12, 0x08, 0x43, + 0xE8, 0x0E, 0xD9, 0x45, 0xA0, 0xAC, (0x80 | 0x80), (0x06 | 0x0F), + 0x80, 0x09, (0x84 | 0x03), 0x05, 0x22, 0x24, (0x86 | 0xFB), 0x54, + 0xE3, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 36000000, + .conf = { + 0x51, 0x2D, 0x55, (0x40 | 0xC0), 0x40, 0x00, 0xC8, 0x02, + 0xC8, 0x0E, 0xD9, 0x45, 0xA0, 0xAC, (0x80 | 0x80), (0x08 | 0x0F), + 0x80, 0x09, (0x84 | 0x03), 0x05, 0x02, 0x24, (0x66 | 0xFB), 0x54, + 0xAB, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 40000000, + .conf = { + 0xD1, 0x21, 0x31, (0x40 | 0xC0), 0x3C, 0x28, 0xC8, 0x87, + 0xE8, 0xC8, 0xD8, 0x45, 0xA0, 0xAC, (0x80 | 0x80), (0x08 | 0x0F), + 0x80, 0x09, (0x84 | 0x03), 0x05, 0x02, 0x24, (0x66 | 0xFB), 0x54, + 0x9A, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 65000000, + .conf = { + 0xD1, 0x36, 0x34, (0x40 | 0xC0), 0x0C, 0x04, 0xC8, 0x82, + 0xE8, 0x45, 0xD9, 0x45, 0xA0, 0xAC, (0x80 | 0x80), (0x08 | 0x0F), + 0x80, 0x09, (0x84 | 0x03), 0x05, 0x02, 0x24, (0x66 | 0xFB), 0x54, + 0xBD, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 71000000, + .conf = { + 0xD1, 0x3B, 0x35, (0x40 | 0xC0), 0x0C, 0x04, 0xC8, 0x85, + 0xE8, 0x63, 0xD9, 0x45, 0xA0, 0xAC, (0x80 | 0x80), (0x08 | 0x0F), + 0x80, 0x09, (0x84 | 0x03), 0x05, 0x02, 0x24, (0x66 | 0xFB), 0x54, + 0x57, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 74175000, + .conf = { + 0xD1, 0x1F, 0x10, (0x40 | 0xC0), 0x5B, 0xEF, 0x08, 0x81, + 0xE8, 0xB9, 0xD8, 0x45, 0xA0, 0xAC, (0x80 | 0x80), (0x56 | 0x0F), + 0x80, 0x09, (0x84 | 0x03), 0x05, 0x22, 0x24, (0x86 | 0xFB), 0x54, + 0xA6, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 74250000, + .conf = { + 0xD1, 0x1F, 0x10, (0x40 | 0xC0), 0x40, 0xF8, 0x08, 0x81, + 0xE8, 0xBA, 0xD8, 0x45, 0xA0, 0xAC, (0x80 | 0x80), (0x56 | 0x0F), + 0x80, 0x09, (0x84 | 0x03), 0x05, 0x22, 0x24, (0x86 | 0xFB), 0x54, + 0xA5, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 83500000, + .conf = { + 0xD1, 0x23, 0x11, (0x40 | 0xC0), 0x0C, 0xFB, 0xC8, 0x85, + 0xE8, 0xD1, 0xD8, 0x45, 0xA0, 0xAC, (0x80 | 0x80), (0x08 | 0x0F), + 0x80, 0x09, (0x84 | 0x03), 0x05, 0x02, 0x24, (0x66 | 0xFB), 0x54, + 0x4A, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 106500000, + .conf = { + 0xD1, 0x2C, 0x12, (0x40 | 0xC0), 0x0C, 0x09, 0xC8, 0x84, + 0xE8, 0x0A, 0xD9, 0x45, 0xA0, 0xAC, (0x80 | 0x80), (0x08 | 0x0F), + 0x80, 0x09, (0x84 | 0x03), 0x05, 0x02, 0x24, (0x66 | 0xFB), 0x54, + 0x73, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 108000000, + .conf = { + 0x51, 0x2D, 0x15, (0x40 | 0xC0), 0x01, 0x00, 0xC8, 0x82, + 0xC8, 0x0E, 0xD9, 0x45, 0xA0, 0xAC, (0x80 | 0x80), (0x08 | 0x0F), + 0x80, 0x09, (0x84 | 0x03), 0x05, 0x02, 0x24, (0x66 | 0xFB), 0x54, + 0xC7, 0x25, 0x03, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 148352000, + .conf = { + 0xD1, 0x1F, 0x00, (0x40 | 0xC0), 0x5B, 0xEF, 0x08, 0x81, + 0xE8, 0xB9, 0xD8, 0x45, 0xA0, 0xAC, (0x80 | 0x80), (0x66 | 0x0F), + 0x80, 0x09, (0x84 | 0x03), 0x05, 0x22, 0x24, (0x86 | 0xFB), 0x54, + 0x4B, 0x25, 0x03, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 148500000, + .conf = { + 0xD1, 0x1F, 0x00, (0x40 | 0xC0), 0x40, 0xF0, 0x08, 0x81, + 0xe8, 0xBA, 0xD8, 0x45, 0xA0, 0xAC, (0x80 | 0x80), (0x66 | 0x0F), + 0x80, 0x09, (0x84 | 0x03), 0x05, 0x22, 0x24, (0x86 | 0xFB), 0x54, + 0x4B, 0x25, 0x03, 0x00, 0x00, 0x01, 0x80, + }, + }, +}; + + + static struct hdmiphy_config *hdmiphy_find_conf(struct hdmiphy_context *hdata, unsigned int pixel_clk) { @@ -465,6 +608,12 @@ static struct hdmiphy_drv_data exynos5410_hdmiphy_drv_data = { .count = ARRAY_SIZE(hdmiphy_5410_configs) }; +static struct hdmiphy_drv_data exynos5410_odroidxu_hdmiphy_drv_data = { + .confs = hdmiphy_odroidxu_configs, + .count = ARRAY_SIZE(hdmiphy_odroidxu_configs) +}; + + static struct of_device_id hdmiphy_platform_device_match_types[] = { { .compatible = "samsung,exynos5420-hdmiphy", @@ -472,6 +621,9 @@ static struct of_device_id hdmiphy_platform_device_match_types[] = { }, { .compatible = "samsung,exynos5410-hdmiphy", .data = &exynos5410_hdmiphy_drv_data, + }, { + .compatible = "samsung,exynos5410-odroidxu-hdmiphy", + .data = &exynos5410_odroidxu_hdmiphy_drv_data, }, { /* end node */ } diff --git a/drivers/power/asv/exynos5410-asv.c b/drivers/power/asv/exynos5410-asv.c index 4dd8554276230f..4473f9df2f0afd 100644 --- a/drivers/power/asv/exynos5410-asv.c +++ b/drivers/power/asv/exynos5410-asv.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include "exynos-asv.h" @@ -33,7 +34,7 @@ static const char * const special_lot_list[] = { bool get_asv_is_bin2(void) { - return asv_table_version == ASV_TABLE_BIN2; + return asv_table_version == ASV_TABLE_BIN2; } EXPORT_SYMBOL_GPL(get_asv_is_bin2); @@ -71,28 +72,28 @@ static unsigned int exynos5410_apply_volt_offset(unsigned int voltage, enum asv_ void exynos5410_set_abb(struct asv_info *asv_info) { - void __iomem *target_reg; - unsigned int target_value; - - switch (asv_info->type) { - case ASV_ARM: - case ASV_KFC: - target_reg = EXYNOS5410_BB_CON0; - target_value = arm_asv_abb_info[asv_info->asv_grp]; - break; - case ASV_INT_MIF_L0: - case ASV_INT_MIF_L1: - case ASV_INT_MIF_L2: - case ASV_INT_MIF_L3: - case ASV_MIF: - target_reg = EXYNOS5410_BB_CON1; - target_value = int_asv_abb_info[asv_info->asv_grp]; - break; - default: - return; - } - - set_abb(target_reg, target_value); + void __iomem *target_reg; + unsigned int target_value; + + switch (asv_info->type) { + case ASV_ARM: + case ASV_KFC: + target_reg = EXYNOS5410_BB_CON0; + target_value = arm_asv_abb_info[asv_info->asv_grp]; + break; + case ASV_INT_MIF_L0: + case ASV_INT_MIF_L1: + case ASV_INT_MIF_L2: + case ASV_INT_MIF_L3: + case ASV_MIF: + target_reg = EXYNOS5410_BB_CON1; + target_value = int_asv_abb_info[asv_info->asv_grp]; + break; + default: + return; + } + + set_abb(target_reg, target_value); } static int __init exynos5410_get_asv_group(struct asv_info *asv_info) @@ -184,9 +185,9 @@ static bool exynos5410_check_lot_id(struct exynos_asv_common *asv_info) lot_id /= 36; asv_info->lot_name[i] = (tmp < 10) ? (tmp + '0') : ((tmp - 10) + 'A'); - } + } - for (i = 0; i < ARRAY_SIZE(special_lot_list); i++) { + for (i = 0; i < ARRAY_SIZE(special_lot_list); i++) { if (!strncmp(asv_info->lot_name, special_lot_list[i], LOT_ID_LEN)) { is_special_lot = true; @@ -222,6 +223,16 @@ static struct asv_info exynos5410_asv_member[] __initdata = { int __init exynos5410_asv_init(struct exynos_asv_common *exynos_info) { + struct clk *clk_chipid; + + /* lot ID Check */ + clk_chipid = clk_get(NULL, "chipid"); + if (IS_ERR(clk_chipid)) { + pr_info("EXYNOS5410 ASV : cannot find chipid clock!\n"); + return -EINVAL; + } + clk_prepare_enable(clk_chipid); + special_lot_group = 0; is_speedgroup = false; @@ -229,7 +240,7 @@ int __init exynos5410_asv_init(struct exynos_asv_common *exynos_info) asv_group.package_id = readl(exynos_info->base + CHIP_ID_OFFSET); asv_group.aux_info = readl(exynos_info->base + CHIP_AUXINFO_OFFSET); asv_group.lot_id = readl(exynos_info->base + CHIP_ID0_OFFSET); - pr_info("pro_id: 0x%x, lot_id: 0x%x\n",readl(exynos_info->base), asv_group.lot_id); + pr_info("pro_id: 0x%x, lot_id: 0x%x\n", readl(exynos_info->base), asv_group.lot_id); is_special_lot = exynos5410_check_lot_id(exynos_info); if(is_special_lot) @@ -239,11 +250,11 @@ int __init exynos5410_asv_init(struct exynos_asv_common *exynos_info) if (!((asv_group.package_id >> EXYNOS5410_SG_BSIGN_OFFSET) & EXYNOS5410_SG_BSIGN_MASK)) special_lot_group = ((asv_group.package_id >> EXYNOS5410_SG_A_OFFSET) & EXYNOS5410_SG_A_MASK) - -((asv_group.package_id >> EXYNOS5410_SG_B_OFFSET) & EXYNOS5410_SG_B_MASK); + -((asv_group.package_id >> EXYNOS5410_SG_B_OFFSET) & EXYNOS5410_SG_B_MASK); else special_lot_group = ((asv_group.package_id >> EXYNOS5410_SG_A_OFFSET) & EXYNOS5410_SG_A_MASK) - +((asv_group.package_id >> EXYNOS5410_SG_B_OFFSET) & EXYNOS5410_SG_B_MASK); - is_speedgroup = true; + +((asv_group.package_id >> EXYNOS5410_SG_B_OFFSET) & EXYNOS5410_SG_B_MASK); + is_speedgroup = true; pr_info("EXYNOS5410 ASV : Use Fusing Speed Group %d\n", special_lot_group); } else { asv_group.hpm = (asv_group.aux_info >> EXYNOS5410_TMCB_OFFSET) & @@ -277,6 +288,8 @@ int __init exynos5410_asv_init(struct exynos_asv_common *exynos_info) asv_volt_offset[ASV_MIF][1] = (asv_group.aux_info >> EXYNOS5410_MIFLOCK_DN_OFFSET) & EXYNOS5410_MIFLOCK_DN_MASK; set_asv_member: + clk_disable_unprepare(clk_chipid); + exynos_info->asv_list = exynos5410_asv_member; exynos_info->nr_mem = ARRAY_SIZE(exynos5410_asv_member); diff --git a/include/dt-bindings/clk/exynos-audss-clk.h b/include/dt-bindings/clk/exynos-audss-clk.h index 8279f427c60f65..0ae6f5a75d2a5a 100644 --- a/include/dt-bindings/clk/exynos-audss-clk.h +++ b/include/dt-bindings/clk/exynos-audss-clk.h @@ -19,7 +19,8 @@ #define EXYNOS_SCLK_I2S 7 #define EXYNOS_PCM_BUS 8 #define EXYNOS_SCLK_PCM 9 +#define EXYNOS_ADMA 10 -#define EXYNOS_AUDSS_MAX_CLKS 10 +#define EXYNOS_AUDSS_MAX_CLKS 11 #endif diff --git a/include/dt-bindings/clock/exynos5410.h b/include/dt-bindings/clock/exynos5410.h index aacf8cf77b37c4..453eeb1d34e24a 100644 --- a/include/dt-bindings/clock/exynos5410.h +++ b/include/dt-bindings/clock/exynos5410.h @@ -9,6 +9,9 @@ #define CLK_FOUT_KPLL 5 #define CLK_FOUT_VPLL 6 #define CLK_FOUT_DPLL 7 +#define CLK_FOUT_EPLL 8 +#define CLK_FOUT_IPLL 9 +#define CLK_FIN_PLL 10 /* gate for special clocks (sclk) */ #define CLK_SCLK_UART0 128 @@ -23,10 +26,18 @@ #define CLK_SCLK_HDMI 137 #define CLK_SCLK_FIMD1 138 #define CLK_SCLK_DP1 139 +#define CLK_SCLK_I2S1 140 +#define CLK_SCLK_I2S2 141 +#define CLK_SCLK_PCM1 142 +#define CLK_SCLK_PCM2 143 +#define CLK_SCLK_SPDIF 144 +#define CLK_SCLK_MAUDIO0 148 +#define CLK_SCLK_MAUPCM0 149 #define CLK_SCLK_USBD300 150 #define CLK_SCLK_USBD301 151 #define CLK_SCLK_USBPHY300 152 #define CLK_SCLK_USBPHY301 153 +#define CLK_SCLK_EPLL 154 /* gate clocks */ #define CLK_UART0 257 @@ -42,8 +53,19 @@ #define CLK_I2C6 267 #define CLK_I2C7 268 #define CLK_I2C_HDMI 269 +#define CLK_I2S1 270 +#define CLK_I2S2 271 +#define CLK_CHIPID 272 + +#define CLK_PDMA0 275 +#define CLK_PDMA1 276 + #define CLK_MCT 315 #define CLK_TMU_APBIF 318 + +#define CLK_MDMA0 346 +#define CLK_MDMA1 347 + #define CLK_MMC0 351 #define CLK_MMC1 352 #define CLK_MMC2 353 @@ -66,8 +88,12 @@ #define CLK_SMMU_MFCR 403 #define CLK_PWM 404 +/* Div clocks */ +#define CLK_DIV_HDMI_PIXEL 450 + /* mux clocks */ #define CLK_MOUT_HDMI 500 +#define CLK_MOUT_AUDIO0 501 #define CLK_NR_CLKS 512 #endif /* _DT_BINDINGS_CLOCK_EXYNOS_5410_H */ diff --git a/include/sound/soc.h b/include/sound/soc.h index 1f741cb24f337c..737f50752bfb4c 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h @@ -446,6 +446,7 @@ int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count, struct snd_soc_jack_gpio *gpios); void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count, struct snd_soc_jack_gpio *gpios); +void snd_soc_jack_gpio_detect(struct snd_soc_jack_gpio *gpio); #endif /* codec register bit access */ diff --git a/sound/soc/codecs/hdmi.c b/sound/soc/codecs/hdmi.c index 68342b121c966a..6d2fcf19fe6e7f 100644 --- a/sound/soc/codecs/hdmi.c +++ b/sound/soc/codecs/hdmi.c @@ -20,6 +20,7 @@ */ #include #include +#include #define DRV_NAME "hdmi-audio-codec" @@ -60,6 +61,14 @@ static struct snd_soc_dai_driver hdmi_codec_dai = { }; +#ifdef CONFIG_OF +static const struct of_device_id hdmi_audio_codec_ids[] = { + { .compatible = "linux,hdmi-audio", }, + { } +}; +MODULE_DEVICE_TABLE(of, hdmi_audio_codec_ids); +#endif + static struct snd_soc_codec_driver hdmi_codec = { .dapm_widgets = hdmi_widgets, .num_dapm_widgets = ARRAY_SIZE(hdmi_widgets), @@ -83,6 +92,7 @@ static struct platform_driver hdmi_codec_driver = { .driver = { .name = DRV_NAME, .owner = THIS_MODULE, + .of_match_table = of_match_ptr(hdmi_audio_codec_ids), }, .probe = hdmi_codec_probe, diff --git a/sound/soc/samsung/Kconfig b/sound/soc/samsung/Kconfig index 24b2e1d0f97fac..1c7d86ab3ebe29 100644 --- a/sound/soc/samsung/Kconfig +++ b/sound/soc/samsung/Kconfig @@ -70,6 +70,15 @@ config SND_SOC_SAMSUNG_SMDK_WM8994 help Say Y if you want to add support for SoC audio on the SMDKs. +config SND_SOC_SAMSUNG_HDMI_AUDIO + tristate "SoC I2S Audio support for HDMI Audio" + depends on SND_SOC_SAMSUNG && SOC_EXYNOS5250 + help + Say Y if you have a Samsung Exynos5250 (ARM) chipset with + a HDMI port and want to connect HDMI devices (e.g. TVs + which have audio output). This option enables the support + for routing audio through the HDMI port. + config SND_SOC_SAMSUNG_SMDK2443_WM9710 tristate "SoC AC97 Audio support for SMDK2443 - WM9710" depends on SND_SOC_SAMSUNG && MACH_SMDK2443 @@ -231,3 +240,16 @@ config SND_SOC_SMDK_I2S_STUB help Say Y if you want to add support for SoC audio on boards without exteral codec chip. + + +config SND_SOC_EXYNOS_MAX98095 + tristate "SoC I2S Audio support for MAX98095/90/89 on EXYNOS5" + depends on SND_SOC_SAMSUNG && SOC_EXYNOS5250 + select SND_SOC_MAX98095 + select SND_SOC_MAX98090 + select SND_SOC_MAX98088 + select SND_SAMSUNG_I2S + help + Say Y if you want to add support for SoC audio for max98095/90/89 + on exynos5. + diff --git a/sound/soc/samsung/Makefile b/sound/soc/samsung/Makefile index d2253219b4db17..1293420d88a392 100644 --- a/sound/soc/samsung/Makefile +++ b/sound/soc/samsung/Makefile @@ -7,6 +7,7 @@ snd-soc-ac97-objs := ac97.o snd-soc-s3c-i2s-v2-objs := s3c-i2s-v2.o snd-soc-samsung-spdif-objs := spdif.o snd-soc-pcm-objs := pcm.o +snd-soc-hdmi-audio-objs := hdmi_audio.o snd-soc-i2s-objs := i2s.o obj-$(CONFIG_SND_SOC_SAMSUNG) += snd-soc-s3c24xx.o @@ -16,6 +17,7 @@ obj-$(CONFIG_SND_S3C2412_SOC_I2S) += snd-soc-s3c2412-i2s.o obj-$(CONFIG_SND_S3C_I2SV2_SOC) += snd-soc-s3c-i2s-v2.o obj-$(CONFIG_SND_SAMSUNG_SPDIF) += snd-soc-samsung-spdif.o obj-$(CONFIG_SND_SAMSUNG_PCM) += snd-soc-pcm.o +obj-$(CONFIG_SND_SOC_SAMSUNG_HDMI_AUDIO) += snd-soc-hdmi-audio.o obj-$(CONFIG_SND_SAMSUNG_I2S) += snd-soc-i2s.o obj-$(CONFIG_SND_SAMSUNG_I2S) += snd-soc-idma.o @@ -32,6 +34,7 @@ snd-soc-h1940-uda1380-objs := h1940_uda1380.o snd-soc-rx1950-uda1380-objs := rx1950_uda1380.o snd-soc-smdk-wm8580-objs := smdk_wm8580.o snd-soc-smdk-wm8994-objs := smdk_wm8994.o +snd-soc-daisy-max98095-objs := daisy_max98095.o snd-soc-smdk-wm9713-objs := smdk_wm9713.o snd-soc-s3c64xx-smartq-wm8987-objs := smartq_wm8987.o snd-soc-goni-wm8994-objs := goni_wm8994.o @@ -57,6 +60,7 @@ obj-$(CONFIG_SND_SOC_SAMSUNG_H1940_UDA1380) += snd-soc-h1940-uda1380.o obj-$(CONFIG_SND_SOC_SAMSUNG_RX1950_UDA1380) += snd-soc-rx1950-uda1380.o obj-$(CONFIG_SND_SOC_SAMSUNG_SMDK_WM8580) += snd-soc-smdk-wm8580.o obj-$(CONFIG_SND_SOC_SAMSUNG_SMDK_WM8994) += snd-soc-smdk-wm8994.o +obj-$(CONFIG_SND_SOC_EXYNOS_MAX98095) += snd-soc-daisy-max98095.o obj-$(CONFIG_SND_SOC_SAMSUNG_SMDK_WM9713) += snd-soc-smdk-wm9713.o obj-$(CONFIG_SND_SOC_SMARTQ) += snd-soc-s3c64xx-smartq-wm8987.o obj-$(CONFIG_SND_SOC_SAMSUNG_SMDK_SPDIF) += snd-soc-smdk-spdif.o diff --git a/sound/soc/samsung/codec_plugin.h b/sound/soc/samsung/codec_plugin.h new file mode 100644 index 00000000000000..fd59ba9f953bfd --- /dev/null +++ b/sound/soc/samsung/codec_plugin.h @@ -0,0 +1,36 @@ +/* sound/soc/samsung/codec_plugin.h + * + * ALSA SoC Audio Layer - Samsung Codec Plugin + * + * Copyright (c) 2012 Samsung Electronics Co. Ltd. + * Rahul Sharma + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __SND_SOC_SAMSUNG_PLUGIN_H +#define __SND_SOC_SAMSUNG_PLUGIN_H + +struct audio_plugin_ops { + int (*set_state)(struct device *dev, int enable); + + int (*get_state)(struct device *dev, int *is_enabled); + + int (*get_jack_state)(struct device *dev, int *is_connected); + + int (*hw_params)(struct device *dev, struct snd_pcm_substream *, + struct snd_pcm_hw_params *, struct snd_soc_dai *); + + int (*trigger)(struct device *dev, struct snd_pcm_substream *, int, + struct snd_soc_dai *); +}; + +struct audio_codec_plugin { + struct device *dev; + struct audio_plugin_ops ops; + int (*jack_cb)(int plugged); +}; + +#endif /* __SND_SOC_SAMSUNG_PLUGIN_H */ diff --git a/sound/soc/samsung/daisy_max98095.c b/sound/soc/samsung/daisy_max98095.c new file mode 100644 index 00000000000000..b15b9fd65324db --- /dev/null +++ b/sound/soc/samsung/daisy_max98095.c @@ -0,0 +1,722 @@ +/* + * Exynos machine ASoC driver for boards using MAX98095 codec. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include "i2s.h" +#include "s3c-i2s-v2.h" +#include "../codecs/max98095.h" +#include "codec_plugin.h" + +#define DRV_NAME "daisy-snd-max98095" + +/* + * The initial rate that EPLL will be set to. This is the smallest multiple (4) + * of the desired master clock frequency 256 * FS for FS = 44.1khz that can + * be generated on both the 5250 and 5420 SoCs. + */ +#define DEFAULT_EPLL_RATE (256 * 44100 * 4) + +/* Audio clock settings are belonged to board specific part. Every + * board can set audio source clock setting which is matched with H/W + * like this function-'set_audio_clock_hierarchy'. + */ +static int set_audio_clock_hierarchy(struct platform_device *pdev) +{ + struct clk *fout_epll, *sclk_epll, *mout_audio0, *sclk_audio0; + struct clk *mout_audss, *mout_i2s; + int ret = 0; + + fout_epll = clk_get(&pdev->dev, "fout_epll"); + if (IS_ERR(fout_epll)) { + printk(KERN_WARNING "%s: Cannot find fout_epll.\n", + __func__); + return -EINVAL; + } + + sclk_epll = clk_get(&pdev->dev, "sclk_epll"); + if (IS_ERR(sclk_epll)) { + printk(KERN_WARNING "%s: Cannot find sclk_epll.\n", __func__); + ret = -EINVAL; + goto out1; + } + + mout_audio0 = clk_get(&pdev->dev, "mout_audio0"); + if (IS_ERR(mout_audio0)) { + printk(KERN_WARNING "%s: Cannot find mout_audio0.\n", __func__); + ret = -EINVAL; + goto out2; + } + + sclk_audio0 = clk_get(&pdev->dev, "sclk_audio0"); + if (IS_ERR(sclk_audio0)) { + printk(KERN_WARNING "%s: Cannot find sclk_audio0.\n", __func__); + ret = -EINVAL; + goto out3; + } + + mout_audss = clk_get(&pdev->dev, "mout_audss"); + if (IS_ERR(mout_audss)) { + printk(KERN_WARNING + "%s: Cannot find mout_audss clocks.\n", __func__); + ret = -EINVAL; + goto out4; + } + + mout_i2s = clk_get(&pdev->dev, "mout_i2s"); + if (IS_ERR(mout_i2s)) { + printk(KERN_WARNING + "%s: Cannot find mout_i2s clocks.\n", __func__); + ret = -EINVAL; + goto out5; + } + + /* + * fout_epll may have been initialized to operate at a frequency higher + * than the audio block's maximum (192Mhz on 5250, 200Mhz on 5420), + * so lower it to a reasonable rate here. If we attempt to set + * fout_epll as the parent of mout_audss when fout_epll is operating + * at a frequency higher than the audio block's maximum, the system + * may hang. + */ + ret = clk_set_rate(fout_epll, DEFAULT_EPLL_RATE); + if (ret < 0) { + printk(KERN_WARNING "Failed to set epll rate.\n"); + goto out6; + } + + /* Set audio clock hierarchy for S/PDIF */ + ret = clk_set_parent(sclk_epll, fout_epll); + if (ret < 0) { + printk(KERN_WARNING "Failed to set parent of epll.\n"); + goto out6; + } + ret = clk_set_parent(mout_audio0, sclk_epll); + if (ret < 0) { + printk(KERN_WARNING "Failed to set parent of mout audio0.\n"); + goto out6; + } + ret = clk_set_parent(mout_audss, fout_epll); + if (ret < 0) { + printk(KERN_WARNING "Failed to set parent of audss.\n"); + goto out6; + } + ret = clk_set_parent(mout_i2s, sclk_audio0); + if (ret < 0) { + printk(KERN_WARNING "Failed to set parent of mout i2s.\n"); + goto out6; + } + + /* Ensure that the divider between mout_audio0 and sclk_audio0 is 1. */ + ret = clk_set_rate(sclk_audio0, clk_get_rate(mout_audio0)); + if (ret < 0) + printk(KERN_WARNING "Failed to set audio bus rate (%d).\n", + ret); + +out6: + clk_put(mout_i2s); +out5: + clk_put(mout_audss); +out4: + clk_put(sclk_audio0); +out3: + clk_put(mout_audio0); +out2: + clk_put(sclk_epll); +out1: + clk_put(fout_epll); + + return ret; +} + +static int set_epll_rate(struct device *card_dev, unsigned long rate) +{ + int ret; + struct clk *fout_epll; + + fout_epll = clk_get(card_dev, "fout_epll"); + + if (IS_ERR(fout_epll)) { + printk(KERN_ERR "%s: failed to get fout_epll\n", __func__); + return PTR_ERR(fout_epll); + } + + if (rate == clk_get_rate(fout_epll)) + goto out; + + ret = clk_set_rate(fout_epll, rate); + if (ret < 0) { + printk(KERN_ERR "failed to clk_set_rate of fout_epll for audio\n"); + goto out; + } +out: + clk_put(fout_epll); + + return 0; +} + +static int daisy_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *codec_dai = rtd->codec_dai; + struct snd_soc_dai *cpu_dai = rtd->cpu_dai; + int bfs, psr, rfs, ret; + unsigned long rclk; + unsigned long fin_rate; + struct clk *fin_pll; + struct device *card_dev = substream->pcm->card->dev; + + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_U24: + case SNDRV_PCM_FORMAT_S24: + bfs = 48; + break; + case SNDRV_PCM_FORMAT_U16_LE: + case SNDRV_PCM_FORMAT_S16_LE: + bfs = 32; + break; + default: + return -EINVAL; + } + + switch (params_rate(params)) { + case 16000: + case 22050: + case 24000: + case 32000: + case 44100: + case 48000: + case 88200: + case 96000: + if (bfs == 48) + rfs = 384; + else + rfs = 256; + break; + case 64000: + rfs = 384; + break; + case 8000: + case 11025: + case 12000: + if (bfs == 48) + rfs = 768; + else + rfs = 512; + break; + default: + return -EINVAL; + } + + rclk = params_rate(params) * rfs; + + switch (rclk) { + case 4096000: + case 5644800: + case 6144000: + case 8467200: + case 9216000: + psr = 8; + break; + case 8192000: + case 11289600: + case 12288000: + case 16934400: + case 18432000: + psr = 4; + break; + case 22579200: + case 24576000: + case 33868800: + case 36864000: + psr = 2; + break; + case 67737600: + case 73728000: + psr = 1; + break; + default: + printk(KERN_ERR "rclk = %lu is not yet supported!\n", rclk); + return -EINVAL; + } + + ret = set_epll_rate(card_dev, rclk * psr); + if (ret < 0) + return ret; + + ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S | + SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBS_CFS); + if (ret < 0) + return ret; + + ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S | + SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBS_CFS); + if (ret < 0) + return ret; + + fin_pll = clk_get(NULL, "fin_pll"); + if (IS_ERR(fin_pll)) { + printk(KERN_ERR "%s: failed to get fin_pll clock\n", __func__); + return PTR_ERR(fin_pll); + } + + fin_rate = clk_get_rate(fin_pll); + clk_put(fin_pll); + + ret = snd_soc_dai_set_sysclk(codec_dai, 0, fin_rate, SND_SOC_CLOCK_IN); + if (ret < 0) + return ret; + + ret = snd_soc_dai_set_sysclk(cpu_dai, SAMSUNG_I2S_CDCLK, + 0, SND_SOC_CLOCK_OUT); + if (ret < 0) + return ret; + + ret = snd_soc_dai_set_clkdiv(cpu_dai, SAMSUNG_I2S_DIV_BCLK, bfs); + if (ret < 0) + return ret; + + return 0; +} + +/* + * MAX98095 DAI operations. + */ +static struct snd_soc_ops daisy_ops = { + .hw_params = daisy_hw_params, +}; + +static struct snd_soc_jack daisy_hp_jack; +static struct snd_soc_jack_pin daisy_hp_jack_pins[] = { + { + .pin = "Headphone Jack", + .mask = SND_JACK_HEADPHONE, + }, +}; + +static struct snd_soc_jack_gpio daisy_hp_jack_gpio = { + .name = "headphone detect", + .report = SND_JACK_HEADPHONE, +}; + +static struct snd_soc_jack daisy_mic_jack; +static struct snd_soc_jack_pin daisy_mic_jack_pins[] = { + { + .pin = "Mic Jack", + .mask = SND_JACK_MICROPHONE, + }, +}; + +static struct snd_soc_jack_gpio daisy_mic_jack_gpio = { + .name = "mic detect", + .report = SND_JACK_MICROPHONE, +}; + +static const struct snd_soc_dapm_route daisy_audio_map[] = { + {"Mic Jack", "NULL", "MICBIAS2"}, + {"MIC2", "NULL", "Mic Jack"}, +}; + +static const struct snd_soc_dapm_route max98090_audio_map[] = { + {"Mic Jack", "NULL", "MICBIAS"}, + {"MIC2", "NULL", "Mic Jack"}, +}; + +static const struct snd_soc_dapm_widget daisy_dapm_widgets[] = { + SND_SOC_DAPM_MIC("Mic Jack", NULL), + SND_SOC_DAPM_HP("Headphone Jack", NULL), +}; + +static struct snd_soc_jack daisy_hdmi_jack; + +static int get_hdmi(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct audio_codec_plugin *plugin; + int ret = 0, state = 0; + + plugin = (struct audio_codec_plugin *)kcontrol->private_value; + + if (!plugin) + return 0; + + if (!plugin->ops.hw_params) + return 0; + + ret = plugin->ops.get_state(plugin->dev, &state); + if (ret < 0) + return 0; + + ucontrol->value.integer.value[0] = (long int)state; + return 1; +} + +static int put_hdmi(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct audio_codec_plugin *plugin; + int ret = 0, state; + + plugin = (struct audio_codec_plugin *)kcontrol->private_value; + + if (!plugin) + return 0; + + if (!plugin->ops.hw_params) + return 0; + + state = (int)ucontrol->value.integer.value[0]; + ret = plugin->ops.set_state(plugin->dev, + ucontrol->value.integer.value[0]); + + if (ret < 0) + return 0; + return 1; +} + +static int daisy_hdmi_jack_report(int plugged) +{ + snd_soc_jack_report(&daisy_hdmi_jack, + plugged ? SND_JACK_AVOUT : 0, + SND_JACK_AVOUT); + return 0; +} + +static struct snd_kcontrol_new daisy_dapm_controls[] = { + SOC_SINGLE_BOOL_EXT("HDMI Playback Switch", 0, get_hdmi, put_hdmi), +}; + +static int daisy_init(struct snd_soc_pcm_runtime *rtd) +{ + struct snd_soc_codec *codec = rtd->codec; + struct snd_soc_dapm_context *dapm = &codec->dapm; + struct snd_soc_card *card = codec->card; + struct device_node *dn = card->dev->of_node; + struct device_node *codec_dn = codec->dev->of_node; + struct audio_codec_plugin *plugin; + + if (dn) { + enum of_gpio_flags flags; + + daisy_mic_jack_gpio.gpio = of_get_named_gpio_flags( + dn, "samsung,mic-det-gpios", 0, &flags); + daisy_mic_jack_gpio.invert = !!(flags & OF_GPIO_ACTIVE_LOW); + + daisy_hp_jack_gpio.gpio = of_get_named_gpio_flags( + dn, "samsung,hp-det-gpios", 0, &flags); + daisy_hp_jack_gpio.invert = !!(flags & OF_GPIO_ACTIVE_LOW); + } + + if (gpio_is_valid(daisy_mic_jack_gpio.gpio)) { + snd_soc_jack_new(codec, "Mic Jack", SND_JACK_MICROPHONE, + &daisy_mic_jack); + snd_soc_jack_add_pins(&daisy_mic_jack, + ARRAY_SIZE(daisy_mic_jack_pins), + daisy_mic_jack_pins); + snd_soc_jack_add_gpios(&daisy_mic_jack, 1, + &daisy_mic_jack_gpio); + } + + if (gpio_is_valid(daisy_hp_jack_gpio.gpio)) { + snd_soc_jack_new(codec, "Headphone Jack", + SND_JACK_HEADPHONE, &daisy_hp_jack); + snd_soc_jack_add_pins(&daisy_hp_jack, + ARRAY_SIZE(daisy_hp_jack_pins), + daisy_hp_jack_pins); + snd_soc_jack_add_gpios(&daisy_hp_jack, 1, + &daisy_hp_jack_gpio); + } + + plugin = (void *)daisy_dapm_controls[0].private_value; + if (plugin) { + int state; + snd_soc_jack_new(codec, "HDMI Jack", + SND_JACK_AVOUT, &daisy_hdmi_jack); + plugin->jack_cb = daisy_hdmi_jack_report; + + plugin->ops.get_jack_state(plugin->dev, &state); + daisy_hdmi_jack_report(state); + } + + /* Microphone BIAS is needed to power the analog mic. + * MICBIAS2 is connected to analog mic (MIC3, which is in turn + * connected to MIC2 via 'External MIC') on the max98095 codec. + * Microphone BIAS is controlled by MICBIAS + * on the max98090 / max98091 codec. + * + * Ultimately, the following should hold: + * + * Microphone in jack => MICBIAS/MICBIAS2 enabled && + * 'External Mic' = MIC2 + * Microphone not in jack => MICBIAS/MICBIAS2 disabled && + * 'External Mic' = MIC1 + */ + if (of_device_is_compatible(codec_dn, "maxim,max98095")) + snd_soc_dapm_force_enable_pin(dapm, "MICBIAS2"); + else + snd_soc_dapm_force_enable_pin(dapm, "MICBIAS"); + + snd_soc_dapm_sync(dapm); + + return 0; +} + +static int daisy_suspend_post(struct snd_soc_card *card) +{ + struct clk *mout_audss, *mout_i2s; + int ret; + + mout_audss = clk_get(card->dev, "mout_audss"); + if (IS_ERR(mout_audss)) { + pr_warn("Can't find mout_audss clock\n"); + ret = PTR_ERR(mout_audss); + goto out1; + } + mout_i2s = clk_get(card->dev, "mout_i2s"); + if (IS_ERR(mout_i2s)) { + pr_warn("Can't find mout_i2s clock\n"); + ret = PTR_ERR(mout_i2s); + goto out2; + } + + /* + * This really shouldn't fail. We probably won't come back from + * suspend if it does. + */ + ret = clk_set_parent(mout_i2s, mout_audss); + WARN_ON(ret < 0); + + clk_put(mout_i2s); +out2: + clk_put(mout_audss); +out1: + return ret; +} + +static int daisy_resume_pre(struct snd_soc_card *card) +{ + struct clk *sclk_audio0, *mout_i2s; + int ret; + + sclk_audio0 = clk_get(card->dev, "sclk_audio0"); + if (IS_ERR(sclk_audio0)) { + pr_warn("Can't find sclk_audio0 clock\n"); + ret = PTR_ERR(sclk_audio0); + goto out1; + } + mout_i2s = clk_get(card->dev, "mout_i2s"); + if (IS_ERR(mout_i2s)) { + pr_warn("Can't find mout_i2s clock\n"); + ret = PTR_ERR(mout_i2s); + goto out2; + } + + /* + * If we were able to reparent this for suspend, we ought to be + * able to change it back. + */ + ret = clk_set_parent(mout_i2s, sclk_audio0); + WARN_ON(ret < 0); + + clk_put(mout_i2s); +out2: + clk_put(sclk_audio0); +out1: + return ret; +} + +static int daisy_resume_post(struct snd_soc_card *card) +{ + if (gpio_is_valid(daisy_mic_jack_gpio.gpio)) + snd_soc_jack_gpio_detect(&daisy_mic_jack_gpio); + + if (gpio_is_valid(daisy_hp_jack_gpio.gpio)) + snd_soc_jack_gpio_detect(&daisy_hp_jack_gpio); + + return 0; +} + +static struct snd_soc_dai_link daisy_dai[] = { + { /* Primary DAI i/f */ + .name = "MAX98095 RX", + .stream_name = "Playback", + .codec_dai_name = "HiFi", + .init = daisy_init, + .ops = &daisy_ops, + }, { /* Capture i/f */ + .name = "MAX98095 TX", + .stream_name = "Capture", + .codec_dai_name = "HiFi", + .ops = &daisy_ops, + }, +}; + +static struct snd_soc_card daisy_snd = { + .name = "DAISY-I2S", + .dai_link = daisy_dai, + .num_links = ARRAY_SIZE(daisy_dai), + .controls = daisy_dapm_controls, + .num_controls = ARRAY_SIZE(daisy_dapm_controls), + .dapm_widgets = daisy_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(daisy_dapm_widgets), + .dapm_routes = daisy_audio_map, + .num_dapm_routes = ARRAY_SIZE(daisy_audio_map), + .suspend_post = daisy_suspend_post, + .resume_pre = daisy_resume_pre, + .resume_post = daisy_resume_post, +}; + +static int plugin_init(struct audio_codec_plugin **pplugin) +{ + struct device_node *plugin_node = NULL; + struct platform_device *plugin_pdev; + struct audio_codec_plugin *plugin; + + plugin_node = of_find_node_by_name(NULL, "hdmi-audio"); + if (!plugin_node) + return -EFAULT; + + plugin_pdev = of_find_device_by_node(plugin_node); + if (!plugin_pdev) + return -EFAULT; + + plugin = dev_get_drvdata(&plugin_pdev->dev); + if (!plugin) + return -EFAULT; + else + *pplugin = plugin; + + return 0; +} + +static int daisy_max98095_driver_probe(struct platform_device *pdev) +{ + struct snd_soc_card *card = &daisy_snd; + struct device_node *i2s_node, *codec_node; + struct audio_codec_plugin *plugin = NULL; + const char *name; + int i, ret; + + if (!pdev->dev.platform_data && !pdev->dev.of_node) { + dev_err(&pdev->dev, "No platform data supplied\n"); + return -EINVAL; + } + + name = of_get_property(pdev->dev.of_node, "card-name", NULL); + if (name) + card->name = name; + + i2s_node = of_parse_phandle(pdev->dev.of_node, + "samsung,i2s-controller", 0); + if (!i2s_node) { + dev_err(&pdev->dev, + "Property 'i2s-controller' missing or invalid\n"); + return -EINVAL; + } + codec_node = of_parse_phandle(pdev->dev.of_node, + "samsung,audio-codec", 0); + if (!codec_node) { + dev_err(&pdev->dev, + "Property 'audio-codec' missing or invalid\n"); + return -EINVAL; + } + + if (of_device_is_compatible(codec_node, "maxim,max98091") || + of_device_is_compatible(codec_node, "maxim,max98090") || + of_device_is_compatible(codec_node, "maxim,max98089")) { + card->dapm_routes = max98090_audio_map; + card->num_dapm_routes = ARRAY_SIZE(max98090_audio_map); + } + + for (i = 0; i < ARRAY_SIZE(daisy_dai); i++) { + daisy_dai[i].codec_of_node = codec_node; + daisy_dai[i].cpu_of_node = i2s_node; + daisy_dai[i].platform_of_node = i2s_node; + } + + plugin_init(&plugin); + daisy_dapm_controls[0].private_value = (unsigned long)plugin; + + card->dev = &pdev->dev; + + ret = snd_soc_register_card(card); + if (ret) { + dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", ret); + return ret; + } + + ret = set_audio_clock_hierarchy(pdev); + if (ret) { + dev_err(&pdev->dev, "failed to set up clock hierarchy (%d)\n", + ret); + snd_soc_unregister_card(card); + } + + return ret; +} + +static int daisy_max98095_driver_remove(struct platform_device *pdev) +{ + struct snd_soc_card *card = platform_get_drvdata(pdev); + + snd_soc_unregister_card(card); + + return 0; +} + +static const struct of_device_id daisy_max98095_of_match[] = { + { .compatible = "google,daisy-audio-max98095", }, + { .compatible = "google,daisy-audio-max98091", }, + { .compatible = "google,daisy-audio-max98090", }, + { .compatible = "google,daisy-audio-max98089", }, + {}, +}; + +static struct platform_driver daisy_max98095_driver = { + .driver = { + .name = DRV_NAME, + .owner = THIS_MODULE, + .pm = &snd_soc_pm_ops, + .of_match_table = daisy_max98095_of_match, + }, + .probe = daisy_max98095_driver_probe, + .remove = daisy_max98095_driver_remove, +}; + +module_platform_driver(daisy_max98095_driver); + +MODULE_DESCRIPTION("ALSA SoC DAISY MAX98095 machine driver"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/samsung/hdmi_audio.c b/sound/soc/samsung/hdmi_audio.c new file mode 100644 index 00000000000000..8b4aa2502171a4 --- /dev/null +++ b/sound/soc/samsung/hdmi_audio.c @@ -0,0 +1,726 @@ +/* sound/soc/samsung/hdmi_audio.c + * + * ALSA SoC Audio Layer - Samsung Hdmi Audio Plugin + * + * Copyright (c) 2012 Samsung Electronics Co. Ltd. + * Rahul Sharma + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "codec_plugin.h" +#include "hdmi_audio.h" + +#define DRV_NAME "exynos-hdmi-audio" +#define HDMI_POWERON_WAIT_COUNT (60) + +struct hdmi_audio_params { + u32 sample_rate; + u32 cts; + u32 n; + u32 sample_frq; +}; + +struct hdmi_audio_params audio_params[] = { + { 32000, 27000, 4096, 0x3 }, + { 44100, 30000, 6272, 0x0 }, + { 88200, 30000, 12544, 0x8 }, + { 176400, 30000, 25088, 0xc }, + { 48000, 27000, 6144, 0x2 }, + { 96000, 27000, 12288, 0xa }, + { 192000, 27000, 24576, 0xe }, +}; + +static inline u32 hdmi_reg_read(struct hdmi_audio_context *ctx, u32 reg_id) +{ + return readl(ctx->regs + reg_id); +} + +static inline void hdmi_reg_writeb(struct hdmi_audio_context *ctx, + u32 reg_id, u8 value) +{ + writeb(value, ctx->regs + reg_id); +} + +static inline void hdmi_reg_writemask(struct hdmi_audio_context *ctx, + u32 reg_id, u32 value, u32 mask) +{ + u32 old = readl(ctx->regs + reg_id); + value = (value & mask) | (old & ~mask); + writel(value, ctx->regs + reg_id); +} + +static int hdmi_get_audio_params(u32 freq) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(audio_params); ++i) + if (freq == audio_params[i].sample_rate) + return i; + + return -ENXIO; +} + +static void hdmi_set_acr(struct hdmi_audio_context *ctx, u8 *acr) +{ + u32 n, cts; + + n = ctx->params.n; + cts = ctx->params.cts; + + acr[1] = cts >> 16; + acr[2] = cts >> 8 & 0xff; + acr[3] = cts & 0xff; + + acr[4] = n >> 16; + acr[5] = n >> 8 & 0xff; + acr[6] = n & 0xff; +} + +static void hdmi_reg_acr(struct hdmi_audio_context *ctx, u8 *acr) +{ + hdmi_reg_writeb(ctx, HDMI_ACR_N0, acr[6]); + hdmi_reg_writeb(ctx, HDMI_ACR_N1, acr[5]); + hdmi_reg_writeb(ctx, HDMI_ACR_N2, acr[4]); + hdmi_reg_writeb(ctx, HDMI_ACR_MCTS0, acr[3]); + hdmi_reg_writeb(ctx, HDMI_ACR_MCTS1, acr[2]); + hdmi_reg_writeb(ctx, HDMI_ACR_MCTS2, acr[1]); + hdmi_reg_writeb(ctx, HDMI_ACR_CTS0, acr[3]); + hdmi_reg_writeb(ctx, HDMI_ACR_CTS1, acr[2]); + hdmi_reg_writeb(ctx, HDMI_ACR_CTS2, acr[1]); + hdmi_reg_writeb(ctx, HDMI_ACR_CON, 4); +} + +static void hdmi_audio_i2s_init(struct hdmi_audio_context *ctx) +{ + u32 sample_rate, bits_per_sample, frame_size_code; + u32 data_num, bit_ch, sample_frq; + u32 val; + u8 acr[7]; + + sample_rate = ctx->params.sample_rate; + bits_per_sample = ctx->params.bits_per_sample; + frame_size_code = 0; + + switch (bits_per_sample) { + case 16: + data_num = 1; + bit_ch = 0; + break; + case 20: + data_num = 2; + bit_ch = 1; + break; + case 24: + data_num = 3; + bit_ch = 1; + break; + case 32: + data_num = 1; + bit_ch = 2; + break; + default: + data_num = 1; + bit_ch = 0; + break; + } + + hdmi_set_acr(ctx, acr); + hdmi_reg_acr(ctx, acr); + + hdmi_reg_writeb(ctx, HDMI_I2S_MUX_CON, HDMI_I2S_IN_DISABLE + | HDMI_I2S_AUD_I2S | HDMI_I2S_CUV_I2S_ENABLE + | HDMI_I2S_MUX_ENABLE); + + hdmi_reg_writeb(ctx, HDMI_I2S_MUX_CH, HDMI_I2S_CH0_EN + | HDMI_I2S_CH1_EN | HDMI_I2S_CH2_EN); + + hdmi_reg_writeb(ctx, HDMI_I2S_MUX_CUV, HDMI_I2S_CUV_RL_EN); + + sample_frq = ctx->params.sample_frq; + + hdmi_reg_writeb(ctx, HDMI_I2S_CLK_CON, HDMI_I2S_CLK_DIS); + hdmi_reg_writeb(ctx, HDMI_I2S_CLK_CON, HDMI_I2S_CLK_EN); + + val = hdmi_reg_read(ctx, HDMI_I2S_DSD_CON) | 0x01; + hdmi_reg_writeb(ctx, HDMI_I2S_DSD_CON, val); + + /* Configuration I2S input ports. Configure I2S_PIN_SEL_0~4 */ + hdmi_reg_writeb(ctx, HDMI_I2S_PIN_SEL_0, HDMI_I2S_SEL_SCLK(5) + | HDMI_I2S_SEL_LRCK(6)); + hdmi_reg_writeb(ctx, HDMI_I2S_PIN_SEL_1, HDMI_I2S_SEL_SDATA1(1) + | HDMI_I2S_SEL_SDATA2(4)); + hdmi_reg_writeb(ctx, HDMI_I2S_PIN_SEL_2, HDMI_I2S_SEL_SDATA3(1) + | HDMI_I2S_SEL_SDATA2(2)); + hdmi_reg_writeb(ctx, HDMI_I2S_PIN_SEL_3, HDMI_I2S_SEL_DSD(0)); + + /* I2S_CON_1 & 2 */ + hdmi_reg_writeb(ctx, HDMI_I2S_CON_1, HDMI_I2S_SCLK_FALLING_EDGE + | HDMI_I2S_L_CH_LOW_POL); + hdmi_reg_writeb(ctx, HDMI_I2S_CON_2, HDMI_I2S_MSB_FIRST_MODE + | HDMI_I2S_SET_BIT_CH(bit_ch) + | HDMI_I2S_SET_SDATA_BIT(data_num) + | HDMI_I2S_BASIC_FORMAT); + + /* Configure register related to CUV information */ + hdmi_reg_writeb(ctx, HDMI_I2S_CH_ST_0, HDMI_I2S_CH_STATUS_MODE_0 + | HDMI_I2S_2AUD_CH_WITHOUT_PREEMPH + | HDMI_I2S_COPYRIGHT + | HDMI_I2S_LINEAR_PCM + | HDMI_I2S_CONSUMER_FORMAT); + hdmi_reg_writeb(ctx, HDMI_I2S_CH_ST_1, HDMI_I2S_CD_PLAYER); + hdmi_reg_writeb(ctx, HDMI_I2S_CH_ST_2, HDMI_I2S_SET_SOURCE_NUM(0)); + hdmi_reg_writeb(ctx, HDMI_I2S_CH_ST_3, HDMI_I2S_CLK_ACCUR_LEVEL_2 + | HDMI_I2S_SET_SMP_FREQ(sample_frq)); + hdmi_reg_writeb(ctx, HDMI_I2S_CH_ST_4, + HDMI_I2S_ORG_SMP_FREQ_44_1 + | HDMI_I2S_WORD_LEN_MAX24_24BITS + | HDMI_I2S_WORD_LEN_MAX_24BITS); + + hdmi_reg_writeb(ctx, HDMI_I2S_CH_ST_CON, HDMI_I2S_CH_STATUS_RELOAD); +} + +static void hdmi_audio_init(struct hdmi_audio_context *ctx) +{ + hdmi_audio_i2s_init(ctx); +} + +static bool hdmi_phy_stable(struct hdmi_audio_context *ctx) +{ + u32 phy_state = hdmi_reg_read(ctx, HDMI_PHY_STATUS_0); + return phy_state & HDMI_PHY_STATUS_READY; +} + +static int hdmi_audio_control(struct hdmi_audio_context *ctx, + bool onoff) +{ + u32 mod; + + snd_printdd("[%d] %s on %d\n", __LINE__, __func__, onoff); + + mod = hdmi_reg_read(ctx, HDMI_MODE_SEL); + + /* + * DVI mode bit carries correct mode information only when hdmi + * phy is in stable state. Else should be ignored. + */ + if ((mod & HDMI_DVI_MODE_EN) && hdmi_phy_stable(ctx) && onoff) { + snd_printdd("dvi mode on\n"); + return -EINVAL; + } + + hdmi_reg_writeb(ctx, HDMI_AUI_CON, onoff ? + HDMI_AUI_CON_TRANS_EVERY_VSYNC : HDMI_AUI_CON_NO_TRAN); + hdmi_reg_writemask(ctx, HDMI_CON_0, onoff ? + HDMI_ASP_EN : HDMI_ASP_DIS, HDMI_ASP_MASK); + return 0; +} + +static u8 hdmi_chksum(struct hdmi_audio_context *ctx, + u32 start, u8 len, u32 hdr_sum) +{ + int i; + /* hdr_sum : header0 + header1 + header2 + * start : start address of packet byte1 + * len : packet bytes - 1 */ + for (i = 0; i < len; ++i) + hdr_sum += 0xff & hdmi_reg_read(ctx, start + i * 4); + + return (u8)(0x100 - (hdr_sum & 0xff)); +} + +static void hdmi_reg_infoframe(struct hdmi_audio_context *ctx, + struct hdmi_infoframe *infoframe) +{ + u32 hdr_sum; + u8 chksum; + hdmi_reg_writeb(ctx, HDMI_AUI_HEADER0, infoframe->type); + hdmi_reg_writeb(ctx, HDMI_AUI_HEADER1, infoframe->ver); + hdmi_reg_writeb(ctx, HDMI_AUI_HEADER2, infoframe->len); + hdr_sum = infoframe->type + infoframe->ver + infoframe->len; + chksum = hdmi_chksum(ctx, HDMI_AUI_BYTE(1), + infoframe->len, hdr_sum); + hdmi_reg_writeb(ctx, HDMI_AUI_CHECK_SUM, chksum); +} + +static void hdmi_conf_init(struct hdmi_audio_context *ctx) +{ + struct hdmi_infoframe infoframe; + + snd_printdd("[%d] %s\n", __LINE__, __func__); + + /* enable AVI packet every vsync, fixes purple line problem */ + hdmi_reg_writemask(ctx, HDMI_CON_1, 2, 3 << 5); + + infoframe.type = HDMI_PACKET_TYPE_AUI; + infoframe.ver = HDMI_AUI_VERSION; + infoframe.len = HDMI_AUI_LENGTH; + hdmi_reg_infoframe(ctx, &infoframe); +} + +static int hdmi_audio_hw_params(struct device *dev, + struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct hdmi_audio_context *ctx = NULL; + struct audio_codec_plugin *plugin; + int ret = 0, index; + + if (!dev) { + dev_err(dev, "invalid device.\n"); + ret = -EINVAL; + goto err; + } + + if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK) + return -EINVAL; + + snd_printdd("[%d] %s\n", __LINE__, __func__); + + plugin = dev_get_drvdata(dev); + ctx = container_of(plugin, struct hdmi_audio_context, plugin); + + switch (params_channels(params)) { + case 6: + case 4: + case 2: + case 1: + ctx->params.chan_count = params_channels(params); + break; + default: + dev_err(dev, "%d channels not supported\n", + params_channels(params)); + ret = -EINVAL; + goto err; + } + + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S8: + ctx->params.bits_per_sample = 8; + break; + case SNDRV_PCM_FORMAT_S16_LE: + ctx->params.bits_per_sample = 16; + break; + case SNDRV_PCM_FORMAT_S24_LE: + ctx->params.bits_per_sample = 24; + break; + default: + dev_err(dev, "Format(%d) not supported\n", + params_format(params)); + ret = -EINVAL; + goto err; + } + + index = hdmi_get_audio_params(params_rate(params)); + if (index >= 0) { + ctx->params.sample_rate = audio_params[index].sample_rate; + ctx->params.sample_frq = audio_params[index].sample_frq; + ctx->params.cts = audio_params[index].cts; + ctx->params.n = audio_params[index].n; + } else { + dev_err(dev, "Sampling Rate (%d) not supported\n", + params_rate(params)); + ret = -EINVAL; + goto err; + } + + snd_printdd("chan cnt [%d]\n", ctx->params.chan_count); + snd_printdd("bps [%d]\n", ctx->params.bits_per_sample); + snd_printdd("sample_rate [%d]\n", ctx->params.sample_rate); + + /* checking here to cache audioparms for hpd plug handling */ + if (!atomic_read(&ctx->plugged)) + return -EINVAL; + + hdmi_audio_control(ctx, false); + hdmi_conf_init(ctx); + hdmi_audio_init(ctx); + return ret; + +err: + hdmi_audio_control(ctx, false); + return ret; +} + +static int hdmi_audio_trigger(struct device *dev, + struct snd_pcm_substream *substream, int cmd, + struct snd_soc_dai *dai) +{ + struct hdmi_audio_context *ctx = NULL; + struct audio_codec_plugin *plugin; + int ret = 0; + + if (!dev) { + dev_err(dev, "invalid device.\n"); + return -EINVAL; + } + + if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK) + return -EINVAL; + + snd_printdd("[%d] %s\n", __LINE__, __func__); + + plugin = dev_get_drvdata(dev); + ctx = container_of(plugin, struct hdmi_audio_context, plugin); + + if (!atomic_read(&ctx->plugged)) + return -EINVAL; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + if (!ctx->enabled) + return -EINVAL; + ret = hdmi_audio_control(ctx, true); + if (ret) { + dev_err(dev, "audio enable failed.\n"); + return -EINVAL; + } + break; + case SNDRV_PCM_TRIGGER_STOP: + hdmi_audio_control(ctx, false); + break; + } + return ret; +} + +static int hdmi_set_state(struct device *dev, int enable) +{ + struct hdmi_audio_context *ctx = NULL; + struct audio_codec_plugin *plugin; + + if (!dev) { + dev_err(dev, "invalid device.\n"); + return -EINVAL; + } + + snd_printdd("[%d] %s en %d\n", __LINE__, __func__, enable); + + plugin = dev_get_drvdata(dev); + ctx = container_of(plugin, struct hdmi_audio_context, plugin); + ctx->enabled = !!enable; + + if (!atomic_read(&ctx->plugged)) + return -EINVAL; + + hdmi_audio_control(ctx, !!enable); + + return 0; +} + +static int hdmi_get_state(struct device *dev, int *is_enabled) +{ + struct hdmi_audio_context *ctx = NULL; + struct audio_codec_plugin *plugin; + + if (!dev) { + dev_err(dev, "invalid device.\n"); + return -EINVAL; + } + + snd_printdd("[%d] %s\n", __LINE__, __func__); + + plugin = dev_get_drvdata(dev); + ctx = container_of(plugin, struct hdmi_audio_context, plugin); + + if (is_enabled && ctx) + *is_enabled = ctx->enabled; + else + return -EINVAL; + return 0; +} + +static int hdmi_get_jack_state(struct device *dev, int *is_connected) +{ + struct hdmi_audio_context *ctx = NULL; + struct audio_codec_plugin *plugin; + + if (!dev) { + dev_err(dev, "invalid device.\n"); + return -EINVAL; + } + + snd_printdd("[%d] %s\n", __LINE__, __func__); + + plugin = dev_get_drvdata(dev); + ctx = container_of(plugin, struct hdmi_audio_context, plugin); + + if (is_connected && ctx) + *is_connected = atomic_read(&ctx->plugged); + else + return -EINVAL; + return 0; +} + +static void hdmi_audio_hotplug_func(struct work_struct *work) +{ + struct hdmi_audio_context *ctx = container_of(work, + struct hdmi_audio_context, hotplug_work.work); + int plugged; + static int tries = HDMI_POWERON_WAIT_COUNT; + + snd_printdd("[%d] %s plugged %d tries %d.\n", + __LINE__, __func__, atomic_read(&ctx->plugged), tries); + + plugged = atomic_read(&ctx->plugged); + + /* skip if unplugged */ + if (!plugged) + goto report_event; + + /* wait till hdmiphy is stable */ + if (!hdmi_phy_stable(ctx)) { + if (--tries) { + cancel_delayed_work(&ctx->hotplug_work); + queue_delayed_work(ctx->hpd_wq, &ctx->hotplug_work, + msecs_to_jiffies(50)); + } else { + /* hdmi is still off, reset count. */ + tries = HDMI_POWERON_WAIT_COUNT; + } + return; + } + + if (hdmi_reg_read(ctx, HDMI_MODE_SEL) & HDMI_DVI_MODE_EN) { + /* If HDMI operates in DVI mode, + * for audio purposes it is the same as nothing plugged. + * So, change the "ctx->plugged" state to unplugged. + * Also, simulate unplugging for jack_cb, as this + * takes care of swapping HDMI with DVI when suspended. + */ + atomic_set(&ctx->plugged, 0); + plugged = false; + goto report_event; + } + + snd_printdd("[%d] %s hdmi powered on after %d tries\n", + __LINE__, __func__, HDMI_POWERON_WAIT_COUNT - tries); + + hdmi_audio_control(ctx, false); + hdmi_conf_init(ctx); + hdmi_audio_init(ctx); + if (ctx->enabled) + hdmi_audio_control(ctx, true); + +report_event: + tries = HDMI_POWERON_WAIT_COUNT; + if (ctx->plugin.jack_cb) + ctx->plugin.jack_cb(plugged); +} + +static irqreturn_t hdmi_audio_irq_handler(int irq, void *arg) +{ + struct hdmi_audio_context *ctx = arg; + u32 val = gpio_get_value(ctx->hpd_gpio); + + atomic_set(&ctx->plugged, !!val); + snd_printdd("%s %s\n", __func__, + atomic_read(&ctx->plugged) ? "plugged" : "unplugged"); + + queue_delayed_work(ctx->hpd_wq, &ctx->hotplug_work, 0); + return IRQ_HANDLED; +} + + +static int hdmi_audio_probe(struct platform_device *pdev) +{ + int ret = 0; + struct hdmi_audio_context *ctx; + struct resource *res; + struct device_node *parent_node; + + snd_printdd("[%d] %s\n", __LINE__, __func__); + + ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); + if (!ctx) { + dev_err(&pdev->dev, "failed to alloc common hdmi audio context.\n"); + ret = -ENOMEM; + goto err; + } + + ctx->pdev = pdev; + ctx->enabled = true; + ctx->plugin.dev = &pdev->dev; + ctx->plugin.ops.hw_params = hdmi_audio_hw_params; + ctx->plugin.ops.trigger = hdmi_audio_trigger; + ctx->plugin.ops.get_state = hdmi_get_state; + ctx->plugin.ops.set_state = hdmi_set_state; + ctx->plugin.ops.get_jack_state = hdmi_get_jack_state; + ctx->params.sample_rate = DEFAULT_RATE; + ctx->params.bits_per_sample = DEFAULT_BPS; + + dev_set_drvdata(&pdev->dev, &ctx->plugin); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(&pdev->dev, "failed to find registers.\n"); + ret = -ENOENT; + goto err_mem; + } + + ctx->regs = ioremap(res->start, resource_size(res)); + if (!ctx->regs) { + dev_err(&pdev->dev, "failed to map registers\n"); + ret = -ENXIO; + goto err_mem; + } + + /* create workqueue and hotplug work */ + ctx->hpd_wq = alloc_workqueue("exynos-hdmi-audio", + WQ_UNBOUND | WQ_NON_REENTRANT, 1); + if (ctx->hpd_wq == NULL) { + dev_err(&pdev->dev, "failed to create workqueue\n"); + ret = -ENOMEM; + goto err_unmap; + } + INIT_DELAYED_WORK(&ctx->hotplug_work, hdmi_audio_hotplug_func); + + res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (res == NULL) { + dev_err(&pdev->dev, "get interrupt res failed.\n"); + ret = -ENXIO; + goto err_workq; + } + + parent_node = of_get_parent(pdev->dev.of_node); + if (!parent_node) { + dev_err(&pdev->dev, "no parent node found.\n"); + ret = -EINVAL; + goto err_workq; + } + + ctx->parent_pdev = of_find_device_by_node(parent_node); + if (!ctx->parent_pdev) { + dev_err(&pdev->dev, "no parent pdev found.\n"); + ret = -EINVAL; + goto err_workq; + } + + ctx->hpd_gpio = (int)pdev->dev.platform_data; + + if (!gpio_is_valid(ctx->hpd_gpio)) { + dev_err(&pdev->dev, "failed to get hpd gpio."); + ret = -EINVAL; + goto err_workq; + } + + atomic_set(&ctx->plugged, gpio_get_value(ctx->hpd_gpio)); + ctx->ext_irq = gpio_to_irq(ctx->hpd_gpio); + + ret = request_irq(ctx->ext_irq, + hdmi_audio_irq_handler, IRQF_TRIGGER_RISING | + IRQF_TRIGGER_FALLING | IRQF_ONESHOT | IRQF_SHARED, + "ext_hdmi_audio", ctx); + if (ret) { + dev_err(&pdev->dev, "request interrupt failed.\n"); + goto err_irq; + } + + return ret; + +err_irq: + disable_irq(ctx->int_irq); + free_irq(ctx->int_irq, ctx); +err_workq: + destroy_workqueue(ctx->hpd_wq); +err_unmap: + iounmap(ctx->regs); +err_mem: + kfree(ctx); +err: + return ret; +} + +static int hdmi_audio_remove(struct platform_device *pdev) +{ + struct hdmi_audio_context *ctx = NULL; + int ret = 0; + + ctx = dev_get_drvdata(&pdev->dev); + + disable_irq(ctx->int_irq); + free_irq(ctx->int_irq, ctx); + disable_irq(ctx->ext_irq); + free_irq(ctx->ext_irq, ctx); + destroy_workqueue(ctx->hpd_wq); + iounmap(ctx->regs); + kfree(ctx); + + return ret; +} + +#ifdef CONFIG_PM_SLEEP +static int hdmi_audio_suspend(struct device *dev) +{ + struct hdmi_audio_context *ctx = NULL; + struct audio_codec_plugin *plugin; + + snd_printdd("[%d] %s\n", __LINE__, __func__); + + plugin = dev_get_drvdata(dev); + ctx = container_of(plugin, struct hdmi_audio_context, plugin); + + disable_irq(ctx->int_irq); + atomic_set(&ctx->plugged, 0); + return 0; +} + +static int hdmi_audio_resume(struct device *dev) +{ + struct hdmi_audio_context *ctx = NULL; + struct audio_codec_plugin *plugin; + u32 val; + + snd_printdd("[%d] %s\n", __LINE__, __func__); + + plugin = dev_get_drvdata(dev); + ctx = container_of(plugin, struct hdmi_audio_context, plugin); + + val = gpio_get_value(ctx->hpd_gpio); + atomic_set(&ctx->plugged, !!val); + + queue_delayed_work(ctx->hpd_wq, &ctx->hotplug_work, 0); + enable_irq(ctx->int_irq); + return 0; +} +#endif + +static const struct dev_pm_ops hdmi_audio_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(hdmi_audio_suspend, hdmi_audio_resume) +}; + +static struct platform_driver hdmi_audio_driver = { + .driver = { + .name = DRV_NAME, + .owner = THIS_MODULE, + .pm = &hdmi_audio_pm_ops, + }, + .probe = hdmi_audio_probe, + .remove = hdmi_audio_remove, +}; + +module_platform_driver(hdmi_audio_driver); + +MODULE_AUTHOR("Rahul Sharma "); +MODULE_DESCRIPTION("HDMI Audio Codec Plugin"); +MODULE_VERSION("1:1.0"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:" DRV_NAME); diff --git a/sound/soc/samsung/hdmi_audio.h b/sound/soc/samsung/hdmi_audio.h new file mode 100644 index 00000000000000..f1c998d2b13d48 --- /dev/null +++ b/sound/soc/samsung/hdmi_audio.h @@ -0,0 +1,369 @@ +/* sound/soc/samsung/hdmi_audio.h + * + * ALSA SoC Audio Layer - Samsung S/PDIF Controller driver + * + * Copyright (c) 2012 Samsung Electronics Co. Ltd + * http://www.samsung.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __SND_SOC_SAMSUNG_HDMI_AUDIO_H +#define __SND_SOC_SAMSUNG_HDMI_AUDIO_H + +#define BYTE0_CLR (~((u32)0xFF)) + +/* + * Register part +*/ + +/* HDMI Version 1.3 & Common */ +#define HDMI_CTRL_BASE(x) ((x) + 0x00000000) +#define HDMI_CORE_BASE(x) ((x) + 0x00010000) +#define HDMI_I2S_BASE(x) ((x) + 0x00040000) + +/* Core registers */ +#define HDMI_MODE_SEL HDMI_CORE_BASE(0x0040) +#define HDMI_CON_0 HDMI_CORE_BASE(0x0000) +#define HDMI_CON_1 HDMI_CORE_BASE(0x0004) + +/* Control registers */ +#define HDMI_HPD_STATUS HDMI_CTRL_BASE(0x000C) +#define HDMI_PHY_STATUS_0 HDMI_CTRL_BASE(0x0020) + +/* Audio related registers */ +#define HDMI_ASP_CON HDMI_CORE_BASE(0x0300) +#define HDMI_ASP_SP_FLAT HDMI_CORE_BASE(0x0304) +#define HDMI_ASP_CHCFG0 HDMI_CORE_BASE(0x0310) +#define HDMI_ASP_CHCFG1 HDMI_CORE_BASE(0x0314) +#define HDMI_ASP_CHCFG2 HDMI_CORE_BASE(0x0318) +#define HDMI_ASP_CHCFG3 HDMI_CORE_BASE(0x031C) + +#define HDMI_ACR_CON HDMI_CORE_BASE(0x0400) +#define HDMI_ACR_MCTS0 HDMI_CORE_BASE(0x0410) +#define HDMI_ACR_MCTS1 HDMI_CORE_BASE(0x0414) +#define HDMI_ACR_MCTS2 HDMI_CORE_BASE(0x0418) +#define HDMI_ACR_CTS0 HDMI_CORE_BASE(0x0420) +#define HDMI_ACR_CTS1 HDMI_CORE_BASE(0x0424) +#define HDMI_ACR_CTS2 HDMI_CORE_BASE(0x0428) +#define HDMI_ACR_N0 HDMI_CORE_BASE(0x0430) +#define HDMI_ACR_N1 HDMI_CORE_BASE(0x0434) +#define HDMI_ACR_N2 HDMI_CORE_BASE(0x0438) + +/* Packet related registers */ +#define HDMI_ACP_CON HDMI_CORE_BASE(0x0500) +#define HDMI_ACP_TYPE HDMI_CORE_BASE(0x0514) +#define HDMI_ACP_DATA(n) HDMI_CORE_BASE(0x0520 + 4 * (n)) + +#define HDMI_ISRC_CON HDMI_CORE_BASE(0x0600) +#define HDMI_ISRC1_HEADER1 HDMI_CORE_BASE(0x0614) +#define HDMI_ISRC1_DATA(n) HDMI_CORE_BASE(0x0620 + 4 * (n)) +#define HDMI_ISRC2_DATA(n) HDMI_CORE_BASE(0x06A0 + 4 * (n)) + +#define HDMI_AVI_CON HDMI_CORE_BASE(0x0700) +#define HDMI_AVI_HEADER0 HDMI_CORE_BASE(0x0710) +#define HDMI_AVI_HEADER1 HDMI_CORE_BASE(0x0714) +#define HDMI_AVI_HEADER2 HDMI_CORE_BASE(0x0718) +#define HDMI_AVI_CHECK_SUM HDMI_CORE_BASE(0x071C) +#define HDMI_AVI_BYTE(n) HDMI_CORE_BASE(0x0720 + 4 * (n-1)) + +#define HDMI_AUI_CON HDMI_CORE_BASE(0x0800) +#define HDMI_AUI_HEADER0 HDMI_CORE_BASE(0x0810) +#define HDMI_AUI_HEADER1 HDMI_CORE_BASE(0x0814) +#define HDMI_AUI_HEADER2 HDMI_CORE_BASE(0x0818) +#define HDMI_AUI_CHECK_SUM HDMI_CORE_BASE(0x081C) +#define HDMI_AUI_BYTE(n) HDMI_CORE_BASE(0x0820 + 4 * (n-1)) + +#define HDMI_MPG_CON HDMI_CORE_BASE(0x0900) +#define HDMI_MPG_CHECK_SUM HDMI_CORE_BASE(0x091C) +#define HDMI_MPG_DATA(n) HDMI_CORE_BASE(0x0920 + 4 * (n-1)) + +#define HDMI_SPD_CON HDMI_CORE_BASE(0x0A00) +#define HDMI_SPD_HEADER0 HDMI_CORE_BASE(0x0A10) +#define HDMI_SPD_HEADER1 HDMI_CORE_BASE(0x0A14) +#define HDMI_SPD_HEADER2 HDMI_CORE_BASE(0x0A18) +#define HDMI_SPD_DATA(n) HDMI_CORE_BASE(0x0A20 + 4 * (n)) + +#define HDMI_GAMUT_CON HDMI_CORE_BASE(0x0B00) +#define HDMI_GAMUT_HEADER0 HDMI_CORE_BASE(0x0B10) +#define HDMI_GAMUT_HEADER1 HDMI_CORE_BASE(0x0B14) +#define HDMI_GAMUT_HEADER2 HDMI_CORE_BASE(0x0B18) +#define HDMI_GAMUT_METADATA(n) HDMI_CORE_BASE(0x0B20 + 4 * (n)) + +#define HDMI_VSI_CON HDMI_CORE_BASE(0x0C00) +#define HDMI_VSI_HEADER0 HDMI_CORE_BASE(0x0C10) +#define HDMI_VSI_HEADER1 HDMI_CORE_BASE(0x0C14) +#define HDMI_VSI_HEADER2 HDMI_CORE_BASE(0x0C18) +#define HDMI_VSI_DATA(n) HDMI_CORE_BASE(0x0C20 + 4 * (n)) + +#define HDMI_DC_CONTROL HDMI_CORE_BASE(0x0D00) +#define HDMI_VIDEO_PATTERN_GEN HDMI_CORE_BASE(0x0D04) + +#define HDMI_AN_SEED_SEL HDMI_CORE_BASE(0x0E48) +#define HDMI_AN_SEED_0 HDMI_CORE_BASE(0x0E58) +#define HDMI_AN_SEED_1 HDMI_CORE_BASE(0x0E5C) +#define HDMI_AN_SEED_2 HDMI_CORE_BASE(0x0E60) +#define HDMI_AN_SEED_3 HDMI_CORE_BASE(0x0E64) + +/* HDMI_INTC_FLAG */ +#define HDMI_INTC_FLAG_HPD_PLUG (1 << 3) +#define HDMI_INTC_FLAG_HPD_UNPLUG (1 << 2) + +/* HDMI_MODE_SEL */ +#define HDMI_MODE_HDMI_EN (1 << 1) +#define HDMI_MODE_DVI_EN (1 << 0) +#define HDMI_DVI_MODE_EN (1) + +/* HDMI_CON_0 */ +#define HDMI_BLUE_SCR_EN (1 << 5) +#define HDMI_ASP_EN (1 << 2) +#define HDMI_ASP_DIS (0 << 2) +#define HDMI_ASP_MASK (1 << 2) +#define HDMI_EN (1 << 0) + +/* HDMI_PHY_STATUS */ +#define HDMI_PHY_STATUS_READY (1 << 0) + +/* HDMI I2S register */ +#define HDMI_I2S_CLK_CON HDMI_I2S_BASE(0x000) +#define HDMI_I2S_CON_1 HDMI_I2S_BASE(0x004) +#define HDMI_I2S_CON_2 HDMI_I2S_BASE(0x008) +#define HDMI_I2S_PIN_SEL_0 HDMI_I2S_BASE(0x00c) +#define HDMI_I2S_PIN_SEL_1 HDMI_I2S_BASE(0x010) +#define HDMI_I2S_PIN_SEL_2 HDMI_I2S_BASE(0x014) +#define HDMI_I2S_PIN_SEL_3 HDMI_I2S_BASE(0x018) +#define HDMI_I2S_DSD_CON HDMI_I2S_BASE(0x01c) +#define HDMI_I2S_MUX_CON HDMI_I2S_BASE(0x020) +#define HDMI_I2S_CH_ST_CON HDMI_I2S_BASE(0x024) +#define HDMI_I2S_CH_ST_0 HDMI_I2S_BASE(0x028) +#define HDMI_I2S_CH_ST_1 HDMI_I2S_BASE(0x02c) +#define HDMI_I2S_CH_ST_2 HDMI_I2S_BASE(0x030) +#define HDMI_I2S_CH_ST_3 HDMI_I2S_BASE(0x034) +#define HDMI_I2S_CH_ST_4 HDMI_I2S_BASE(0x038) +#define HDMI_I2S_CH_ST_SH_0 HDMI_I2S_BASE(0x03c) +#define HDMI_I2S_CH_ST_SH_1 HDMI_I2S_BASE(0x040) +#define HDMI_I2S_CH_ST_SH_2 HDMI_I2S_BASE(0x044) +#define HDMI_I2S_CH_ST_SH_3 HDMI_I2S_BASE(0x048) +#define HDMI_I2S_CH_ST_SH_4 HDMI_I2S_BASE(0x04c) +#define HDMI_I2S_MUX_CH HDMI_I2S_BASE(0x054) +#define HDMI_I2S_MUX_CUV HDMI_I2S_BASE(0x058) + +/* I2S bit definition */ + +/* I2S_CLK_CON */ +#define HDMI_I2S_CLK_DIS (0) +#define HDMI_I2S_CLK_EN (1) + +/* I2S_CON_1 */ +#define HDMI_I2S_SCLK_FALLING_EDGE (0 << 1) +#define HDMI_I2S_SCLK_RISING_EDGE (1 << 1) +#define HDMI_I2S_L_CH_LOW_POL (0) +#define HDMI_I2S_L_CH_HIGH_POL (1) + +/* I2S_CON_2 */ +#define HDMI_I2S_MSB_FIRST_MODE (0 << 6) +#define HDMI_I2S_LSB_FIRST_MODE (1 << 6) +#define HDMI_I2S_BIT_CH_32FS (0 << 4) +#define HDMI_I2S_BIT_CH_48FS (1 << 4) +#define HDMI_I2S_BIT_CH_RESERVED (2 << 4) +#define HDMI_I2S_SDATA_16BIT (1 << 2) +#define HDMI_I2S_SDATA_20BIT (2 << 2) +#define HDMI_I2S_SDATA_24BIT (3 << 2) +#define HDMI_I2S_BASIC_FORMAT (0) +#define HDMI_I2S_L_JUST_FORMAT (2) +#define HDMI_I2S_R_JUST_FORMAT (3) +#define HDMI_I2S_CON_2_CLR (BYTE0_CLR) +#define HDMI_I2S_SET_BIT_CH(x) (((x) & 0x7) << 4) +#define HDMI_I2S_SET_SDATA_BIT(x) (((x) & 0x7) << 2) + +/* I2S_PIN_SEL_0 */ +#define HDMI_I2S_SEL_SCLK(x) (((x) & 0x7) << 4) +#define HDMI_I2S_SEL_LRCK(x) ((x) & 0x7) + +/* I2S_PIN_SEL_1 */ +#define HDMI_I2S_SEL_SDATA1(x) (((x) & 0x7) << 4) +#define HDMI_I2S_SEL_SDATA2(x) ((x) & 0x7) + +/* I2S_PIN_SEL_2 */ +#define HDMI_I2S_SEL_SDATA3(x) (((x) & 0x7) << 4) +#define HDMI_I2S_SEL_SDATA2(x) ((x) & 0x7) + +/* I2S_PIN_SEL_3 */ +#define HDMI_I2S_SEL_DSD(x) ((x) & 0x7) + +/* I2S_DSD_CON */ +#define HDMI_I2S_DSD_CLK_RI_EDGE (1 << 1) +#define HDMI_I2S_DSD_CLK_FA_EDGE (0 << 1) +#define HDMI_I2S_DSD_ENABLE (1) +#define HDMI_I2S_DSD_DISABLE (0) + +/* I2S_MUX_CON */ +#define HDMI_I2S_NOISE_FILTER_ZERO (0 << 5) +#define HDMI_I2S_NOISE_FILTER_2_STAGE (1 << 5) +#define HDMI_I2S_NOISE_FILTER_3_STAGE (2 << 5) +#define HDMI_I2S_NOISE_FILTER_4_STAGE (3 << 5) +#define HDMI_I2S_NOISE_FILTER_5_STAGE (4 << 5) +#define HDMI_I2S_IN_DISABLE (1 << 4) +#define HDMI_I2S_IN_ENABLE (0 << 4) +#define HDMI_I2S_AUD_SPDIF (0 << 2) +#define HDMI_I2S_AUD_I2S (1 << 2) +#define HDMI_I2S_AUD_DSD (2 << 2) +#define HDMI_I2S_CUV_SPDIF_ENABLE (0 << 1) +#define HDMI_I2S_CUV_I2S_ENABLE (1 << 1) +#define HDMI_I2S_MUX_DISABLE (0) +#define HDMI_I2S_MUX_ENABLE (1) +#define HDMI_I2S_MUX_CON_CLR (BYTE0_CLR) + +/* I2S_CH_ST_CON */ +#define HDMI_I2S_CH_STATUS_RELOAD (1) +#define HDMI_I2S_CH_ST_CON_CLR (~(1)) + +/* I2S_CH_ST_0 / I2S_CH_ST_SH_0 */ +#define HDMI_I2S_CH_STATUS_MODE_0 (0 << 6) +#define HDMI_I2S_2AUD_CH_WITHOUT_PREEMPH (0 << 3) +#define HDMI_I2S_2AUD_CH_WITH_PREEMPH (1 << 3) +#define HDMI_I2S_DEFAULT_EMPHASIS (0 << 3) +#define HDMI_I2S_COPYRIGHT (0 << 2) +#define HDMI_I2S_NO_COPYRIGHT (1 << 2) +#define HDMI_I2S_LINEAR_PCM (0 << 1) +#define HDMI_I2S_NO_LINEAR_PCM (1 << 1) +#define HDMI_I2S_CONSUMER_FORMAT (0) +#define HDMI_I2S_PROF_FORMAT (1) +#define HDMI_I2S_CH_ST_0_CLR (BYTE0_CLR) + +/* I2S_CH_ST_1 / I2S_CH_ST_SH_1 */ +#define HDMI_I2S_CD_PLAYER (0x00) +#define HDMI_I2S_DAT_PLAYER (0x03) +#define HDMI_I2S_DCC_PLAYER (0x43) +#define HDMI_I2S_MINI_DISC_PLAYER (0x49) + +/* I2S_CH_ST_2 / I2S_CH_ST_SH_2 */ +#define HDMI_I2S_CHANNEL_NUM_MASK (0xF << 4) +#define HDMI_I2S_SOURCE_NUM_MASK (0xF) +#define HDMI_I2S_SET_CHANNEL_NUM(x) (((x) & (0xF)) << 4) +#define HDMI_I2S_SET_SOURCE_NUM(x) ((x) & (0xF)) + +/* I2S_CH_ST_3 / I2S_CH_ST_SH_3 */ +#define HDMI_I2S_CLK_ACCUR_LEVEL_1 (1 << 4) +#define HDMI_I2S_CLK_ACCUR_LEVEL_2 (0 << 4) +#define HDMI_I2S_CLK_ACCUR_LEVEL_3 (2 << 4) +#define HDMI_I2S_SMP_FREQ_44_1 (0x0) +#define HDMI_I2S_SMP_FREQ_48 (0x2) +#define HDMI_I2S_SMP_FREQ_32 (0x3) +#define HDMI_I2S_SMP_FREQ_96 (0xA) +#define HDMI_I2S_SET_SMP_FREQ(x) ((x) & (0xF)) + +/* I2S_CH_ST_4 / I2S_CH_ST_SH_4 */ +#define HDMI_I2S_ORG_SMP_FREQ_44_1 (0xF << 4) +#define HDMI_I2S_ORG_SMP_FREQ_88_2 (0x7 << 4) +#define HDMI_I2S_ORG_SMP_FREQ_22_05 (0xB << 4) +#define HDMI_I2S_ORG_SMP_FREQ_176_4 (0x3 << 4) +#define HDMI_I2S_WORD_LEN_NOT_DEFINE (0x0 << 1) +#define HDMI_I2S_WORD_LEN_MAX24_20BITS (0x1 << 1) +#define HDMI_I2S_WORD_LEN_MAX24_22BITS (0x2 << 1) +#define HDMI_I2S_WORD_LEN_MAX24_23BITS (0x4 << 1) +#define HDMI_I2S_WORD_LEN_MAX24_24BITS (0x5 << 1) +#define HDMI_I2S_WORD_LEN_MAX24_21BITS (0x6 << 1) +#define HDMI_I2S_WORD_LEN_MAX20_16BITS (0x1 << 1) +#define HDMI_I2S_WORD_LEN_MAX20_18BITS (0x2 << 1) +#define HDMI_I2S_WORD_LEN_MAX20_19BITS (0x4 << 1) +#define HDMI_I2S_WORD_LEN_MAX20_20BITS (0x5 << 1) +#define HDMI_I2S_WORD_LEN_MAX20_17BITS (0x6 << 1) +#define HDMI_I2S_WORD_LEN_MAX_24BITS (1) +#define HDMI_I2S_WORD_LEN_MAX_20BITS (0) + +/* I2S_MUX_CH */ +#define HDMI_I2S_CH3_R_EN (1 << 7) +#define HDMI_I2S_CH3_L_EN (1 << 6) +#define HDMI_I2S_CH3_EN (3 << 6) +#define HDMI_I2S_CH2_R_EN (1 << 5) +#define HDMI_I2S_CH2_L_EN (1 << 4) +#define HDMI_I2S_CH2_EN (3 << 4) +#define HDMI_I2S_CH1_R_EN (1 << 3) +#define HDMI_I2S_CH1_L_EN (1 << 2) +#define HDMI_I2S_CH1_EN (3 << 2) +#define HDMI_I2S_CH0_R_EN (1 << 1) +#define HDMI_I2S_CH0_L_EN (1) +#define HDMI_I2S_CH0_EN (3) +#define HDMI_I2S_CH_ALL_EN (0xFF) +#define HDMI_I2S_MUX_CH_CLR (~(u32)HDMI_I2S_CH_ALL_EN) + +/* I2S_MUX_CUV */ +#define HDMI_I2S_CUV_R_EN (1 << 1) +#define HDMI_I2S_CUV_L_EN (1) +#define HDMI_I2S_CUV_RL_EN (0x03) + +/* I2S_CUV_L_R */ +#define HDMI_I2S_CUV_R_DATA_MASK (0x7 << 4) +#define HDMI_I2S_CUV_L_DATA_MASK (0x7) + +/* AVI header Info */ +#define HDMI_AVI_VERSION 0x02 +#define HDMI_AVI_LENGTH 0x0d +#define AVI_ACTIVE_FORMAT_VALID (1 << 4) +/* AVI Aspect Ratio */ +#define AVI_PIC_ASPECT_RATIO_4_3 (1 << 4) +#define AVI_PIC_ASPECT_RATIO_16_9 (2 << 4) +#define AVI_SAME_AS_PIC_ASPECT_RATIO 8 +/* AVI_CON */ +#define HDMI_AVI_CON_DO_NOT_TRANSMIT (0 << 1) +#define HDMI_AVI_CON_EVERY_VSYNC (1 << 1) + +#define HDMI_AUI_VERSION 0x01 +#define HDMI_AUI_LENGTH 0x0a +/* AUI_CON */ +#define HDMI_AUI_CON_NO_TRAN (0 << 0) +#define HDMI_AUI_CON_TRANS_ONCE (1 << 0) +#define HDMI_AUI_CON_TRANS_EVERY_VSYNC (2 << 0) + +#define HDMI_VSI_CON_DO_NOT_TRANSMIT (0 << 0) +#define HDMI_VSI_CON_EVERY_VSYNC (1 << 1) + +#define DEFAULT_RATE (44100) +#define DEFAULT_BPS (16) + +enum HDMI_PACKET_TYPE { + /** refer to Table 5-8 Packet Type in HDMI specification v1.4a */ + /** InfoFrame packet type */ + HDMI_PACKET_TYPE_INFOFRAME = 0X80, + /** Vendor-Specific InfoFrame */ + HDMI_PACKET_TYPE_VSI = HDMI_PACKET_TYPE_INFOFRAME + 1, + /** Auxiliary Video information InfoFrame */ + HDMI_PACKET_TYPE_AVI = HDMI_PACKET_TYPE_INFOFRAME + 2, + /** Audio information InfoFrame */ + HDMI_PACKET_TYPE_AUI = HDMI_PACKET_TYPE_INFOFRAME + 4 +}; + +struct hdmi_infoframe { + enum HDMI_PACKET_TYPE type; + u8 ver; + u8 len; +}; + +struct audio_params { + u32 sample_rate; + u32 bits_per_sample; + u32 chan_count; + u32 cts; + u32 n; + u32 sample_frq; +}; + +struct hdmi_audio_context { + struct platform_device *pdev; + struct platform_device *parent_pdev; + void __iomem *regs; + struct workqueue_struct *hpd_wq; + struct delayed_work hotplug_work; + struct audio_params params; + int int_irq; + int ext_irq; + int hpd_gpio; + struct audio_codec_plugin plugin; + bool enabled; + atomic_t plugged; +}; + +#endif /* __SND_SOC_SAMSUNG_SPDIF_H */ diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c index a5cbdb4f1655d8..37e47c92118b43 100644 --- a/sound/soc/samsung/i2s.c +++ b/sound/soc/samsung/i2s.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -30,6 +31,7 @@ #include "idma.h" #include "i2s.h" #include "i2s-regs.h" +#include "codec_plugin.h" #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t) @@ -76,6 +78,7 @@ struct i2s_dai { struct s3c_dma_params dma_playback; struct s3c_dma_params dma_capture; struct s3c_dma_params idma_playback; + struct audio_codec_plugin *plugin; u32 quirks; u32 suspend_i2smod; u32 suspend_i2scon; @@ -342,6 +345,62 @@ static inline int get_blc(struct i2s_dai *i2s) } } +static int plugin_init(struct i2s_dai *i2s) +{ + struct device_node *plugin_node = NULL; + struct platform_device *pdev; + struct audio_codec_plugin *plugin; + + plugin_node = of_find_node_by_name(NULL, "hdmi-audio"); + if (!plugin_node) + return -EFAULT; + + pdev = of_find_device_by_node(plugin_node); + if (!pdev) + return -EFAULT; + + plugin = dev_get_drvdata(&pdev->dev); + if (!plugin) + return -EFAULT; + else + if (i2s->plugin) + dev_err(&i2s->pdev->dev, "plugin already intialised.\n"); + i2s->plugin = plugin; + return 0; +} + +static void plugin_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) +{ + struct i2s_dai *i2s = to_info(dai); + + if (!i2s->plugin) + return; + + if (!i2s->plugin->ops.hw_params) + return; + + i2s->plugin->ops.hw_params( + i2s->plugin->dev, substream, params, dai); + return; +} + +static void plugin_trigger(struct snd_pcm_substream *substream, + int cmd, struct snd_soc_dai *dai) +{ + struct i2s_dai *i2s = to_info(dai); + + if (!i2s->plugin) + return; + + if (!i2s->plugin->ops.trigger) + return; + + i2s->plugin->ops.trigger(i2s->plugin->dev, + substream, cmd, dai); + return; +} + /* TX Channel Control */ static void i2s_txctrl(struct i2s_dai *i2s, int on) { @@ -634,6 +693,8 @@ static int i2s_hw_params(struct snd_pcm_substream *substream, struct i2s_dai *i2s = to_info(dai); u32 mod = readl(i2s->addr + I2SMOD); + plugin_hw_params(substream, params, dai); + if (!is_secondary(i2s)) mod &= ~(MOD_DC2_EN | MOD_DC1_EN); @@ -830,6 +891,8 @@ static int i2s_trigger(struct snd_pcm_substream *substream, struct i2s_dai *i2s = to_info(rtd->cpu_dai); unsigned long flags; + plugin_trigger(substream, cmd, dai); + switch (cmd) { case SNDRV_PCM_TRIGGER_START: case SNDRV_PCM_TRIGGER_RESUME: @@ -1190,6 +1253,9 @@ static int samsung_i2s_probe(struct platform_device *pdev) return -EINVAL; } } + + plugin_init(pri_dai); + } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); diff --git a/sound/soc/soc-jack.c b/sound/soc/soc-jack.c index 23d43dac91da2c..3e14f7548e5777 100644 --- a/sound/soc/soc-jack.c +++ b/sound/soc/soc-jack.c @@ -233,8 +233,14 @@ void snd_soc_jack_notifier_unregister(struct snd_soc_jack *jack, EXPORT_SYMBOL_GPL(snd_soc_jack_notifier_unregister); #ifdef CONFIG_GPIOLIB -/* gpio detect */ -static void snd_soc_jack_gpio_detect(struct snd_soc_jack_gpio *gpio) +/** + * snd_soc_jack_gpio_detect - Check the vlaue of the gpio and report jack state. + * + * @gpio: gpio pin to check. + * + * This function will poll the state of the gpio and report on the jack. + */ +void snd_soc_jack_gpio_detect(struct snd_soc_jack_gpio *gpio) { struct snd_soc_jack *jack = gpio->jack; int enable; @@ -254,6 +260,7 @@ static void snd_soc_jack_gpio_detect(struct snd_soc_jack_gpio *gpio) snd_soc_jack_report(jack, report, gpio->report); } +EXPORT_SYMBOL_GPL(snd_soc_jack_gpio_detect); /* irq handler for gpio pin */ static irqreturn_t gpio_handler(int irq, void *data)