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ahmedbougachaahmedbougacha
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[X86] Disable shrink-wrapping for tailcc/swifttailcc functions.
Pseudo-expansion's handling of tail-calls currently interacts badly with shrink-wrapping when using callee-pop CCs on x86_64, resulting in an unbalanced RSP adjustment on shrink-wrapped return paths. Disable shrink-wrapping until that's resolved, if it can be. See llvm#109279 rdar://141673907
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‎llvm/lib/Target/X86/X86FrameLowering.cpp

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@@ -3942,6 +3942,14 @@ bool X86FrameLowering::canUseAsEpilogue(const MachineBasicBlock &MBB) const {
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}
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bool X86FrameLowering::enableShrinkWrapping(const MachineFunction &MF) const {
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// Pseudo-expansion's handling of tail-calls currently interacts badly
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// with shrink-wrapping when using callee-pop CCs on x86_64.
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// Disable shrink-wrapping until that's resolved, if it can be.
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// See llvm issue 109279.
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CallingConv::ID CC = MF.getFunction().getCallingConv();
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if (CC == CallingConv::Tail || CC == CallingConv::SwiftTail)
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return false;
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// If we may need to emit frameless compact unwind information, give
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// up as this is currently broken: PR25614.
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bool CompactUnwind =

‎llvm/test/CodeGen/X86/x86-tailcc-shrink-wrapping.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -o - < %s | FileCheck %s
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "x86_64-apple-macosx"
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; Pseudo-expansion's handling of tail-calls currently interacts badly
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; with shrink-wrapping when using callee-pop CCs on x86_64, resulting
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; in an unbalanced RSP adjustment on shrink-wrapped return paths.
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; Make sure it's disabled today until that's resolved.
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; See https://github.com/llvm/llvm-project/issues/109279
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define tailcc void @test_shrink_wrap_tailcc(i64 %0) {
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; CHECK-LABEL: test_shrink_wrap_tailcc:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: subq $32, %rsp
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; CHECK-NEXT: .cfi_def_cfa_offset 40
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; CHECK-NEXT: testq %rdi, %rdi
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; CHECK-NEXT: je LBB0_2
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; CHECK-NEXT: ## %bb.1: ## %a
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; CHECK-NEXT: xorps %xmm0, %xmm0
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; CHECK-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rax
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; CHECK-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: movq %rax, (%rsp)
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; CHECK-NEXT: movl $16, %esi
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; CHECK-NEXT: xorl %edi, %edi
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: movl $1, %ecx
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; CHECK-NEXT: xorl %r8d, %r8d
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; CHECK-NEXT: xorl %r9d, %r9d
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; CHECK-NEXT: jmp _f1 ## TAILCALL
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; CHECK-NEXT: LBB0_2: ## %b
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; CHECK-NEXT: addq $32, %rsp
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; CHECK-NEXT: jmp _f2 ## TAILCALL
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%cond = icmp ugt i64 %0, 0
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br i1 %cond, label %a, label %b
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a:
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musttail call tailcc void @f1(ptr null, i64 16, ptr null, i8 1, ptr null, ptr null, ptr null, ptr null, ptr null, ptr null)
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ret void
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b:
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musttail call tailcc void @f2()
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ret void
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}
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declare tailcc void @f2()
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declare tailcc void @f1(ptr, i64, ptr, i8, ptr, ptr, ptr, ptr, ptr, ptr)
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define tailcc void @test_shrink_wrap_swifttailcc(i64 %0) {
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; CHECK-LABEL: test_shrink_wrap_swifttailcc:
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; CHECK: ## %bb.0:
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; CHECK-NEXT: subq $32, %rsp
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; CHECK-NEXT: .cfi_def_cfa_offset 40
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; CHECK-NEXT: testq %rdi, %rdi
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; CHECK-NEXT: je LBB1_2
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; CHECK-NEXT: ## %bb.1: ## %a
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; CHECK-NEXT: xorps %xmm0, %xmm0
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; CHECK-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rax
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; CHECK-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)
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; CHECK-NEXT: movq %rax, (%rsp)
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; CHECK-NEXT: movl $16, %esi
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; CHECK-NEXT: xorl %edi, %edi
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: movl $1, %ecx
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; CHECK-NEXT: xorl %r8d, %r8d
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; CHECK-NEXT: xorl %r9d, %r9d
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; CHECK-NEXT: jmp _sf1 ## TAILCALL
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; CHECK-NEXT: LBB1_2: ## %b
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; CHECK-NEXT: addq $32, %rsp
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; CHECK-NEXT: jmp _sf2 ## TAILCALL
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%cond = icmp ugt i64 %0, 0
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br i1 %cond, label %a, label %b
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a:
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musttail call tailcc void @sf1(ptr null, i64 16, ptr null, i8 1, ptr null, ptr null, ptr null, ptr null, ptr null, ptr null)
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ret void
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b:
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musttail call tailcc void @sf2()
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ret void
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}
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declare tailcc void @sf2()
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declare tailcc void @sf1(ptr, i64, ptr, i8, ptr, ptr, ptr, ptr, ptr, ptr)

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