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imi415dpgeorge
imi415
authored and
dpgeorge
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mimxrt: Restructure nxp_sdk to match official mcux-sdk.
The official mcux-sdk follows a slightly different structure to the current nxp_sdk submodule, with many drivers moved to a common location. To ease updating the newer versions of the SDK and/or add new families the nxp_sdk submodule has been updated to follow the structure of mcux-sdk, just trimmed down to families used here to considerably reduce the size. Signed-off-by: Andrew Leech <[email protected]>
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10 files changed

+145
-92
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10 files changed

+145
-92
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‎.gitmodules‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,7 @@
3535
url = https://github.com/bluekitchen/btstack.git
3636
[submodule "lib/nxp_driver"]
3737
path = lib/nxp_driver
38-
url = https://github.com/hathach/nxp_driver.git
38+
url = https://github.com/micropython/nxp_driver.git
3939
[submodule "lib/libhydrogen"]
4040
path = lib/libhydrogen
4141
url = https://github.com/jedisct1/libhydrogen.git

‎lib/nxp_driver‎

Submodule nxp_driver updated 3170 files

‎ports/mimxrt/Makefile‎

Lines changed: 77 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -52,7 +52,8 @@ include $(TOP)/py/py.mk
5252
include $(TOP)/extmod/extmod.mk
5353

5454
# Set SDK directory based on MCU_SERIES
55-
MCU_DIR = lib/nxp_driver/sdk/devices/$(MCU_SERIES)
55+
MCUX_SDK_DIR = lib/nxp_driver/sdk
56+
MCU_DIR = $(MCUX_SDK_DIR)/devices/$(MCU_SERIES)
5657

5758
# Select linker scripts based on MCU_SERIES
5859
LD_FILES = boards/$(MCU_SERIES).ld boards/common.ld
@@ -72,8 +73,6 @@ GEN_PINS_SRC = $(BUILD)/pins_gen.c
7273
INC += -I$(BOARD_DIR)
7374
INC += -I$(BUILD)
7475
INC += -I$(TOP)
75-
INC += -I$(TOP)/$(MCU_DIR)
76-
INC += -I$(TOP)/$(MCU_DIR)/drivers
7776
INC += -I$(TOP)/lib/cmsis/inc
7877
INC += -I$(TOP)/lib/oofatfs
7978
INC += -I$(TOP)/lib/tinyusb/hw
@@ -111,35 +110,38 @@ SRC_TINYUSB_C += \
111110
# All settings for Ethernet support are controller by the value of MICROPY_PY_LWIP
112111
ifeq ($(MICROPY_PY_LWIP),1)
113112
SRC_ETH_C += \
114-
$(MCU_DIR)/drivers/fsl_enet.c \
113+
$(MCUX_SDK_DIR)/drivers/enet/fsl_enet.c \
115114
hal/phy/device/phydp83825/fsl_phydp83825.c \
116115
hal/phy/device/phydp83848/fsl_phydp83848.c \
117116
hal/phy/device/phyksz8081/fsl_phyksz8081.c \
118117
hal/phy/device/phylan8720/fsl_phylan8720.c \
119118
hal/phy/device/phyrtl8211f/fsl_phyrtl8211f.c \
120119
hal/phy/mdio/enet/fsl_enet_mdio.c
120+
121+
INC_HAL_IMX += \
122+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/enet
121123
endif
122124

123125
# NXP SDK sources
124126
SRC_HAL_IMX_C += \
125127
$(MCU_DIR)/drivers/fsl_clock.c \
126-
$(MCU_DIR)/drivers/fsl_common.c \
127-
$(MCU_DIR)/drivers/fsl_dmamux.c \
128-
$(MCU_DIR)/drivers/fsl_edma.c \
129-
$(MCU_DIR)/drivers/fsl_flexram.c \
130-
$(MCU_DIR)/drivers/fsl_flexspi.c \
131-
$(MCU_DIR)/drivers/fsl_gpc.c \
132-
$(MCU_DIR)/drivers/fsl_gpio.c \
133-
$(MCU_DIR)/drivers/fsl_gpt.c \
134-
$(MCU_DIR)/drivers/fsl_lpi2c.c \
135-
$(MCU_DIR)/drivers/fsl_lpspi.c \
136-
$(MCU_DIR)/drivers/fsl_lpspi_edma.c \
137-
$(MCU_DIR)/drivers/fsl_pit.c \
138-
$(MCU_DIR)/drivers/fsl_pwm.c \
139-
$(MCU_DIR)/drivers/fsl_sai.c \
140-
$(MCU_DIR)/drivers/fsl_snvs_hp.c \
141-
$(MCU_DIR)/drivers/fsl_snvs_lp.c \
142-
$(MCU_DIR)/drivers/fsl_wdog.c \
128+
$(MCUX_SDK_DIR)/drivers/common/fsl_common.c \
129+
$(MCUX_SDK_DIR)/drivers/common/fsl_common_arm.c \
130+
$(MCUX_SDK_DIR)/drivers/dmamux/fsl_dmamux.c \
131+
$(MCUX_SDK_DIR)/drivers/edma/fsl_edma.c \
132+
$(MCUX_SDK_DIR)/drivers/flexram/fsl_flexram.c \
133+
$(MCUX_SDK_DIR)/drivers/flexspi/fsl_flexspi.c \
134+
$(MCUX_SDK_DIR)/drivers/igpio/fsl_gpio.c \
135+
$(MCUX_SDK_DIR)/drivers/gpt/fsl_gpt.c \
136+
$(MCUX_SDK_DIR)/drivers/lpi2c/fsl_lpi2c.c \
137+
$(MCUX_SDK_DIR)/drivers/lpspi/fsl_lpspi.c \
138+
$(MCUX_SDK_DIR)/drivers/lpspi/fsl_lpspi_edma.c \
139+
$(MCUX_SDK_DIR)/drivers/pit/fsl_pit.c \
140+
$(MCUX_SDK_DIR)/drivers/pwm/fsl_pwm.c \
141+
$(MCUX_SDK_DIR)/drivers/sai/fsl_sai.c \
142+
$(MCUX_SDK_DIR)/drivers/snvs_hp/fsl_snvs_hp.c \
143+
$(MCUX_SDK_DIR)/drivers/snvs_lp/fsl_snvs_lp.c \
144+
$(MCUX_SDK_DIR)/drivers/wdog01/fsl_wdog.c \
143145
$(MCU_DIR)/system_$(MCU_SERIES)$(MCU_CORE).c \
144146

145147
# Use a specific boot header for 1062 so the Teensy loader doesn't erase the filesystem.
@@ -149,18 +151,42 @@ else
149151
SRC_HAL_IMX_C += $(MCU_DIR)/xip/fsl_flexspi_nor_boot.c
150152
endif
151153

154+
INC_HAL_IMX += \
155+
-I$(TOP)/$(MCU_DIR) \
156+
-I$(TOP)/$(MCU_DIR)/drivers \
157+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/common \
158+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/dmamux \
159+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/edma \
160+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/flexram \
161+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/flexspi \
162+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/igpio \
163+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/gpt \
164+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/lpi2c \
165+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/lpspi \
166+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/lpuart \
167+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/pit \
168+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/pwm \
169+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/sai \
170+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/snvs_hp \
171+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/snvs_lp \
172+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/wdog01 \
173+
152174
ifeq ($(MICROPY_HW_SDRAM_AVAIL),1)
153-
SRC_HAL_IMX_C += $(MCU_DIR)/drivers/fsl_semc.c
175+
SRC_HAL_IMX_C += $(MCUX_SDK_DIR)/drivers/semc/fsl_semc.c
176+
INC_HAL_IMX += -I$(TOP)/$(MCUX_SDK_DIR)/drivers/semc
154177
endif
155178

156179
ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES), MIMXRT1021 MIMXRT1052 MIMXRT1062 MIMXRT1064 MIMXRT1176))
157-
SRC_HAL_IMX_C += $(MCU_DIR)/drivers/fsl_usdhc.c
180+
SRC_HAL_IMX_C += $(MCUX_SDK_DIR)/drivers/usdhc/fsl_usdhc.c
181+
INC_HAL_IMX += -I$(TOP)/$(MCUX_SDK_DIR)/drivers/usdhc
158182
endif
159183

160184
ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES), MIMXRT1015 MIMXRT1021 MIMXRT1052 MIMXRT1062 MIMXRT1064 MIMXRT1176))
161185
SRC_HAL_IMX_C += \
162-
$(MCU_DIR)/drivers/fsl_qtmr.c \
186+
$(MCUX_SDK_DIR)/drivers/qtmr_1/fsl_qtmr.c \
163187
$(MCU_DIR)/drivers/fsl_romapi.c
188+
189+
INC_HAL_IMX += -I$(TOP)/$(MCUX_SDK_DIR)/drivers/qtmr_1
164190
endif
165191

166192
# If not empty, then it is 10xx.
@@ -171,24 +197,42 @@ APPLICATION_ADDR := 0x3000C000
171197
endif
172198

173199
ifeq ($(MCU_SERIES), MIMXRT1176)
174-
INC += -I$(TOP)/$(MCU_DIR)/drivers/cm7
175-
176200
SRC_HAL_IMX_C += \
177201
$(MCU_DIR)/drivers/cm7/fsl_cache.c \
178202
$(MCU_DIR)/drivers/fsl_dcdc.c \
179203
$(MCU_DIR)/drivers/fsl_pmu.c \
180-
$(MCU_DIR)/drivers/fsl_common_arm.c \
181204
$(MCU_DIR)/drivers/fsl_anatop_ai.c \
182-
$(MCU_DIR)/drivers/fsl_caam.c \
183-
$(MCU_DIR)/drivers/fsl_lpadc.c \
184-
$(MCU_DIR)/drivers/fsl_mu.c
205+
$(MCU_DIR)/drivers/fsl_soc_src.c \
206+
$(MCU_DIR)/drivers/fsl_gpc.c \
207+
$(MCUX_SDK_DIR)/drivers/caam/fsl_caam.c \
208+
$(MCUX_SDK_DIR)/drivers/lpadc/fsl_lpadc.c \
209+
$(MCUX_SDK_DIR)/drivers/mu/fsl_mu.c
210+
211+
INC_HAL_IMX += \
212+
-I$(TOP)/$(MCU_DIR)/drivers/cm7 \
213+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/caam \
214+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/lpadc \
215+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/mu
216+
217+
CFLAGS += -DCACHE_MODE_WRITE_THROUGH=1
185218
else
186219
SRC_HAL_IMX_C += \
187-
$(MCU_DIR)/drivers/fsl_adc.c \
188-
$(MCU_DIR)/drivers/fsl_cache.c \
189-
$(MCU_DIR)/drivers/fsl_trng.c
220+
$(MCUX_SDK_DIR)/drivers/adc_12b1msps_sar/fsl_adc.c \
221+
$(MCUX_SDK_DIR)/drivers/cache/armv7-m7/fsl_cache.c \
222+
$(MCUX_SDK_DIR)/drivers/gpc_1/fsl_gpc.c \
223+
$(MCUX_SDK_DIR)/drivers/src/fsl_src.c \
224+
$(MCUX_SDK_DIR)/drivers/trng/fsl_trng.c
225+
226+
INC_HAL_IMX += \
227+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/adc_12b1msps_sar \
228+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/cache/armv7-m7 \
229+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/gpc_1 \
230+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/src \
231+
-I$(TOP)/$(MCUX_SDK_DIR)/drivers/trng
190232
endif
191233

234+
INC += $(INC_HAL_IMX)
235+
192236
# C source files
193237
SRC_C += \
194238
board_init.c \
@@ -371,8 +415,6 @@ CFLAGS += \
371415
-DMICROPY_HW_FLASH_SIZE=$(MICROPY_HW_FLASH_SIZE) \
372416
-DMICROPY_HW_SDRAM_AVAIL=$(MICROPY_HW_SDRAM_AVAIL) \
373417
-DMICROPY_HW_SDRAM_SIZE=$(MICROPY_HW_SDRAM_SIZE) \
374-
-DSPI_RETRY_TIMES=1000000 \
375-
-DUART_RETRY_TIMES=1000000 \
376418
-DXIP_BOOT_HEADER_ENABLE=1 \
377419
-DXIP_EXTERNAL_FLASH=1 \
378420
-fdata-sections \

‎ports/mimxrt/boards/MIMXRT1050_EVK/mpconfigboard.h‎

Lines changed: 21 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -21,14 +21,14 @@
2121
#define MICROPY_HW_UART_INDEX { 1, 3, 2, 6, 8 }
2222

2323
#define IOMUX_TABLE_UART \
24-
{ IOMUXC_GPIO_AD_B0_12_LPUART1_TX }, { IOMUXC_GPIO_AD_B0_13_LPUART1_RX }, \
25-
{ IOMUXC_GPIO_AD_B1_02_LPUART2_TX }, { IOMUXC_GPIO_AD_B1_03_LPUART2_RX }, \
26-
{ IOMUXC_GPIO_AD_B1_06_LPUART3_TX }, { IOMUXC_GPIO_AD_B1_07_LPUART3_RX }, \
24+
{ IOMUXC_GPIO_AD_B0_12_LPUART1_TXD }, { IOMUXC_GPIO_AD_B0_13_LPUART1_RXD }, \
25+
{ IOMUXC_GPIO_AD_B1_02_LPUART2_TXD }, { IOMUXC_GPIO_AD_B1_03_LPUART2_RXD }, \
26+
{ IOMUXC_GPIO_AD_B1_06_LPUART3_TXD }, { IOMUXC_GPIO_AD_B1_07_LPUART3_RXD }, \
2727
{ 0 }, { 0 }, \
2828
{ 0 }, { 0 }, \
29-
{ IOMUXC_GPIO_AD_B0_02_LPUART6_TX }, { IOMUXC_GPIO_AD_B0_03_LPUART6_RX }, \
29+
{ IOMUXC_GPIO_AD_B0_02_LPUART6_TXD }, { IOMUXC_GPIO_AD_B0_03_LPUART6_RXD }, \
3030
{ 0 }, { 0 }, \
31-
{ IOMUXC_GPIO_AD_B1_10_LPUART8_TX }, { IOMUXC_GPIO_AD_B1_11_LPUART8_RX },
31+
{ IOMUXC_GPIO_AD_B1_10_LPUART8_TXD }, { IOMUXC_GPIO_AD_B1_11_LPUART8_RXD },
3232

3333
#define IOMUX_TABLE_UART_CTS_RTS \
3434
{ IOMUXC_GPIO_AD_B0_14_LPUART1_CTS_B }, { IOMUXC_GPIO_AD_B0_15_LPUART1_RTS_B }, \
@@ -111,22 +111,22 @@
111111
}
112112

113113
// --- SEMC --- //
114-
#define MIMXRT_IOMUXC_SEMC_DATA00 IOMUXC_GPIO_EMC_00_SEMC_DATA00
115-
#define MIMXRT_IOMUXC_SEMC_DATA01 IOMUXC_GPIO_EMC_01_SEMC_DATA01
116-
#define MIMXRT_IOMUXC_SEMC_DATA02 IOMUXC_GPIO_EMC_02_SEMC_DATA02
117-
#define MIMXRT_IOMUXC_SEMC_DATA03 IOMUXC_GPIO_EMC_03_SEMC_DATA03
118-
#define MIMXRT_IOMUXC_SEMC_DATA04 IOMUXC_GPIO_EMC_04_SEMC_DATA04
119-
#define MIMXRT_IOMUXC_SEMC_DATA05 IOMUXC_GPIO_EMC_05_SEMC_DATA05
120-
#define MIMXRT_IOMUXC_SEMC_DATA06 IOMUXC_GPIO_EMC_06_SEMC_DATA06
121-
#define MIMXRT_IOMUXC_SEMC_DATA07 IOMUXC_GPIO_EMC_07_SEMC_DATA07
122-
#define MIMXRT_IOMUXC_SEMC_DATA08 IOMUXC_GPIO_EMC_30_SEMC_DATA08
123-
#define MIMXRT_IOMUXC_SEMC_DATA09 IOMUXC_GPIO_EMC_31_SEMC_DATA09
124-
#define MIMXRT_IOMUXC_SEMC_DATA10 IOMUXC_GPIO_EMC_32_SEMC_DATA10
125-
#define MIMXRT_IOMUXC_SEMC_DATA11 IOMUXC_GPIO_EMC_33_SEMC_DATA11
126-
#define MIMXRT_IOMUXC_SEMC_DATA12 IOMUXC_GPIO_EMC_34_SEMC_DATA12
127-
#define MIMXRT_IOMUXC_SEMC_DATA13 IOMUXC_GPIO_EMC_35_SEMC_DATA13
128-
#define MIMXRT_IOMUXC_SEMC_DATA14 IOMUXC_GPIO_EMC_36_SEMC_DATA14
129-
#define MIMXRT_IOMUXC_SEMC_DATA15 IOMUXC_GPIO_EMC_37_SEMC_DATA15
114+
#define MIMXRT_IOMUXC_SEMC_DATA00 IOMUXC_GPIO_EMC_00_SEMC_DA00
115+
#define MIMXRT_IOMUXC_SEMC_DATA01 IOMUXC_GPIO_EMC_01_SEMC_DA01
116+
#define MIMXRT_IOMUXC_SEMC_DATA02 IOMUXC_GPIO_EMC_02_SEMC_DA02
117+
#define MIMXRT_IOMUXC_SEMC_DATA03 IOMUXC_GPIO_EMC_03_SEMC_DA03
118+
#define MIMXRT_IOMUXC_SEMC_DATA04 IOMUXC_GPIO_EMC_04_SEMC_DA04
119+
#define MIMXRT_IOMUXC_SEMC_DATA05 IOMUXC_GPIO_EMC_05_SEMC_DA05
120+
#define MIMXRT_IOMUXC_SEMC_DATA06 IOMUXC_GPIO_EMC_06_SEMC_DA06
121+
#define MIMXRT_IOMUXC_SEMC_DATA07 IOMUXC_GPIO_EMC_07_SEMC_DA07
122+
#define MIMXRT_IOMUXC_SEMC_DATA08 IOMUXC_GPIO_EMC_30_SEMC_DA08
123+
#define MIMXRT_IOMUXC_SEMC_DATA09 IOMUXC_GPIO_EMC_31_SEMC_DA09
124+
#define MIMXRT_IOMUXC_SEMC_DATA10 IOMUXC_GPIO_EMC_32_SEMC_DA10
125+
#define MIMXRT_IOMUXC_SEMC_DATA11 IOMUXC_GPIO_EMC_33_SEMC_DA11
126+
#define MIMXRT_IOMUXC_SEMC_DATA12 IOMUXC_GPIO_EMC_34_SEMC_DA12
127+
#define MIMXRT_IOMUXC_SEMC_DATA13 IOMUXC_GPIO_EMC_35_SEMC_DA13
128+
#define MIMXRT_IOMUXC_SEMC_DATA14 IOMUXC_GPIO_EMC_36_SEMC_DA14
129+
#define MIMXRT_IOMUXC_SEMC_DATA15 IOMUXC_GPIO_EMC_37_SEMC_DA15
130130

131131
#define MIMXRT_IOMUXC_SEMC_ADDR00 IOMUXC_GPIO_EMC_09_SEMC_ADDR00
132132
#define MIMXRT_IOMUXC_SEMC_ADDR01 IOMUXC_GPIO_EMC_10_SEMC_ADDR01

‎ports/mimxrt/boards/SEEED_ARCH_MIX/mpconfigboard.h‎

Lines changed: 28 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -23,14 +23,14 @@
2323
#define MICROPY_HW_UART_INDEX { 0, 1, 2, 3, 8, 4 }
2424

2525
#define IOMUX_TABLE_UART \
26-
{ IOMUXC_GPIO_AD_B0_12_LPUART1_TX }, { IOMUXC_GPIO_AD_B0_13_LPUART1_RX }, \
27-
{ IOMUXC_GPIO_AD_B1_02_LPUART2_TX }, { IOMUXC_GPIO_AD_B1_03_LPUART2_RX }, \
28-
{ IOMUXC_GPIO_AD_B1_06_LPUART3_TX }, { IOMUXC_GPIO_AD_B1_07_LPUART3_RX }, \
29-
{ IOMUXC_GPIO_B1_00_LPUART4_TX }, { IOMUXC_GPIO_B1_01_LPUART4_RX }, \
26+
{ IOMUXC_GPIO_AD_B0_12_LPUART1_TXD }, { IOMUXC_GPIO_AD_B0_13_LPUART1_RXD }, \
27+
{ IOMUXC_GPIO_AD_B1_02_LPUART2_TXD }, { IOMUXC_GPIO_AD_B1_03_LPUART2_RXD }, \
28+
{ IOMUXC_GPIO_AD_B1_06_LPUART3_TXD }, { IOMUXC_GPIO_AD_B1_07_LPUART3_RXD }, \
29+
{ IOMUXC_GPIO_B1_00_LPUART4_TXD }, { IOMUXC_GPIO_B1_01_LPUART4_RXD }, \
3030
{ 0 }, { 0 }, \
3131
{ 0 }, { 0 }, \
3232
{ 0 }, { 0 }, \
33-
{ IOMUXC_GPIO_AD_B1_10_LPUART8_TX }, { IOMUXC_GPIO_AD_B1_11_LPUART8_RX },
33+
{ IOMUXC_GPIO_AD_B1_10_LPUART8_TXD }, { IOMUXC_GPIO_AD_B1_11_LPUART8_RXD },
3434

3535
#define IOMUX_TABLE_UART_CTS_RTS \
3636
{ IOMUXC_GPIO_AD_B0_14_LPUART1_CTS_B }, { IOMUXC_GPIO_AD_B0_15_LPUART1_RTS_B }, \
@@ -98,13 +98,13 @@
9898

9999
#define I2S_GPIO_MAP \
100100
{ \
101-
I2S_GPIO(1, MCK, TX, GPIO_AD_B1_09, IOMUXC_GPIO_AD_B1_09_SAI1_MCLK), /* pin J4 09 */ \
102-
I2S_GPIO(1, SCK, RX, GPIO_AD_B1_11, IOMUXC_GPIO_AD_B1_11_SAI1_RX_BCLK), /* pin J4 11 */ \
103-
I2S_GPIO(1, WS, RX, GPIO_AD_B1_10, IOMUXC_GPIO_AD_B1_10_SAI1_RX_SYNC), /* pin J4 10 */ \
104-
I2S_GPIO(1, SD, RX, GPIO_AD_B1_12, IOMUXC_GPIO_AD_B1_12_SAI1_RX_DATA00), /* pin J4 12 */ \
105-
I2S_GPIO(1, SCK, TX, GPIO_AD_B1_14, IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK), /* pin J4 14 */ \
106-
I2S_GPIO(1, WS, TX, GPIO_AD_B1_15, IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC), /* pin J4 15 */ \
107-
I2S_GPIO(1, SD, TX, GPIO_AD_B1_13, IOMUXC_GPIO_AD_B1_13_SAI1_TX_DATA00) /* pin J4 13 */ \
101+
I2S_GPIO(1, MCK, TX, GPIO_AD_B1_09, IOMUXC_GPIO_AD_B1_09_SAI1_MCLK), /* pin J4 09 */ \
102+
I2S_GPIO(1, SCK, RX, GPIO_AD_B1_11, IOMUXC_GPIO_AD_B1_11_SAI1_RX_BCLK), /* pin J4 11 */ \
103+
I2S_GPIO(1, WS, RX, GPIO_AD_B1_10, IOMUXC_GPIO_AD_B1_10_SAI1_RX_SYNC), /* pin J4 10 */ \
104+
I2S_GPIO(1, SD, RX, GPIO_AD_B1_12, IOMUXC_GPIO_AD_B1_12_SAI1_RX_DATA00), /* pin J4 12 */ \
105+
I2S_GPIO(1, SCK, TX, GPIO_AD_B1_14, IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK), /* pin J4 14 */ \
106+
I2S_GPIO(1, WS, TX, GPIO_AD_B1_15, IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC), /* pin J4 15 */ \
107+
I2S_GPIO(1, SD, TX, GPIO_AD_B1_13, IOMUXC_GPIO_AD_B1_13_SAI1_TX_DATA00) /* pin J4 13 */ \
108108
}
109109

110110
#define USDHC_DUMMY_PIN NULL, 0
@@ -140,22 +140,22 @@
140140
{ IOMUXC_GPIO_EMC_40_ENET_MDC, 0, 0xB0E9u },
141141

142142
// --- SEMC --- //
143-
#define MIMXRT_IOMUXC_SEMC_DATA00 IOMUXC_GPIO_EMC_00_SEMC_DATA00
144-
#define MIMXRT_IOMUXC_SEMC_DATA01 IOMUXC_GPIO_EMC_01_SEMC_DATA01
145-
#define MIMXRT_IOMUXC_SEMC_DATA02 IOMUXC_GPIO_EMC_02_SEMC_DATA02
146-
#define MIMXRT_IOMUXC_SEMC_DATA03 IOMUXC_GPIO_EMC_03_SEMC_DATA03
147-
#define MIMXRT_IOMUXC_SEMC_DATA04 IOMUXC_GPIO_EMC_04_SEMC_DATA04
148-
#define MIMXRT_IOMUXC_SEMC_DATA05 IOMUXC_GPIO_EMC_05_SEMC_DATA05
149-
#define MIMXRT_IOMUXC_SEMC_DATA06 IOMUXC_GPIO_EMC_06_SEMC_DATA06
150-
#define MIMXRT_IOMUXC_SEMC_DATA07 IOMUXC_GPIO_EMC_07_SEMC_DATA07
151-
#define MIMXRT_IOMUXC_SEMC_DATA08 IOMUXC_GPIO_EMC_30_SEMC_DATA08
152-
#define MIMXRT_IOMUXC_SEMC_DATA09 IOMUXC_GPIO_EMC_31_SEMC_DATA09
153-
#define MIMXRT_IOMUXC_SEMC_DATA10 IOMUXC_GPIO_EMC_32_SEMC_DATA10
154-
#define MIMXRT_IOMUXC_SEMC_DATA11 IOMUXC_GPIO_EMC_33_SEMC_DATA11
155-
#define MIMXRT_IOMUXC_SEMC_DATA12 IOMUXC_GPIO_EMC_34_SEMC_DATA12
156-
#define MIMXRT_IOMUXC_SEMC_DATA13 IOMUXC_GPIO_EMC_35_SEMC_DATA13
157-
#define MIMXRT_IOMUXC_SEMC_DATA14 IOMUXC_GPIO_EMC_36_SEMC_DATA14
158-
#define MIMXRT_IOMUXC_SEMC_DATA15 IOMUXC_GPIO_EMC_37_SEMC_DATA15
143+
#define MIMXRT_IOMUXC_SEMC_DATA00 IOMUXC_GPIO_EMC_00_SEMC_DA00
144+
#define MIMXRT_IOMUXC_SEMC_DATA01 IOMUXC_GPIO_EMC_01_SEMC_DA01
145+
#define MIMXRT_IOMUXC_SEMC_DATA02 IOMUXC_GPIO_EMC_02_SEMC_DA02
146+
#define MIMXRT_IOMUXC_SEMC_DATA03 IOMUXC_GPIO_EMC_03_SEMC_DA03
147+
#define MIMXRT_IOMUXC_SEMC_DATA04 IOMUXC_GPIO_EMC_04_SEMC_DA04
148+
#define MIMXRT_IOMUXC_SEMC_DATA05 IOMUXC_GPIO_EMC_05_SEMC_DA05
149+
#define MIMXRT_IOMUXC_SEMC_DATA06 IOMUXC_GPIO_EMC_06_SEMC_DA06
150+
#define MIMXRT_IOMUXC_SEMC_DATA07 IOMUXC_GPIO_EMC_07_SEMC_DA07
151+
#define MIMXRT_IOMUXC_SEMC_DATA08 IOMUXC_GPIO_EMC_30_SEMC_DA08
152+
#define MIMXRT_IOMUXC_SEMC_DATA09 IOMUXC_GPIO_EMC_31_SEMC_DA09
153+
#define MIMXRT_IOMUXC_SEMC_DATA10 IOMUXC_GPIO_EMC_32_SEMC_DA10
154+
#define MIMXRT_IOMUXC_SEMC_DATA11 IOMUXC_GPIO_EMC_33_SEMC_DA11
155+
#define MIMXRT_IOMUXC_SEMC_DATA12 IOMUXC_GPIO_EMC_34_SEMC_DA12
156+
#define MIMXRT_IOMUXC_SEMC_DATA13 IOMUXC_GPIO_EMC_35_SEMC_DA13
157+
#define MIMXRT_IOMUXC_SEMC_DATA14 IOMUXC_GPIO_EMC_36_SEMC_DA14
158+
#define MIMXRT_IOMUXC_SEMC_DATA15 IOMUXC_GPIO_EMC_37_SEMC_DA15
159159

160160
#define MIMXRT_IOMUXC_SEMC_ADDR00 IOMUXC_GPIO_EMC_09_SEMC_ADDR00
161161
#define MIMXRT_IOMUXC_SEMC_ADDR01 IOMUXC_GPIO_EMC_10_SEMC_ADDR01

‎ports/mimxrt/boards/SEEED_ARCH_MIX/mpconfigboard.mk‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,4 +19,3 @@ USE_UF2_BOOTLOADER = 1
1919

2020
FROZEN_MANIFEST ?= $(BOARD_DIR)/manifest.py
2121

22-
CFLAGS += -DSPI_RETRY_TIMES=1000000

‎ports/mimxrt/eth.c‎

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -397,9 +397,11 @@ void eth_init_0(eth_t *self, int eth_id, const phy_operations_t *phy_ops, int ph
397397
enet_config.txAccelerConfig = kENET_TxAccelIpCheckEnabled | kENET_TxAccelProtoCheckEnabled;
398398
// Set interrupt
399399
enet_config.interrupt |= ENET_TX_INTERRUPT | ENET_RX_INTERRUPT;
400+
// Set callback
401+
enet_config.callback = eth_irq_handler;
402+
enet_config.userData = (void *)self;
400403

401404
ENET_Init(ENET, &g_handle, &enet_config, &buffConfig[0], hw_addr, source_clock);
402-
ENET_SetCallback(&g_handle, eth_irq_handler, (void *)self);
403405
NVIC_SetPriority(ENET_IRQn, IRQ_PRI_PENDSV);
404406
ENET_EnableInterrupts(ENET, ENET_RX_INTERRUPT);
405407
ENET_ClearInterruptStatus(ENET, ENET_TX_INTERRUPT | ENET_RX_INTERRUPT | ENET_ERR_INTERRUPT);
@@ -461,9 +463,11 @@ void eth_init_1(eth_t *self, int eth_id, const phy_operations_t *phy_ops, int ph
461463
enet_config.txAccelerConfig = kENET_TxAccelIpCheckEnabled | kENET_TxAccelProtoCheckEnabled;
462464
// Set interrupt
463465
enet_config.interrupt = ENET_TX_INTERRUPT | ENET_RX_INTERRUPT;
466+
// Set callback
467+
enet_config.callback = eth_irq_handler;
468+
enet_config.userData = (void *)self;
464469

465470
ENET_Init(ENET_1, &g_handle_1, &enet_config, &buffConfig_1[0], hw_addr_1, source_clock);
466-
ENET_SetCallback(&g_handle_1, eth_irq_handler, (void *)self);
467471
ENET_ClearInterruptStatus(ENET_1, ENET_TX_INTERRUPT | ENET_RX_INTERRUPT | ENET_ERR_INTERRUPT);
468472
ENET_EnableInterrupts(ENET_1, ENET_RX_INTERRUPT);
469473
ENET_ActiveRead(ENET_1);

‎ports/mimxrt/machine_i2s.c‎

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -35,8 +35,14 @@
3535
#include "fsl_iomuxc.h"
3636
#include "fsl_dmamux.h"
3737
#include "fsl_edma.h"
38+
#include "fsl_common.h"
3839
#include "fsl_sai.h"
3940

41+
#ifndef FSL_FEATURE_SAI_FIFO_COUNTn
42+
// Back-compat with mcux-sdk 2.11
43+
#define FSL_FEATURE_SAI_FIFO_COUNTn(x) FSL_FEATURE_SAI_FIFO_COUNT
44+
#endif
45+
4046
// Notes on this port's specific implementation of I2S:
4147
// - the DMA callback is used to implement the asynchronous background operations, for non-blocking mode
4248
// - all 3 Modes of operation are implemented using the peripheral drivers in the NXP MCUXpresso SDK
@@ -538,14 +544,14 @@ static bool i2s_init(machine_i2s_obj_t *self) {
538544
EDMA_PrepareTransfer(&transferConfig,
539545
self->dma_buffer_dcache_aligned, bytes_per_sample,
540546
(void *)destAddr, bytes_per_sample,
541-
(FSL_FEATURE_SAI_FIFO_COUNT - saiConfig.fifo.fifoWatermark) * bytes_per_sample,
547+
(FSL_FEATURE_SAI_FIFO_COUNTn(self->i2s_inst) - saiConfig.fifo.fifoWatermark) * bytes_per_sample,
542548
SIZEOF_DMA_BUFFER_IN_BYTES, kEDMA_MemoryToPeripheral);
543549
} else { // RX
544550
uint32_t srcAddr = SAI_RxGetDataRegisterAddress(self->i2s_inst, SAI_CHANNEL_0);
545551
EDMA_PrepareTransfer(&transferConfig,
546552
(void *)srcAddr, bytes_per_sample,
547553
self->dma_buffer_dcache_aligned, bytes_per_sample,
548-
(FSL_FEATURE_SAI_FIFO_COUNT - saiConfig.fifo.fifoWatermark) * bytes_per_sample,
554+
(FSL_FEATURE_SAI_FIFO_COUNTn(self->i2s_inst) - saiConfig.fifo.fifoWatermark) * bytes_per_sample,
549555
SIZEOF_DMA_BUFFER_IN_BYTES, kEDMA_PeripheralToMemory);
550556
}
551557

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