@@ -85,15 +85,6 @@ public static unsafe OperationStatus EncodeToUtf8(ReadOnlySpan<byte> bytes, Span
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goto DoneExit ;
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}
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- end = srcMax - 48 ;
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- if ( AdvSimd . Arm64 . IsSupported && ( end >= src ) )
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- {
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- AdvSimdEncode ( ref src , ref dest , end , maxSrcLength , destLength , srcBytes , destBytes ) ;
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-
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- if ( src == srcEnd )
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- goto DoneExit ;
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- }
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-
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end = srcMax - 16 ;
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if ( ( Ssse3 . IsSupported || AdvSimd . Arm64 . IsSupported ) && BitConverter . IsLittleEndian && ( end >= src ) )
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{
@@ -489,64 +480,6 @@ private static unsafe void Avx2Encode(ref byte* srcBytes, ref byte* destBytes, b
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destBytes = dest ;
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}
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- [ MethodImpl ( MethodImplOptions . AggressiveInlining ) ]
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- [ CompExactlyDependsOn ( typeof ( AdvSimd . Arm64 ) ) ]
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- private static unsafe void AdvSimdEncode ( ref byte * srcBytes , ref byte * destBytes , byte * srcEnd , int sourceLength , int destLength , byte * srcStart , byte * destStart )
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- {
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- // C# implementatino of https://github.com/aklomp/base64/blob/3a5add8652076612a8407627a42c768736a4263f/lib/arch/neon64/enc_loop.c
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- Vector128 < byte > str1 ;
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- Vector128 < byte > str2 ;
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- Vector128 < byte > str3 ;
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- Vector128 < byte > res1 ;
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- Vector128 < byte > res2 ;
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- Vector128 < byte > res3 ;
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- Vector128 < byte > res4 ;
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- Vector128 < byte > tblEnc1 = Vector128 . Create ( "ABCDEFGHIJKLMNOP"u8 ) . AsByte ( ) ;
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- Vector128 < byte > tblEnc2 = Vector128 . Create ( "QRSTUVWXYZabcdef"u8 ) . AsByte ( ) ;
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- Vector128 < byte > tblEnc3 = Vector128 . Create ( "ghijklmnopqrstuv"u8 ) . AsByte ( ) ;
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- Vector128 < byte > tblEnc4 = Vector128 . Create ( "wxyz0123456789+/"u8 ) . AsByte ( ) ;
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- byte * src = srcBytes ;
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- byte * dest = destBytes ;
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-
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- // If we have Neon support, pick off 48 bytes at a time for as long as we can.
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- do
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- {
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- // Load 48 bytes and deinterleave:
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- AssertRead < Vector128 < byte > > ( src , srcStart , sourceLength ) ;
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- ( str1 , str2 , str3 ) = AdvSimd . Arm64 . LoadVector128x3AndUnzip ( src ) ;
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-
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- // Divide bits of three input bytes over four output bytes:
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- res1 = AdvSimd . ShiftRightLogical ( str1 , 2 ) ;
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- res2 = AdvSimd . ShiftRightLogical ( str2 , 4 ) ;
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- res3 = AdvSimd . ShiftRightLogical ( str3 , 6 ) ;
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- res2 = AdvSimd . ShiftLeftAndInsert ( res2 , str1 , 4 ) ;
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- res3 = AdvSimd . ShiftLeftAndInsert ( res3 , str2 , 2 ) ;
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-
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- // Clear top two bits:
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- res2 &= AdvSimd . DuplicateToVector128 ( ( byte ) 0x3F ) ;
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- res3 &= AdvSimd . DuplicateToVector128 ( ( byte ) 0x3F ) ;
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- res4 = str3 & AdvSimd . DuplicateToVector128 ( ( byte ) 0x3F ) ;
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-
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- // The bits have now been shifted to the right locations;
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- // translate their values 0..63 to the Base64 alphabet.
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- // Use a 64-byte table lookup:
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- res1 = AdvSimd . Arm64 . VectorTableLookup ( ( tblEnc1 , tblEnc2 , tblEnc3 , tblEnc4 ) , res1 ) ;
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- res2 = AdvSimd . Arm64 . VectorTableLookup ( ( tblEnc1 , tblEnc2 , tblEnc3 , tblEnc4 ) , res2 ) ;
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- res3 = AdvSimd . Arm64 . VectorTableLookup ( ( tblEnc1 , tblEnc2 , tblEnc3 , tblEnc4 ) , res3 ) ;
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- res4 = AdvSimd . Arm64 . VectorTableLookup ( ( tblEnc1 , tblEnc2 , tblEnc3 , tblEnc4 ) , res4 ) ;
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-
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- // Interleave and store result:
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- AssertWrite < Vector128 < byte > > ( dest , destStart , destLength ) ;
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- AdvSimd . Arm64 . StoreVector128x4AndZip ( dest , ( res1 , res2 , res3 , res4 ) ) ;
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-
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- src += 48 ;
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- dest += 64 ;
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- } while ( src <= srcEnd ) ;
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-
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- srcBytes = src ;
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- destBytes = dest ;
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- }
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-
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[ MethodImpl ( MethodImplOptions . AggressiveInlining ) ]
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[ CompExactlyDependsOn ( typeof ( Ssse3 ) ) ]
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[ CompExactlyDependsOn ( typeof ( AdvSimd . Arm64 ) ) ]
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