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[X86][APX] Remove patterns for ArithBinOp (#187018)
We should never select to these _EVEX variants. A follow up of #186049.
1 parent c4137a6 commit aa2defc

4 files changed

Lines changed: 38 additions & 44 deletions

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‎llvm/lib/Target/X86/X86InstrArithmetic.td‎

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -918,10 +918,10 @@ multiclass ArithBinOp_RFF<bits<8> BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4,
918918
def 64rm_ND : BinOpRMF_RF<BaseOpc2, mnemonic, Xi64, opnode, 1>;
919919
}
920920
let Predicates = [In64BitMode] in {
921-
def 8rm_EVEX : BinOpRMF_RF<BaseOpc2, mnemonic, Xi8 , opnode>, PL;
922-
def 16rm_EVEX : BinOpRMF_RF<BaseOpc2, mnemonic, Xi16, opnode>, PL, PD;
923-
def 32rm_EVEX : BinOpRMF_RF<BaseOpc2, mnemonic, Xi32, opnode>, PL;
924-
def 64rm_EVEX : BinOpRMF_RF<BaseOpc2, mnemonic, Xi64, opnode>, PL;
921+
def 8rm_EVEX : BinOpRMF_RF<BaseOpc2, mnemonic, Xi8 , null_frag>, PL;
922+
def 16rm_EVEX : BinOpRMF_RF<BaseOpc2, mnemonic, Xi16, null_frag>, PL, PD;
923+
def 32rm_EVEX : BinOpRMF_RF<BaseOpc2, mnemonic, Xi32, null_frag>, PL;
924+
def 64rm_EVEX : BinOpRMF_RF<BaseOpc2, mnemonic, Xi64, null_frag>, PL;
925925
}
926926

927927
let Predicates = [NoNDD] in {
@@ -951,13 +951,13 @@ multiclass ArithBinOp_RFF<bits<8> BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4,
951951
}
952952
}
953953
let Predicates = [In64BitMode] in {
954-
def 8ri_EVEX : BinOpRIF_RF<0x80, mnemonic, Xi8 , opnode, RegMRM>, PL;
954+
def 8ri_EVEX : BinOpRIF_RF<0x80, mnemonic, Xi8 , null_frag, RegMRM>, PL;
955955
def 16ri8_EVEX : BinOpRI8F_RF<0x83, mnemonic, Xi16, RegMRM>, PL, PD;
956956
def 32ri8_EVEX : BinOpRI8F_RF<0x83, mnemonic, Xi32, RegMRM>, PL;
957957
def 64ri8_EVEX : BinOpRI8F_RF<0x83, mnemonic, Xi64, RegMRM>, PL;
958-
def 16ri_EVEX : BinOpRIF_RF<0x81, mnemonic, Xi16, opnode, RegMRM>, PL, PD;
959-
def 32ri_EVEX : BinOpRIF_RF<0x81, mnemonic, Xi32, opnode, RegMRM>, PL;
960-
def 64ri32_EVEX: BinOpRIF_RF<0x81, mnemonic, Xi64, opnode, RegMRM>, PL;
958+
def 16ri_EVEX : BinOpRIF_RF<0x81, mnemonic, Xi16, null_frag, RegMRM>, PL, PD;
959+
def 32ri_EVEX : BinOpRIF_RF<0x81, mnemonic, Xi32, null_frag, RegMRM>, PL;
960+
def 64ri32_EVEX: BinOpRIF_RF<0x81, mnemonic, Xi64, null_frag, RegMRM>, PL;
961961
}
962962

963963
def 8mr : BinOpMRF_MF<BaseOpc, mnemonic, Xi8 , opnode>;
@@ -1000,13 +1000,13 @@ multiclass ArithBinOp_RFF<bits<8> BaseOpc, bits<8> BaseOpc2, bits<8> BaseOpc4,
10001000
def 64mi32_ND : BinOpMIF_RF<0x81, mnemonic, Xi64, opnode, MemMRM>;
10011001
}
10021002
let Predicates = [In64BitMode] in {
1003-
def 8mi_EVEX : BinOpMIF_MF<0x80, mnemonic, Xi8 , opnode, MemMRM>, PL;
1003+
def 8mi_EVEX : BinOpMIF_MF<0x80, mnemonic, Xi8 , null_frag, MemMRM>, PL;
10041004
def 16mi8_EVEX : BinOpMI8F_MF<mnemonic, Xi16, MemMRM>, PL, PD;
10051005
def 32mi8_EVEX : BinOpMI8F_MF<mnemonic, Xi32, MemMRM>, PL;
10061006
def 64mi8_EVEX : BinOpMI8F_MF<mnemonic, Xi64, MemMRM>, PL;
1007-
def 16mi_EVEX : BinOpMIF_MF<0x81, mnemonic, Xi16, opnode, MemMRM>, PL, PD;
1008-
def 32mi_EVEX : BinOpMIF_MF<0x81, mnemonic, Xi32, opnode, MemMRM>, PL;
1009-
def 64mi32_EVEX : BinOpMIF_MF<0x81, mnemonic, Xi64, opnode, MemMRM>, PL;
1007+
def 16mi_EVEX : BinOpMIF_MF<0x81, mnemonic, Xi16, null_frag, MemMRM>, PL, PD;
1008+
def 32mi_EVEX : BinOpMIF_MF<0x81, mnemonic, Xi32, null_frag, MemMRM>, PL;
1009+
def 64mi32_EVEX : BinOpMIF_MF<0x81, mnemonic, Xi64, null_frag, MemMRM>, PL;
10101010
}
10111011

10121012
// These are for the disassembler since 0x82 opcode behaves like 0x80, but

‎llvm/lib/Target/X86/X86InstrUtils.td‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1084,7 +1084,7 @@ class BinOpRI_RF<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node, For
10841084
(node t.RegClass:$src1, t.ImmOperator:$src2))]>, DefEFLAGS, NDD<ndd>;
10851085
// BinOpRIF_RF - Instructions that read "reg, imm", write "reg" and read/write
10861086
// EFLAGS.
1087-
class BinOpRIF_RF<bits<8> o, string m, X86TypeInfo t, SDNode node, Format f, bit ndd = 0>
1087+
class BinOpRIF_RF<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node, Format f, bit ndd = 0>
10881088
: BinOpRI<o, m, !if(!eq(ndd, 0), binop_args, binop_ndd_args), t, f, (outs t.RegClass:$dst),
10891089
[(set t.RegClass:$dst, EFLAGS,
10901090
(node t.RegClass:$src1, t.ImmOperator:$src2,
@@ -1221,7 +1221,7 @@ class BinOpMIF_RF<bits<8> o, string m, X86TypeInfo t, SDNode node, Format f>
12211221
Sched<[WriteADC.Folded, WriteADC.ReadAfterFold]>, DefEFLAGS, UseEFLAGS, NDD<1>;
12221222
// BinOpMIF_MF - Instructions that read "[mem], imm", write "[mem]" and
12231223
// read/write EFLAGS.
1224-
class BinOpMIF_MF<bits<8> o, string m, X86TypeInfo t, SDNode node, Format f>
1224+
class BinOpMIF_MF<bits<8> o, string m, X86TypeInfo t, SDPatternOperator node, Format f>
12251225
: BinOpMI<o, m, binop_args, t, f, (outs),
12261226
[(store (node (t.VT (load addr:$src1)),
12271227
t.ImmOperator:$src2, EFLAGS), addr:$src1)]>,

‎llvm/test/CodeGen/X86/apx/adc.ll‎

Lines changed: 8 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -59,10 +59,9 @@ define i64 @adc64rr(i64 %a, i64 %b, i64 %x, i64 %y) nounwind {
5959
define i8 @adc8rm(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
6060
; NDD-LABEL: adc8rm:
6161
; NDD: # %bb.0:
62-
; NDD-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
62+
; NDD-NEXT: movzbl (%rsi), %eax # encoding: [0x0f,0xb6,0x06]
6363
; NDD-NEXT: cmpb %dl, %cl # encoding: [0x38,0xd1]
64-
; NDD-NEXT: {evex} adcb (%rsi), %al # encoding: [0x62,0xf4,0x7c,0x08,0x12,0x06]
65-
; NDD-NEXT: # kill: def $al killed $al killed $eax
64+
; NDD-NEXT: adcb %dil, %al # EVEX TO LEGACY Compression encoding: [0x40,0x10,0xf8]
6665
; NDD-NEXT: retq # encoding: [0xc3]
6766
;
6867
; MEM-LABEL: adc8rm:
@@ -81,10 +80,9 @@ define i8 @adc8rm(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
8180
define i16 @adc16rm(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
8281
; NDD-LABEL: adc16rm:
8382
; NDD: # %bb.0:
84-
; NDD-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
83+
; NDD-NEXT: movzwl (%rsi), %eax # encoding: [0x0f,0xb7,0x06]
8584
; NDD-NEXT: cmpw %dx, %cx # encoding: [0x66,0x39,0xd1]
86-
; NDD-NEXT: {evex} adcw (%rsi), %ax # encoding: [0x62,0xf4,0x7d,0x08,0x13,0x06]
87-
; NDD-NEXT: # kill: def $ax killed $ax killed $eax
85+
; NDD-NEXT: adcw %di, %ax # EVEX TO LEGACY Compression encoding: [0x66,0x11,0xf8]
8886
; NDD-NEXT: retq # encoding: [0xc3]
8987
;
9088
; MEM-LABEL: adc16rm:
@@ -103,9 +101,9 @@ define i16 @adc16rm(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
103101
define i32 @adc32rm(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
104102
; NDD-LABEL: adc32rm:
105103
; NDD: # %bb.0:
106-
; NDD-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
104+
; NDD-NEXT: movl (%rsi), %eax # encoding: [0x8b,0x06]
107105
; NDD-NEXT: cmpl %edx, %ecx # encoding: [0x39,0xd1]
108-
; NDD-NEXT: {evex} adcl (%rsi), %eax # encoding: [0x62,0xf4,0x7c,0x08,0x13,0x06]
106+
; NDD-NEXT: adcl %edi, %eax # EVEX TO LEGACY Compression encoding: [0x11,0xf8]
109107
; NDD-NEXT: retq # encoding: [0xc3]
110108
;
111109
; MEM-LABEL: adc32rm:
@@ -124,9 +122,9 @@ define i32 @adc32rm(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
124122
define i64 @adc64rm(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
125123
; NDD-LABEL: adc64rm:
126124
; NDD: # %bb.0:
127-
; NDD-NEXT: movq %rdi, %rax # encoding: [0x48,0x89,0xf8]
125+
; NDD-NEXT: movq (%rsi), %rax # encoding: [0x48,0x8b,0x06]
128126
; NDD-NEXT: cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1]
129-
; NDD-NEXT: {evex} adcq (%rsi), %rax # encoding: [0x62,0xf4,0xfc,0x08,0x13,0x06]
127+
; NDD-NEXT: adcq %rdi, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x11,0xf8]
130128
; NDD-NEXT: retq # encoding: [0xc3]
131129
;
132130
; MEM-LABEL: adc64rm:

‎llvm/test/CodeGen/X86/apx/sbb.ll‎

Lines changed: 16 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -59,18 +59,16 @@ define i64 @sbb64rr(i64 %a, i64 %b, i64 %x, i64 %y) nounwind {
5959
define i8 @sbb8rm(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
6060
; NDD-LABEL: sbb8rm:
6161
; NDD: # %bb.0:
62-
; NDD-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
62+
; NDD-NEXT: movzbl (%rsi), %eax # encoding: [0x0f,0xb6,0x06]
6363
; NDD-NEXT: cmpb %dl, %cl # encoding: [0x38,0xd1]
64-
; NDD-NEXT: {evex} sbbb (%rsi), %al # encoding: [0x62,0xf4,0x7c,0x08,0x1a,0x06]
65-
; NDD-NEXT: # kill: def $al killed $al killed $eax
64+
; NDD-NEXT: sbbb %al, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x18,0xc7]
6665
; NDD-NEXT: retq # encoding: [0xc3]
6766
;
6867
; IMMONLY-LABEL: sbb8rm:
6968
; IMMONLY: # %bb.0:
70-
; IMMONLY-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
69+
; IMMONLY-NEXT: movzbl (%rsi), %eax # encoding: [0x0f,0xb6,0x06]
7170
; IMMONLY-NEXT: cmpb %dl, %cl # encoding: [0x38,0xd1]
72-
; IMMONLY-NEXT: {evex} sbbb (%rsi), %al # encoding: [0x62,0xf4,0x7c,0x08,0x1a,0x06]
73-
; IMMONLY-NEXT: # kill: def $al killed $al killed $eax
71+
; IMMONLY-NEXT: sbbb %al, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x18,0xc7]
7472
; IMMONLY-NEXT: retq # encoding: [0xc3]
7573
;
7674
; MEM-LABEL: sbb8rm:
@@ -89,18 +87,16 @@ define i8 @sbb8rm(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind {
8987
define i16 @sbb16rm(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
9088
; NDD-LABEL: sbb16rm:
9189
; NDD: # %bb.0:
92-
; NDD-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
90+
; NDD-NEXT: movzwl (%rsi), %eax # encoding: [0x0f,0xb7,0x06]
9391
; NDD-NEXT: cmpw %dx, %cx # encoding: [0x66,0x39,0xd1]
94-
; NDD-NEXT: {evex} sbbw (%rsi), %ax # encoding: [0x62,0xf4,0x7d,0x08,0x1b,0x06]
95-
; NDD-NEXT: # kill: def $ax killed $ax killed $eax
92+
; NDD-NEXT: sbbw %ax, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x19,0xc7]
9693
; NDD-NEXT: retq # encoding: [0xc3]
9794
;
9895
; IMMONLY-LABEL: sbb16rm:
9996
; IMMONLY: # %bb.0:
100-
; IMMONLY-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
97+
; IMMONLY-NEXT: movzwl (%rsi), %eax # encoding: [0x0f,0xb7,0x06]
10198
; IMMONLY-NEXT: cmpw %dx, %cx # encoding: [0x66,0x39,0xd1]
102-
; IMMONLY-NEXT: {evex} sbbw (%rsi), %ax # encoding: [0x62,0xf4,0x7d,0x08,0x1b,0x06]
103-
; IMMONLY-NEXT: # kill: def $ax killed $ax killed $eax
99+
; IMMONLY-NEXT: sbbw %ax, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x19,0xc7]
104100
; IMMONLY-NEXT: retq # encoding: [0xc3]
105101
;
106102
; MEM-LABEL: sbb16rm:
@@ -119,16 +115,16 @@ define i16 @sbb16rm(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind {
119115
define i32 @sbb32rm(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
120116
; NDD-LABEL: sbb32rm:
121117
; NDD: # %bb.0:
122-
; NDD-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
118+
; NDD-NEXT: movl (%rsi), %eax # encoding: [0x8b,0x06]
123119
; NDD-NEXT: cmpl %edx, %ecx # encoding: [0x39,0xd1]
124-
; NDD-NEXT: {evex} sbbl (%rsi), %eax # encoding: [0x62,0xf4,0x7c,0x08,0x1b,0x06]
120+
; NDD-NEXT: sbbl %eax, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x19,0xc7]
125121
; NDD-NEXT: retq # encoding: [0xc3]
126122
;
127123
; IMMONLY-LABEL: sbb32rm:
128124
; IMMONLY: # %bb.0:
129-
; IMMONLY-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
125+
; IMMONLY-NEXT: movl (%rsi), %eax # encoding: [0x8b,0x06]
130126
; IMMONLY-NEXT: cmpl %edx, %ecx # encoding: [0x39,0xd1]
131-
; IMMONLY-NEXT: {evex} sbbl (%rsi), %eax # encoding: [0x62,0xf4,0x7c,0x08,0x1b,0x06]
127+
; IMMONLY-NEXT: sbbl %eax, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x19,0xc7]
132128
; IMMONLY-NEXT: retq # encoding: [0xc3]
133129
;
134130
; MEM-LABEL: sbb32rm:
@@ -147,16 +143,16 @@ define i32 @sbb32rm(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind {
147143
define i64 @sbb64rm(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind {
148144
; NDD-LABEL: sbb64rm:
149145
; NDD: # %bb.0:
150-
; NDD-NEXT: movq %rdi, %rax # encoding: [0x48,0x89,0xf8]
146+
; NDD-NEXT: movq (%rsi), %rax # encoding: [0x48,0x8b,0x06]
151147
; NDD-NEXT: cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1]
152-
; NDD-NEXT: {evex} sbbq (%rsi), %rax # encoding: [0x62,0xf4,0xfc,0x08,0x1b,0x06]
148+
; NDD-NEXT: sbbq %rax, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x19,0xc7]
153149
; NDD-NEXT: retq # encoding: [0xc3]
154150
;
155151
; IMMONLY-LABEL: sbb64rm:
156152
; IMMONLY: # %bb.0:
157-
; IMMONLY-NEXT: movq %rdi, %rax # encoding: [0x48,0x89,0xf8]
153+
; IMMONLY-NEXT: movq (%rsi), %rax # encoding: [0x48,0x8b,0x06]
158154
; IMMONLY-NEXT: cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1]
159-
; IMMONLY-NEXT: {evex} sbbq (%rsi), %rax # encoding: [0x62,0xf4,0xfc,0x08,0x1b,0x06]
155+
; IMMONLY-NEXT: sbbq %rax, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x19,0xc7]
160156
; IMMONLY-NEXT: retq # encoding: [0xc3]
161157
;
162158
; MEM-LABEL: sbb64rm:

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