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Mel-ChenMel-Chen
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[LV] Pre-commit test for cast IV live-out optimization. nfc (#195055)
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‎llvm/test/Transforms/LoopVectorize/iv_outside_user.ll‎

Lines changed: 111 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1299,3 +1299,114 @@ loop:
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exit:
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ret i64 %iv.1.next
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}
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define i32 @cast_incremented_iv_live_out(ptr %arr, i32 %n) {
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; VEC-LABEL: define i32 @cast_incremented_iv_live_out(
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; VEC-SAME: ptr [[ARR:%.*]], i32 [[N:%.*]]) {
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; VEC-NEXT: [[ENTRY:.*]]:
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; VEC-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64
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; VEC-NEXT: [[UMAX:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP0]], i64 1)
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; VEC-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[UMAX]], 2
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; VEC-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
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; VEC: [[VECTOR_PH]]:
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; VEC-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[UMAX]], 2
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; VEC-NEXT: [[N_VEC:%.*]] = sub i64 [[UMAX]], [[N_MOD_VF]]
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; VEC-NEXT: br label %[[VECTOR_BODY:.*]]
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; VEC: [[VECTOR_BODY]]:
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; VEC-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
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; VEC-NEXT: [[VEC_IND:%.*]] = phi <2 x i64> [ <i64 0, i64 1>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
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; VEC-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[ARR]], i64 [[INDEX]]
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; VEC-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i8>, ptr [[TMP1]], align 1
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; VEC-NEXT: [[TMP2:%.*]] = add <2 x i8> [[WIDE_LOAD]], splat (i8 1)
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; VEC-NEXT: store <2 x i8> [[TMP2]], ptr [[TMP1]], align 1
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; VEC-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
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; VEC-NEXT: [[VEC_IND_NEXT]] = add <2 x i64> [[VEC_IND]], splat (i64 2)
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; VEC-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
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; VEC-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], {{!llvm.loop ![0-9]+}}
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; VEC: [[MIDDLE_BLOCK]]:
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; VEC-NEXT: [[TMP4:%.*]] = add <2 x i64> [[VEC_IND]], splat (i64 1)
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; VEC-NEXT: [[TMP5:%.*]] = trunc <2 x i64> [[TMP4]] to <2 x i32>
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; VEC-NEXT: [[TMP6:%.*]] = extractelement <2 x i32> [[TMP5]], i64 1
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; VEC-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[UMAX]], [[N_VEC]]
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; VEC-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]
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; VEC: [[SCALAR_PH]]:
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; VEC-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
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; VEC-NEXT: br label %[[LOOP:.*]]
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; VEC: [[LOOP]]:
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; VEC-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
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; VEC-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[ARR]], i64 [[IV]]
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; VEC-NEXT: [[VAL:%.*]] = load i8, ptr [[GEP]], align 1
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; VEC-NEXT: [[VAL_INC:%.*]] = add i8 [[VAL]], 1
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; VEC-NEXT: store i8 [[VAL_INC]], ptr [[GEP]], align 1
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; VEC-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
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; VEC-NEXT: [[IV_TRUNC:%.*]] = trunc i64 [[IV_NEXT]] to i32
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; VEC-NEXT: [[COND:%.*]] = icmp ult i32 [[IV_TRUNC]], [[N]]
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; VEC-NEXT: br i1 [[COND]], label %[[LOOP]], label %[[EXIT]], {{!llvm.loop ![0-9]+}}
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; VEC: [[EXIT]]:
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; VEC-NEXT: [[IV_TRUNC_LCSSA:%.*]] = phi i32 [ [[IV_TRUNC]], %[[LOOP]] ], [ [[TMP6]], %[[MIDDLE_BLOCK]] ]
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; VEC-NEXT: ret i32 [[IV_TRUNC_LCSSA]]
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;
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; INTERLEAVE-LABEL: define i32 @cast_incremented_iv_live_out(
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; INTERLEAVE-SAME: ptr [[ARR:%.*]], i32 [[N:%.*]]) {
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; INTERLEAVE-NEXT: [[ENTRY:.*]]:
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; INTERLEAVE-NEXT: [[TMP0:%.*]] = zext i32 [[N]] to i64
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; INTERLEAVE-NEXT: [[UMAX:%.*]] = call i64 @llvm.umax.i64(i64 [[TMP0]], i64 1)
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; INTERLEAVE-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[UMAX]], 2
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; INTERLEAVE-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
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; INTERLEAVE: [[VECTOR_PH]]:
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; INTERLEAVE-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[UMAX]], 2
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; INTERLEAVE-NEXT: [[N_VEC:%.*]] = sub i64 [[UMAX]], [[N_MOD_VF]]
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; INTERLEAVE-NEXT: br label %[[VECTOR_BODY:.*]]
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; INTERLEAVE: [[VECTOR_BODY]]:
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; INTERLEAVE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
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; INTERLEAVE-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 1
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; INTERLEAVE-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[ARR]], i64 [[INDEX]]
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; INTERLEAVE-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[ARR]], i64 [[TMP1]]
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; INTERLEAVE-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP2]], align 1
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; INTERLEAVE-NEXT: [[TMP5:%.*]] = load i8, ptr [[TMP3]], align 1
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; INTERLEAVE-NEXT: [[TMP6:%.*]] = add i8 [[TMP4]], 1
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; INTERLEAVE-NEXT: [[TMP7:%.*]] = add i8 [[TMP5]], 1
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; INTERLEAVE-NEXT: store i8 [[TMP6]], ptr [[TMP2]], align 1
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; INTERLEAVE-NEXT: store i8 [[TMP7]], ptr [[TMP3]], align 1
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; INTERLEAVE-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
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; INTERLEAVE-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
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; INTERLEAVE-NEXT: br i1 [[TMP8]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], {{!llvm.loop ![0-9]+}}
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; INTERLEAVE: [[MIDDLE_BLOCK]]:
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; INTERLEAVE-NEXT: [[TMP9:%.*]] = add i64 [[TMP1]], 1
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; INTERLEAVE-NEXT: [[TMP10:%.*]] = trunc i64 [[TMP9]] to i32
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; INTERLEAVE-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[UMAX]], [[N_VEC]]
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; INTERLEAVE-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]
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; INTERLEAVE: [[SCALAR_PH]]:
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; INTERLEAVE-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
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; INTERLEAVE-NEXT: br label %[[LOOP:.*]]
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; INTERLEAVE: [[LOOP]]:
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; INTERLEAVE-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
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; INTERLEAVE-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[ARR]], i64 [[IV]]
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; INTERLEAVE-NEXT: [[VAL:%.*]] = load i8, ptr [[GEP]], align 1
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; INTERLEAVE-NEXT: [[VAL_INC:%.*]] = add i8 [[VAL]], 1
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; INTERLEAVE-NEXT: store i8 [[VAL_INC]], ptr [[GEP]], align 1
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; INTERLEAVE-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
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; INTERLEAVE-NEXT: [[IV_TRUNC:%.*]] = trunc i64 [[IV_NEXT]] to i32
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; INTERLEAVE-NEXT: [[COND:%.*]] = icmp ult i32 [[IV_TRUNC]], [[N]]
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; INTERLEAVE-NEXT: br i1 [[COND]], label %[[LOOP]], label %[[EXIT]], {{!llvm.loop ![0-9]+}}
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; INTERLEAVE: [[EXIT]]:
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; INTERLEAVE-NEXT: [[IV_TRUNC_LCSSA:%.*]] = phi i32 [ [[IV_TRUNC]], %[[LOOP]] ], [ [[TMP10]], %[[MIDDLE_BLOCK]] ]
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; INTERLEAVE-NEXT: ret i32 [[IV_TRUNC_LCSSA]]
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%gep = getelementptr i8, ptr %arr, i64 %iv
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%val = load i8, ptr %gep, align 1
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%val.inc = add i8 %val, 1
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store i8 %val.inc, ptr %gep, align 1
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%iv.next = add i64 %iv, 1
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%iv.trunc = trunc i64 %iv.next to i32
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%cond = icmp ult i32 %iv.trunc, %n
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br i1 %cond, label %loop, label %exit
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exit:
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ret i32 %iv.trunc
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}

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