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[GISel][RISCV] Legalize G_{U|S}DIVREM (#93067)
This patch expands `G_{U|S}DIVREM` into `G_{U|S}DIV + G_{U|S}REM`. `G_{U|S}DIVREM` is generated by the following fold: https://github.com/llvm/llvm-project/blob/4ea21a0261cd8599a9ffa15f5c554ab0d4bbbe27/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp#L1410-L1471 It always folds `div + rem` pairs into `divrem` during pre-legalization. I tried to change `isLegalOrBeforeLegalizer` to `isLegal`, but it produced worse codegen on AArch64.
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‎llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp‎

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@@ -349,6 +349,9 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST)
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.widenScalarToNextPow2(0);
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}
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// TODO: Use libcall for sDoubleXLen.
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getActionDefinitionsBuilder({G_UDIVREM, G_SDIVREM}).lower();
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auto &AbsActions = getActionDefinitionsBuilder(G_ABS);
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if (ST.hasStdExtZbb())
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AbsActions.customFor({s32, sXLen}).minScalar(0, sXLen);

‎llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-div-rv32.mir‎

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Original file line numberDiff line numberDiff line change
@@ -555,3 +555,93 @@ body: |
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PseudoRET implicit $x10, implicit $x11
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...
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---
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name: udivrem_i32
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body: |
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bb.1.entry:
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liveins: $x10, $x11
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; CHECK-I-LABEL: name: udivrem_i32
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; CHECK-I: liveins: $x10, $x11
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; CHECK-I-NEXT: {{ $}}
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; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
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; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
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; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
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; CHECK-I-NEXT: $x10 = COPY [[COPY]](s32)
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; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s32)
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; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__udivsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
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; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
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; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
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; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
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; CHECK-I-NEXT: $x10 = COPY [[COPY]](s32)
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; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s32)
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; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__umodsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
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; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
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; CHECK-I-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x10
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; CHECK-I-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY2]], [[COPY3]]
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; CHECK-I-NEXT: $x10 = COPY [[ADD]](s32)
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; CHECK-I-NEXT: PseudoRET implicit $x10
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;
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; CHECK-M-LABEL: name: udivrem_i32
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; CHECK-M: liveins: $x10, $x11
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; CHECK-M-NEXT: {{ $}}
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; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
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; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
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; CHECK-M-NEXT: [[UDIV:%[0-9]+]]:_(s32) = G_UDIV [[COPY]], [[COPY1]]
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; CHECK-M-NEXT: [[UREM:%[0-9]+]]:_(s32) = G_UREM [[COPY]], [[COPY1]]
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; CHECK-M-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[UDIV]], [[UREM]]
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; CHECK-M-NEXT: $x10 = COPY [[ADD]](s32)
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; CHECK-M-NEXT: PseudoRET implicit $x10
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%0:_(s32) = COPY $x10
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%1:_(s32) = COPY $x11
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%2:_(s32), %3:_(s32) = G_UDIVREM %0, %1
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%4:_(s32) = G_ADD %2, %3
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$x10 = COPY %4(s32)
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PseudoRET implicit $x10
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...
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---
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name: sdivrem_i32
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body: |
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bb.1.entry:
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liveins: $x10, $x11
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; CHECK-I-LABEL: name: sdivrem_i32
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; CHECK-I: liveins: $x10, $x11
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; CHECK-I-NEXT: {{ $}}
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; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
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; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
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; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
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; CHECK-I-NEXT: $x10 = COPY [[COPY]](s32)
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; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s32)
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; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
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; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
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; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
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; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
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; CHECK-I-NEXT: $x10 = COPY [[COPY]](s32)
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; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s32)
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; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__modsi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
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; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
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; CHECK-I-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x10
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; CHECK-I-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY2]], [[COPY3]]
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; CHECK-I-NEXT: $x10 = COPY [[ADD]](s32)
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; CHECK-I-NEXT: PseudoRET implicit $x10
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;
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; CHECK-M-LABEL: name: sdivrem_i32
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; CHECK-M: liveins: $x10, $x11
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; CHECK-M-NEXT: {{ $}}
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; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
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; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
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; CHECK-M-NEXT: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[COPY]], [[COPY1]]
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; CHECK-M-NEXT: [[SREM:%[0-9]+]]:_(s32) = G_SREM [[COPY]], [[COPY1]]
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; CHECK-M-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[SDIV]], [[SREM]]
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; CHECK-M-NEXT: $x10 = COPY [[ADD]](s32)
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; CHECK-M-NEXT: PseudoRET implicit $x10
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%0:_(s32) = COPY $x10
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%1:_(s32) = COPY $x11
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%2:_(s32), %3:_(s32) = G_SDIVREM %0, %1
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%4:_(s32) = G_ADD %2, %3
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$x10 = COPY %4(s32)
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PseudoRET implicit $x10
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...

‎llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-div-rv64.mir‎

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Original file line numberDiff line numberDiff line change
@@ -655,3 +655,93 @@ body: |
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PseudoRET implicit $x10, implicit $x11
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...
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---
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name: udivrem_i64
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body: |
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bb.1.entry:
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liveins: $x10, $x11
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; CHECK-I-LABEL: name: udivrem_i64
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; CHECK-I: liveins: $x10, $x11
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; CHECK-I-NEXT: {{ $}}
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; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
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; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
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; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
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; CHECK-I-NEXT: $x10 = COPY [[COPY]](s64)
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; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s64)
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; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__udivdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
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; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
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; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
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; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
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; CHECK-I-NEXT: $x10 = COPY [[COPY]](s64)
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; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s64)
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; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__umoddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
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; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
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; CHECK-I-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x10
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; CHECK-I-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY2]], [[COPY3]]
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; CHECK-I-NEXT: $x10 = COPY [[ADD]](s64)
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; CHECK-I-NEXT: PseudoRET implicit $x10
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;
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; CHECK-M-LABEL: name: udivrem_i64
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; CHECK-M: liveins: $x10, $x11
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; CHECK-M-NEXT: {{ $}}
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; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
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; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
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; CHECK-M-NEXT: [[UDIV:%[0-9]+]]:_(s64) = G_UDIV [[COPY]], [[COPY1]]
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; CHECK-M-NEXT: [[UREM:%[0-9]+]]:_(s64) = G_UREM [[COPY]], [[COPY1]]
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; CHECK-M-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[UDIV]], [[UREM]]
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; CHECK-M-NEXT: $x10 = COPY [[ADD]](s64)
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; CHECK-M-NEXT: PseudoRET implicit $x10
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%0:_(s64) = COPY $x10
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%1:_(s64) = COPY $x11
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%2:_(s64), %3:_(s64) = G_UDIVREM %0, %1
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%4:_(s64) = G_ADD %2, %3
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$x10 = COPY %4(s64)
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PseudoRET implicit $x10
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...
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---
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name: sdivrem_i64
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body: |
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bb.1.entry:
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liveins: $x10, $x11
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; CHECK-I-LABEL: name: sdivrem_i64
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; CHECK-I: liveins: $x10, $x11
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; CHECK-I-NEXT: {{ $}}
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; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
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; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
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; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
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; CHECK-I-NEXT: $x10 = COPY [[COPY]](s64)
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; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s64)
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; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
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; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
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; CHECK-I-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
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; CHECK-I-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $x2, implicit $x2
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; CHECK-I-NEXT: $x10 = COPY [[COPY]](s64)
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; CHECK-I-NEXT: $x11 = COPY [[COPY1]](s64)
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; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, csr_ilp32_lp64, implicit-def $x1, implicit $x10, implicit $x11, implicit-def $x10
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; CHECK-I-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
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; CHECK-I-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x10
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; CHECK-I-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY2]], [[COPY3]]
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; CHECK-I-NEXT: $x10 = COPY [[ADD]](s64)
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; CHECK-I-NEXT: PseudoRET implicit $x10
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;
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; CHECK-M-LABEL: name: sdivrem_i64
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; CHECK-M: liveins: $x10, $x11
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; CHECK-M-NEXT: {{ $}}
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; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
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; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
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; CHECK-M-NEXT: [[SDIV:%[0-9]+]]:_(s64) = G_SDIV [[COPY]], [[COPY1]]
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; CHECK-M-NEXT: [[SREM:%[0-9]+]]:_(s64) = G_SREM [[COPY]], [[COPY1]]
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; CHECK-M-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[SDIV]], [[SREM]]
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; CHECK-M-NEXT: $x10 = COPY [[ADD]](s64)
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; CHECK-M-NEXT: PseudoRET implicit $x10
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%0:_(s64) = COPY $x10
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%1:_(s64) = COPY $x11
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%2:_(s64), %3:_(s64) = G_SDIVREM %0, %1
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%4:_(s64) = G_ADD %2, %3
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$x10 = COPY %4(s64)
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PseudoRET implicit $x10
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...

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