diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-sextload-from-sextinreg.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-sextload-from-sextinreg.mir
index 662f21be2033a..560ffece5c97f 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-sextload-from-sextinreg.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-sextload-from-sextinreg.mir
@@ -1,5 +1,9 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 # RUN: llc -mtriple aarch64 -run-pass=aarch64-prelegalizer-combiner -aarch64prelegalizercombiner-only-enable-rule="sext_inreg_of_load" -verify-machineinstrs %s -o - | FileCheck %s
+
+# Needed for the -aarch64prelegalizercombiner-only-enable-rule flag
+# REQUIRES: asserts
+
 ---
 name:            sextload_from_inreg
 alignment:       4