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samd/ADC_DAC: Add adc.busy() and dac.busy() methods.
These return True, while a timed action is ongoing.
1 parent 396a4bf commit 727362d

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2 files changed

+30
-2
lines changed

2 files changed

+30
-2
lines changed

ports/samd/machine_adc.c

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -340,6 +340,7 @@ STATIC mp_obj_t machine_adc_deinit(mp_obj_t self_in) {
340340
#if defined(MCU_SAMD51)
341341
if (self->dma_channel == device_mgmt[self->adc_config.device].dma_channel) {
342342
device_mgmt[self->adc_config.device].dma_channel = -1;
343+
device_mgmt[self->adc_config.device].busy = 0;
343344
}
344345
#endif
345346
dac_stop_dma(self->dma_channel, true);
@@ -354,6 +355,13 @@ STATIC mp_obj_t machine_adc_deinit(mp_obj_t self_in) {
354355
}
355356
STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_adc_deinit_obj, machine_adc_deinit);
356357

358+
// busy() : Report, if the ADC device is busy
359+
STATIC mp_obj_t machine_adc_busy(mp_obj_t self_in) {
360+
machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
361+
return device_mgmt[self->adc_config.device].busy ? mp_const_true : mp_const_false;
362+
}
363+
STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_adc_busy_obj, machine_adc_busy);
364+
357365
void adc_deinit_all(void) {
358366
ch_busy_flags = 0;
359367
device_mgmt[0].init = 0;
@@ -365,6 +373,7 @@ void adc_deinit_all(void) {
365373
}
366374

367375
STATIC const mp_rom_map_elem_t adc_locals_dict_table[] = {
376+
{ MP_ROM_QSTR(MP_QSTR_busy), MP_ROM_PTR(&machine_adc_busy_obj) },
368377
{ MP_ROM_QSTR(MP_QSTR_read_u16), MP_ROM_PTR(&machine_adc_read_u16_obj) },
369378
{ MP_ROM_QSTR(MP_QSTR_read_timed), MP_ROM_PTR(&machine_adc_read_timed_obj) },
370379
{ MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&machine_adc_deinit_obj) },

ports/samd/machine_dac.c

Lines changed: 21 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,7 @@
2828
#include <stdint.h>
2929
#include "py/obj.h"
3030
#include "py/runtime.h"
31+
#include "py/mperrno.h"
3132
#include "py/mphal.h"
3233

3334
#include "sam.h"
@@ -45,6 +46,7 @@ typedef struct _dac_obj_t {
4546
uint8_t vref;
4647
int8_t dma_channel;
4748
int8_t tc_index;
49+
bool busy;
4850
uint32_t count;
4951
mp_obj_t callback;
5052
} dac_obj_t;
@@ -62,8 +64,8 @@ STATIC dac_obj_t dac_obj[] = {
6264
#elif defined(MCU_SAMD51)
6365

6466
STATIC dac_obj_t dac_obj[] = {
65-
{{&machine_dac_type}, 0, 0, PIN_PA02, 2, -1, -1, 1, NULL},
66-
{{&machine_dac_type}, 1, 0, PIN_PA05, 2, -1, -1, 1, NULL},
67+
{{&machine_dac_type}, 0, 0, PIN_PA02, 2, -1, -1, false, 1, NULL},
68+
{{&machine_dac_type}, 1, 0, PIN_PA05, 2, -1, -1, false, 1, NULL},
6769
};
6870
// According to Errata 2.9.2, VDDANA as ref value is not available. However it worked
6971
// in tests. So I keep the selection here but set the default to Aref, which is usually
@@ -94,6 +96,7 @@ void dac_irq_handler(int dma_channel) {
9496
dma_desc[self->dma_channel].BTCTRL.reg |= DMAC_BTCTRL_VALID;
9597
DMAC->CHCTRLA.reg |= DMAC_CHCTRLA_ENABLE;
9698
} else {
99+
self->busy = false;
97100
if (self->callback != MP_OBJ_NULL) {
98101
mp_sched_schedule(self->callback, self);
99102
}
@@ -111,6 +114,7 @@ void dac_irq_handler(int dma_channel) {
111114
dma_desc[self->dma_channel].BTCTRL.reg |= DMAC_BTCTRL_VALID;
112115
DMAC->Channel[self->dma_channel].CHCTRLA.reg |= DMAC_CHCTRLA_ENABLE;
113116
} else {
117+
self->busy = false;
114118
if (self->callback != MP_OBJ_NULL) {
115119
mp_sched_schedule(self->callback, self);
116120
}
@@ -215,6 +219,10 @@ STATIC void dac_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t
215219
STATIC mp_obj_t dac_write(mp_obj_t self_in, mp_obj_t value_in) {
216220
Dac *dac = dac_bases[0]; // Just one DAC
217221
dac_obj_t *self = self_in;
222+
if (self->busy != false) {
223+
mp_raise_OSError(MP_EBUSY);
224+
}
225+
218226
int value = mp_obj_get_int(value_in);
219227

220228
if (value < 0 || value > MAX_DAC_VALUE) {
@@ -257,6 +265,8 @@ STATIC mp_obj_t dac_write_timed(size_t n_args, const mp_obj_t *args) {
257265
}
258266
// Configure TC; no need to check the return value
259267
configure_tc(self->tc_index, freq, 0);
268+
self->busy = true;
269+
260270
// Configure DMA for halfword output to the DAC
261271
#if defined(MCU_SAMD21)
262272

@@ -335,10 +345,18 @@ STATIC mp_obj_t dac_deinit(mp_obj_t self_in) {
335345
self->tc_index = -1;
336346
}
337347
self->callback = MP_OBJ_NULL;
348+
self->busy = false;
338349
return mp_const_none;
339350
}
340351
MP_DEFINE_CONST_FUN_OBJ_1(dac_deinit_obj, dac_deinit);
341352

353+
// busy() : Report, if the DAC device is busy
354+
STATIC mp_obj_t machine_dac_busy(mp_obj_t self_in) {
355+
dac_obj_t *self = MP_OBJ_TO_PTR(self_in);
356+
return self->busy ? mp_const_true : mp_const_false;
357+
}
358+
STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_dac_busy_obj, machine_dac_busy);
359+
342360
// Clear the DMA channel entry in the DAC object.
343361
void dac_deinit_channel(void) {
344362
dac_obj[0].dma_channel = -1;
@@ -348,6 +366,7 @@ void dac_deinit_channel(void) {
348366
}
349367

350368
STATIC const mp_rom_map_elem_t dac_locals_dict_table[] = {
369+
{ MP_ROM_QSTR(MP_QSTR_busy), MP_ROM_PTR(&machine_dac_busy_obj) },
351370
{ MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&dac_deinit_obj) },
352371
{ MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&dac_write_obj) },
353372
{ MP_ROM_QSTR(MP_QSTR_write_timed), MP_ROM_PTR(&dac_write_timed_obj) },

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