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wizard97wizard97
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Start porting SCCB to new i2c driver
1 parent b6629d1 commit 275dafd

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3 files changed

+153
-148
lines changed

3 files changed

+153
-148
lines changed

‎CMakeLists.txt‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -75,7 +75,7 @@ if(IDF_TARGET STREQUAL "esp32" OR IDF_TARGET STREQUAL "esp32s2" OR IDF_TARGET ST
7575
)
7676
endif()
7777

78-
set(priv_requires freertos nvs_flash)
78+
set(priv_requires freertos nvs_flash esp_driver_i2c)
7979

8080
set(min_version_for_esp_timer "4.2")
8181
if (idf_version VERSION_GREATER_EQUAL min_version_for_esp_timer)

‎driver/sccb.c‎

Lines changed: 146 additions & 135 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@
1414
#include "sensor.h"
1515
#include <stdio.h>
1616
#include "sdkconfig.h"
17+
#include "driver/i2c_master.h"
1718
#if defined(ARDUINO_ARCH_ESP32) && defined(CONFIG_ARDUHAL_ESP_LOG)
1819
#include "esp32-hal-log.h"
1920
#else
@@ -23,7 +24,6 @@ static const char* TAG = "sccb";
2324

2425
#define LITTLETOBIG(x) ((x<<8)|(x>>8))
2526

26-
#include "driver/i2c.h"
2727

2828
// support IDF 5.x
2929
#ifndef portTICK_RATE_MS
@@ -45,31 +45,59 @@ const int SCCB_I2C_PORT_DEFAULT = 0;
4545

4646
static int sccb_i2c_port;
4747
static bool sccb_owns_i2c_port;
48+
static i2c_master_bus_handle_t bus_handle;
49+
static i2c_master_dev_handle_t dev_handle = NULL;
50+
static uint8_t curr_slave_addr = 0;
51+
52+
static int UpdateDevice(uint8_t slv_addr) {
53+
if (slv_addr != curr_slave_addr) {
54+
i2c_master_bus_rm_device(dev_handle);
55+
curr_slave_addr = 0;
56+
}
57+
if (!dev_handle) {
58+
// Not initialized
59+
i2c_device_config_t dev_cfg = {
60+
.dev_addr_length = I2C_ADDR_BIT_LEN_7,
61+
.device_address = slv_addr,
62+
.scl_speed_hz = SCCB_FREQ,
63+
};
64+
ESP_ERROR_CHECK(i2c_master_bus_add_device(bus_handle, &dev_cfg, &dev_handle));
65+
curr_slave_addr = slv_addr;
66+
}
67+
return 0;
68+
}
4869

4970
int SCCB_Init(int pin_sda, int pin_scl)
5071
{
5172
ESP_LOGI(TAG, "pin_sda %d pin_scl %d", pin_sda, pin_scl);
52-
i2c_config_t conf;
53-
esp_err_t ret;
73+
i2c_master_bus_config_t i2c_mst_config = {
74+
.clk_source = I2C_CLK_SRC_DEFAULT,
75+
.i2c_port = SCCB_I2C_PORT_DEFAULT,
76+
.scl_io_num = pin_scl,
77+
.sda_io_num =pin_sda,
78+
.glitch_ignore_cnt = 7,
79+
};
80+
return i2c_new_master_bus(&i2c_mst_config, &bus_handle);
5481

55-
memset(&conf, 0, sizeof(i2c_config_t));
5682

57-
sccb_i2c_port = SCCB_I2C_PORT_DEFAULT;
58-
sccb_owns_i2c_port = true;
59-
ESP_LOGI(TAG, "sccb_i2c_port=%d", sccb_i2c_port);
83+
// memset(&conf, 0, sizeof(i2c_config_t));
6084

61-
conf.mode = I2C_MODE_MASTER;
62-
conf.sda_io_num = pin_sda;
63-
conf.sda_pullup_en = GPIO_PULLUP_ENABLE;
64-
conf.scl_io_num = pin_scl;
65-
conf.scl_pullup_en = GPIO_PULLUP_ENABLE;
66-
conf.master.clk_speed = SCCB_FREQ;
85+
// sccb_i2c_port = SCCB_I2C_PORT_DEFAULT;
86+
// sccb_owns_i2c_port = true;
87+
// ESP_LOGI(TAG, "sccb_i2c_port=%d", sccb_i2c_port);
6788

68-
if ((ret = i2c_param_config(sccb_i2c_port, &conf)) != ESP_OK) {
69-
return ret;
70-
}
89+
// conf.mode = I2C_MODE_MASTER;
90+
// conf.sda_io_num = pin_sda;
91+
// conf.sda_pullup_en = GPIO_PULLUP_ENABLE;
92+
// conf.scl_io_num = pin_scl;
93+
// conf.scl_pullup_en = GPIO_PULLUP_ENABLE;
94+
// conf.master.clk_speed = SCCB_FREQ;
7195

72-
return i2c_driver_install(sccb_i2c_port, conf.mode, 0, 0, 0);
96+
// if ((ret = i2c_param_config(sccb_i2c_port, &conf)) != ESP_OK) {
97+
// return ret;
98+
// }
99+
100+
// return i2c_driver_install(sccb_i2c_port, conf.mode, 0, 0, 0);
73101
}
74102

75103
int SCCB_Use_Port(int i2c_num) { // sccb use an already initialized I2C port
@@ -89,7 +117,11 @@ int SCCB_Deinit(void)
89117
return ESP_OK;
90118
}
91119
sccb_owns_i2c_port = false;
92-
return i2c_driver_delete(sccb_i2c_port);
120+
if (dev_handle) {
121+
i2c_master_bus_rm_device(dev_handle);
122+
dev_handle = NULL;
123+
}
124+
return i2c_del_master_bus(bus_handle);
93125
}
94126

95127
uint8_t SCCB_Probe(void)
@@ -101,12 +133,7 @@ uint8_t SCCB_Probe(void)
101133
continue;
102134
}
103135
slave_addr = camera_sensor[i].sccb_addr;
104-
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
105-
i2c_master_start(cmd);
106-
i2c_master_write_byte(cmd, ( slave_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
107-
i2c_master_stop(cmd);
108-
esp_err_t ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
109-
i2c_cmd_link_delete(cmd);
136+
esp_err_t ret = i2c_master_probe(bus_handle, slave_addr, 1000);
110137
if( ret == ESP_OK) {
111138
return slave_addr;
112139
}
@@ -116,23 +143,9 @@ uint8_t SCCB_Probe(void)
116143

117144
uint8_t SCCB_Read(uint8_t slv_addr, uint8_t reg)
118145
{
146+
ESP_ERROR_CHECK(UpdateDevice(slv_addr));
119147
uint8_t data=0;
120-
esp_err_t ret = ESP_FAIL;
121-
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
122-
i2c_master_start(cmd);
123-
i2c_master_write_byte(cmd, ( slv_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
124-
i2c_master_write_byte(cmd, reg, ACK_CHECK_EN);
125-
i2c_master_stop(cmd);
126-
ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
127-
i2c_cmd_link_delete(cmd);
128-
if(ret != ESP_OK) return -1;
129-
cmd = i2c_cmd_link_create();
130-
i2c_master_start(cmd);
131-
i2c_master_write_byte(cmd, ( slv_addr << 1 ) | READ_BIT, ACK_CHECK_EN);
132-
i2c_master_read_byte(cmd, &data, NACK_VAL);
133-
i2c_master_stop(cmd);
134-
ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
135-
i2c_cmd_link_delete(cmd);
148+
esp_err_t ret = i2c_master_transmit_receive(dev_handle, &reg, 1, &data, 1, 1000);
136149
if(ret != ESP_OK) {
137150
ESP_LOGE(TAG, "SCCB_Read Failed addr:0x%02x, reg:0x%02x, data:0x%02x, ret:%d", slv_addr, reg, data, ret);
138151
}
@@ -141,15 +154,9 @@ uint8_t SCCB_Read(uint8_t slv_addr, uint8_t reg)
141154

142155
int SCCB_Write(uint8_t slv_addr, uint8_t reg, uint8_t data)
143156
{
144-
esp_err_t ret = ESP_FAIL;
145-
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
146-
i2c_master_start(cmd);
147-
i2c_master_write_byte(cmd, ( slv_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
148-
i2c_master_write_byte(cmd, reg, ACK_CHECK_EN);
149-
i2c_master_write_byte(cmd, data, ACK_CHECK_EN);
150-
i2c_master_stop(cmd);
151-
ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
152-
i2c_cmd_link_delete(cmd);
157+
ESP_ERROR_CHECK(UpdateDevice(slv_addr));
158+
const uint8_t all_data[2] = {reg, data};
159+
esp_err_t ret = i2c_master_transmit(dev_handle, all_data, sizeof(all_data), 1000);
153160
if(ret != ESP_OK) {
154161
ESP_LOGE(TAG, "SCCB_Write Failed addr:0x%02x, reg:0x%02x, data:0x%02x, ret:%d", slv_addr, reg, data, ret);
155162
}
@@ -158,103 +165,107 @@ int SCCB_Write(uint8_t slv_addr, uint8_t reg, uint8_t data)
158165

159166
uint8_t SCCB_Read16(uint8_t slv_addr, uint16_t reg)
160167
{
161-
uint8_t data=0;
162-
esp_err_t ret = ESP_FAIL;
163-
uint16_t reg_htons = LITTLETOBIG(reg);
164-
uint8_t *reg_u8 = (uint8_t *)&reg_htons;
165-
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
166-
i2c_master_start(cmd);
167-
i2c_master_write_byte(cmd, ( slv_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
168-
i2c_master_write_byte(cmd, reg_u8[0], ACK_CHECK_EN);
169-
i2c_master_write_byte(cmd, reg_u8[1], ACK_CHECK_EN);
170-
i2c_master_stop(cmd);
171-
ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
172-
i2c_cmd_link_delete(cmd);
173-
if(ret != ESP_OK) return -1;
174-
cmd = i2c_cmd_link_create();
175-
i2c_master_start(cmd);
176-
i2c_master_write_byte(cmd, ( slv_addr << 1 ) | READ_BIT, ACK_CHECK_EN);
177-
i2c_master_read_byte(cmd, &data, NACK_VAL);
178-
i2c_master_stop(cmd);
179-
ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
180-
i2c_cmd_link_delete(cmd);
181-
if(ret != ESP_OK) {
182-
ESP_LOGE(TAG, "W [%04x]=%02x fail\n", reg, data);
183-
}
184-
return data;
168+
return -1;
169+
// uint8_t data=0;
170+
// esp_err_t ret = ESP_FAIL;
171+
// uint16_t reg_htons = LITTLETOBIG(reg);
172+
// uint8_t *reg_u8 = (uint8_t *)&reg_htons;
173+
// i2c_cmd_handle_t cmd = i2c_cmd_link_create();
174+
// i2c_master_start(cmd);
175+
// i2c_master_write_byte(cmd, ( slv_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
176+
// i2c_master_write_byte(cmd, reg_u8[0], ACK_CHECK_EN);
177+
// i2c_master_write_byte(cmd, reg_u8[1], ACK_CHECK_EN);
178+
// i2c_master_stop(cmd);
179+
// ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
180+
// i2c_cmd_link_delete(cmd);
181+
// if(ret != ESP_OK) return -1;
182+
// cmd = i2c_cmd_link_create();
183+
// i2c_master_start(cmd);
184+
// i2c_master_write_byte(cmd, ( slv_addr << 1 ) | READ_BIT, ACK_CHECK_EN);
185+
// i2c_master_read_byte(cmd, &data, NACK_VAL);
186+
// i2c_master_stop(cmd);
187+
// ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
188+
// i2c_cmd_link_delete(cmd);
189+
// if(ret != ESP_OK) {
190+
// ESP_LOGE(TAG, "W [%04x]=%02x fail\n", reg, data);
191+
// }
192+
// return data;
185193
}
186194

187195
int SCCB_Write16(uint8_t slv_addr, uint16_t reg, uint8_t data)
188196
{
189-
static uint16_t i = 0;
190-
esp_err_t ret = ESP_FAIL;
191-
uint16_t reg_htons = LITTLETOBIG(reg);
192-
uint8_t *reg_u8 = (uint8_t *)&reg_htons;
193-
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
194-
i2c_master_start(cmd);
195-
i2c_master_write_byte(cmd, ( slv_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
196-
i2c_master_write_byte(cmd, reg_u8[0], ACK_CHECK_EN);
197-
i2c_master_write_byte(cmd, reg_u8[1], ACK_CHECK_EN);
198-
i2c_master_write_byte(cmd, data, ACK_CHECK_EN);
199-
i2c_master_stop(cmd);
200-
ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
201-
i2c_cmd_link_delete(cmd);
202-
if(ret != ESP_OK) {
203-
ESP_LOGE(TAG, "W [%04x]=%02x %d fail\n", reg, data, i++);
204-
}
205-
return ret == ESP_OK ? 0 : -1;
197+
return -1;
198+
// static uint16_t i = 0;
199+
// esp_err_t ret = ESP_FAIL;
200+
// uint16_t reg_htons = LITTLETOBIG(reg);
201+
// uint8_t *reg_u8 = (uint8_t *)&reg_htons;
202+
// i2c_cmd_handle_t cmd = i2c_cmd_link_create();
203+
// i2c_master_start(cmd);
204+
// i2c_master_write_byte(cmd, ( slv_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
205+
// i2c_master_write_byte(cmd, reg_u8[0], ACK_CHECK_EN);
206+
// i2c_master_write_byte(cmd, reg_u8[1], ACK_CHECK_EN);
207+
// i2c_master_write_byte(cmd, data, ACK_CHECK_EN);
208+
// i2c_master_stop(cmd);
209+
// ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
210+
// i2c_cmd_link_delete(cmd);
211+
// if(ret != ESP_OK) {
212+
// ESP_LOGE(TAG, "W [%04x]=%02x %d fail\n", reg, data, i++);
213+
// }
214+
// return ret == ESP_OK ? 0 : -1;
206215
}
207216

208217
uint16_t SCCB_Read_Addr16_Val16(uint8_t slv_addr, uint16_t reg)
209218
{
210-
uint16_t data = 0;
211-
uint8_t *data_u8 = (uint8_t *)&data;
212-
esp_err_t ret = ESP_FAIL;
213-
uint16_t reg_htons = LITTLETOBIG(reg);
214-
uint8_t *reg_u8 = (uint8_t *)&reg_htons;
215-
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
216-
i2c_master_start(cmd);
217-
i2c_master_write_byte(cmd, ( slv_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
218-
i2c_master_write_byte(cmd, reg_u8[0], ACK_CHECK_EN);
219-
i2c_master_write_byte(cmd, reg_u8[1], ACK_CHECK_EN);
220-
i2c_master_stop(cmd);
221-
ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
222-
i2c_cmd_link_delete(cmd);
223-
if(ret != ESP_OK) return -1;
219+
return ESP_FAIL;
220+
// uint16_t data = 0;
221+
// uint8_t *data_u8 = (uint8_t *)&data;
222+
// esp_err_t ret = ESP_FAIL;
223+
// uint16_t reg_htons = LITTLETOBIG(reg);
224+
// uint8_t *reg_u8 = (uint8_t *)&reg_htons;
225+
// i2c_cmd_handle_t cmd = i2c_cmd_link_create();
226+
// i2c_master_start(cmd);
227+
// i2c_master_write_byte(cmd, ( slv_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
228+
// i2c_master_write_byte(cmd, reg_u8[0], ACK_CHECK_EN);
229+
// i2c_master_write_byte(cmd, reg_u8[1], ACK_CHECK_EN);
230+
// i2c_master_stop(cmd);
231+
// ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
232+
// i2c_cmd_link_delete(cmd);
233+
// if(ret != ESP_OK) return -1;
224234

225-
cmd = i2c_cmd_link_create();
226-
i2c_master_start(cmd);
227-
i2c_master_write_byte(cmd, ( slv_addr << 1 ) | READ_BIT, ACK_CHECK_EN);
228-
i2c_master_read_byte(cmd, &data_u8[1], ACK_VAL);
229-
i2c_master_read_byte(cmd, &data_u8[0], NACK_VAL);
230-
i2c_master_stop(cmd);
231-
ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
232-
i2c_cmd_link_delete(cmd);
233-
if(ret != ESP_OK) {
234-
ESP_LOGE(TAG, "W [%04x]=%04x fail\n", reg, data);
235-
}
236-
return data;
235+
// cmd = i2c_cmd_link_create();
236+
// i2c_master_start(cmd);
237+
// i2c_master_write_byte(cmd, ( slv_addr << 1 ) | READ_BIT, ACK_CHECK_EN);
238+
// i2c_master_read_byte(cmd, &data_u8[1], ACK_VAL);
239+
// i2c_master_read_byte(cmd, &data_u8[0], NACK_VAL);
240+
// i2c_master_stop(cmd);
241+
// ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
242+
// i2c_cmd_link_delete(cmd);
243+
// if(ret != ESP_OK) {
244+
// ESP_LOGE(TAG, "W [%04x]=%04x fail\n", reg, data);
245+
// }
246+
// return data;
237247
}
238248

239249
int SCCB_Write_Addr16_Val16(uint8_t slv_addr, uint16_t reg, uint16_t data)
240250
{
241-
esp_err_t ret = ESP_FAIL;
242-
uint16_t reg_htons = LITTLETOBIG(reg);
243-
uint8_t *reg_u8 = (uint8_t *)&reg_htons;
244-
uint16_t data_htons = LITTLETOBIG(data);
245-
uint8_t *data_u8 = (uint8_t *)&data_htons;
246-
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
247-
i2c_master_start(cmd);
248-
i2c_master_write_byte(cmd, ( slv_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
249-
i2c_master_write_byte(cmd, reg_u8[0], ACK_CHECK_EN);
250-
i2c_master_write_byte(cmd, reg_u8[1], ACK_CHECK_EN);
251-
i2c_master_write_byte(cmd, data_u8[0], ACK_CHECK_EN);
252-
i2c_master_write_byte(cmd, data_u8[1], ACK_CHECK_EN);
253-
i2c_master_stop(cmd);
254-
ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
255-
i2c_cmd_link_delete(cmd);
256-
if(ret != ESP_OK) {
257-
ESP_LOGE(TAG, "W [%04x]=%04x fail\n", reg, data);
258-
}
259-
return ret == ESP_OK ? 0 : -1;
251+
return ESP_FAIL;
252+
// esp_err_t ret = ESP_FAIL;
253+
// uint16_t reg_htons = LITTLETOBIG(reg);
254+
// uint8_t *reg_u8 = (uint8_t *)&reg_htons;
255+
// uint16_t data_htons = LITTLETOBIG(data);
256+
// uint8_t *data_u8 = (uint8_t *)&data_htons;
257+
// i2c_cmd_handle_t cmd = i2c_cmd_link_create();
258+
// i2c_master_start(cmd);
259+
// i2c_master_write_byte(cmd, ( slv_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
260+
// i2c_master_write_byte(cmd, reg_u8[0], ACK_CHECK_EN);
261+
// i2c_master_write_byte(cmd, reg_u8[1], ACK_CHECK_EN);
262+
// i2c_master_write_byte(cmd, data_u8[0], ACK_CHECK_EN);
263+
// i2c_master_write_byte(cmd, data_u8[1], ACK_CHECK_EN);
264+
// i2c_master_stop(cmd);
265+
// ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
266+
// i2c_cmd_link_delete(cmd);
267+
// if(ret != ESP_OK) {
268+
// ESP_LOGE(TAG, "W [%04x]=%04x fail\n", reg, data);
269+
// }
270+
// return ret == ESP_OK ? 0 : -1;
260271
}

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