WIP: MAINT: Modulate dispatched x86 CPU features #28896
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Restructure CPU feature dispatching to align with Highway requirements by: - Raising baseline to SSE41 (appropriate for 2025) - Removing AMD legacy features (XOP, FMA4) - Dropping Xeon Phi support (AVX512_KNL, AVX512_KNM) - Creating new feature groups: * SSE4_COMMON: combines POPCNT, SSE42, AES, PCLMULQDQ * AVX2_COMMON: combines AVX2, BMI, BMI2, FMA3 - Replacing individual feature dispatching with hierarchical groups - Removing AVX512_CLX/CNL (features available via AVX512_ICL)
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Background
As we move to Highway, our CPU feature dispatching system needs to be updated. The current hybrid approach (feature & group-based) is no longer suitable, and certain features like AMD legacy extensions and Xeon Phi support need to be removed. Additionally, since we're in 2025, it's reasonable to raise our baseline requirement to SSE4.1.
Changes
This PR implements the following modifications to the CPU feature dispatching system:
Removed individual feature dispatching for:
SSE,SSE2,SSSE3) - still accessible viaSSE41and higherXOP,FMA4)POPCNTandSSE42- now available through newSSE4_COMMONgroupAVX2,FMA3,F16C,AVX) - now available through newAVX2_COMMONgroupAVX512FandAVX512CD- accessible viaAVX512_SKXand higherDropped support for:
AVX512_KNL,AVX512_KNM) - discontinued by IntelAVX512_CLXandAVX512_CNL- not supported by Highway (features available viaAVX512_ICL)New Feature Group Hierarchy
SSE41SSESSE2SSE3SSSE3SSE4_COMMON(new)SSE41POPCNTSSE42AESPCLMULQDQAVX2_COMMON(new)SSE4_COMMONAVX2BMIBMI2FMA3AVX512_SKXAVX2_COMMONAVX512FAVX512CDAVX512VLAVX512BWAVX512DQAVX512_ICLAVX512_SKXAVX512VBMIAVX512VBMI2AVX512VNNIAVX512BITALGAVX512VPOPCNTDQVAESGFNIVPCLMULQDQAVX512_SPRAVX512_ICLAVX512FP16