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chenhui zhaoScott Wood
chenhui zhao
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Scott Wood
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powerpc/mpc85xx: refactor the PM operations
Freescale CoreNet-based and Non-CoreNet-based platforms require different PM operations. This patch extracted existing PM operations on Non-CoreNet-based platforms to a new file which can accommodate both platforms. In this way, PM operation codes are clearer structurally. Signed-off-by: Chenhui Zhao <[email protected]> Signed-off-by: Tang Yuantian <[email protected]> Signed-off-by: Scott Wood <[email protected]>
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‎arch/powerpc/platforms/85xx/Makefile‎

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Original file line numberDiff line numberDiff line change
@@ -2,6 +2,7 @@
22
# Makefile for the PowerPC 85xx linux kernel.
33
#
44
obj-$(CONFIG_SMP) += smp.o
5+
obj-$(CONFIG_FSL_PMC) += mpc85xx_pm_ops.o
56

67
obj-y += common.o
78

‎arch/powerpc/platforms/85xx/mpc85xx_pm_ops.c‎

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,106 @@
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/*
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* MPC85xx PM operators
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*
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* Copyright 2015 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
8+
* Free Software Foundation; either version 2 of the License, or (at your
9+
* option) any later version.
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*/
11+
12+
#define pr_fmt(fmt) "%s: " fmt, __func__
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14+
#include <linux/kernel.h>
15+
#include <linux/of.h>
16+
#include <linux/of_address.h>
17+
#include <linux/fsl/guts.h>
18+
19+
#include <asm/io.h>
20+
#include <asm/fsl_pm.h>
21+
22+
static struct ccsr_guts __iomem *guts;
23+
24+
static void mpc85xx_irq_mask(int cpu)
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{
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27+
}
28+
29+
static void mpc85xx_irq_unmask(int cpu)
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{
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32+
}
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34+
static void mpc85xx_cpu_die(int cpu)
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{
36+
u32 tmp;
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38+
tmp = (mfspr(SPRN_HID0) & ~(HID0_DOZE|HID0_SLEEP)) | HID0_NAP;
39+
mtspr(SPRN_HID0, tmp);
40+
41+
/* Enter NAP mode. */
42+
tmp = mfmsr();
43+
tmp |= MSR_WE;
44+
asm volatile(
45+
"msync\n"
46+
"mtmsr %0\n"
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"isync\n"
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:
49+
: "r" (tmp));
50+
}
51+
52+
static void mpc85xx_cpu_up_prepare(int cpu)
53+
{
54+
55+
}
56+
57+
static void mpc85xx_freeze_time_base(bool freeze)
58+
{
59+
uint32_t mask;
60+
61+
mask = CCSR_GUTS_DEVDISR_TB0 | CCSR_GUTS_DEVDISR_TB1;
62+
if (freeze)
63+
setbits32(&guts->devdisr, mask);
64+
else
65+
clrbits32(&guts->devdisr, mask);
66+
67+
in_be32(&guts->devdisr);
68+
}
69+
70+
static const struct of_device_id mpc85xx_smp_guts_ids[] = {
71+
{ .compatible = "fsl,mpc8572-guts", },
72+
{ .compatible = "fsl,p1020-guts", },
73+
{ .compatible = "fsl,p1021-guts", },
74+
{ .compatible = "fsl,p1022-guts", },
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{ .compatible = "fsl,p1023-guts", },
76+
{ .compatible = "fsl,p2020-guts", },
77+
{ .compatible = "fsl,bsc9132-guts", },
78+
{},
79+
};
80+
81+
static const struct fsl_pm_ops mpc85xx_pm_ops = {
82+
.freeze_time_base = mpc85xx_freeze_time_base,
83+
.irq_mask = mpc85xx_irq_mask,
84+
.irq_unmask = mpc85xx_irq_unmask,
85+
.cpu_die = mpc85xx_cpu_die,
86+
.cpu_up_prepare = mpc85xx_cpu_up_prepare,
87+
};
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89+
int __init mpc85xx_setup_pmc(void)
90+
{
91+
struct device_node *np;
92+
93+
np = of_find_matching_node(NULL, mpc85xx_smp_guts_ids);
94+
if (np) {
95+
guts = of_iomap(np, 0);
96+
of_node_put(np);
97+
if (!guts) {
98+
pr_err("Could not map guts node address\n");
99+
return -ENOMEM;
100+
}
101+
}
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103+
qoriq_pm_ops = &mpc85xx_pm_ops;
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return 0;
106+
}

‎arch/powerpc/platforms/85xx/smp.c‎

Lines changed: 19 additions & 54 deletions
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
* Author: Andy Fleming <[email protected]>
33
* Kumar Gala <[email protected]>
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*
5-
* Copyright 2006-2008, 2011-2012 Freescale Semiconductor Inc.
5+
* Copyright 2006-2008, 2011-2012, 2015 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
88
* under the terms of the GNU General Public License as published by the
@@ -15,7 +15,6 @@
1515
#include <linux/init.h>
1616
#include <linux/delay.h>
1717
#include <linux/of.h>
18-
#include <linux/of_address.h>
1918
#include <linux/kexec.h>
2019
#include <linux/highmem.h>
2120
#include <linux/cpu.h>
@@ -29,6 +28,7 @@
2928
#include <asm/dbell.h>
3029
#include <asm/code-patching.h>
3130
#include <asm/cputhreads.h>
31+
#include <asm/fsl_pm.h>
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3333
#include <sysdev/fsl_soc.h>
3434
#include <sysdev/mpic.h>
@@ -43,24 +43,11 @@ struct epapr_spin_table {
4343
u32 pir;
4444
};
4545

46-
static struct ccsr_guts __iomem *guts;
46+
#ifdef CONFIG_HOTPLUG_CPU
4747
static u64 timebase;
4848
static int tb_req;
4949
static int tb_valid;
5050

51-
static void mpc85xx_timebase_freeze(int freeze)
52-
{
53-
uint32_t mask;
54-
55-
mask = CCSR_GUTS_DEVDISR_TB0 | CCSR_GUTS_DEVDISR_TB1;
56-
if (freeze)
57-
setbits32(&guts->devdisr, mask);
58-
else
59-
clrbits32(&guts->devdisr, mask);
60-
61-
in_be32(&guts->devdisr);
62-
}
63-
6451
static void mpc85xx_give_timebase(void)
6552
{
6653
unsigned long flags;
@@ -71,7 +58,7 @@ static void mpc85xx_give_timebase(void)
7158
barrier();
7259
tb_req = 0;
7360

74-
mpc85xx_timebase_freeze(1);
61+
qoriq_pm_ops->freeze_time_base(true);
7562
#ifdef CONFIG_PPC64
7663
/*
7764
* e5500/e6500 have a workaround for erratum A-006958 in place
@@ -104,7 +91,7 @@ static void mpc85xx_give_timebase(void)
10491
while (tb_valid)
10592
barrier();
10693

107-
mpc85xx_timebase_freeze(0);
94+
qoriq_pm_ops->freeze_time_base(false);
10895

10996
local_irq_restore(flags);
11097
}
@@ -126,31 +113,25 @@ static void mpc85xx_take_timebase(void)
126113
local_irq_restore(flags);
127114
}
128115

129-
#ifdef CONFIG_HOTPLUG_CPU
130116
static void smp_85xx_mach_cpu_die(void)
131117
{
132118
unsigned int cpu = smp_processor_id();
133-
u32 tmp;
134119

135120
local_irq_disable();
121+
hard_irq_disable();
122+
/* mask all irqs to prevent cpu wakeup */
123+
qoriq_pm_ops->irq_mask(cpu);
124+
136125
idle_task_exit();
137-
generic_set_cpu_dead(cpu);
138-
mb();
139126

140127
mtspr(SPRN_TCR, 0);
128+
mtspr(SPRN_TSR, mfspr(SPRN_TSR));
141129

142-
cur_cpu_spec->cpu_down_flush();
130+
generic_set_cpu_dead(cpu);
143131

144-
tmp = (mfspr(SPRN_HID0) & ~(HID0_DOZE|HID0_SLEEP)) | HID0_NAP;
145-
mtspr(SPRN_HID0, tmp);
146-
isync();
132+
cur_cpu_spec->cpu_down_flush();
147133

148-
/* Enter NAP mode. */
149-
tmp = mfmsr();
150-
tmp |= MSR_WE;
151-
mb();
152-
mtmsr(tmp);
153-
isync();
134+
qoriq_pm_ops->cpu_die(cpu);
154135

155136
while (1)
156137
;
@@ -468,16 +449,6 @@ static void smp_85xx_setup_cpu(int cpu_nr)
468449
smp_85xx_basic_setup(cpu_nr);
469450
}
470451

471-
static const struct of_device_id mpc85xx_smp_guts_ids[] = {
472-
{ .compatible = "fsl,mpc8572-guts", },
473-
{ .compatible = "fsl,p1020-guts", },
474-
{ .compatible = "fsl,p1021-guts", },
475-
{ .compatible = "fsl,p1022-guts", },
476-
{ .compatible = "fsl,p1023-guts", },
477-
{ .compatible = "fsl,p2020-guts", },
478-
{},
479-
};
480-
481452
void __init mpc85xx_smp_init(void)
482453
{
483454
struct device_node *np;
@@ -501,22 +472,16 @@ void __init mpc85xx_smp_init(void)
501472
smp_85xx_ops.probe = NULL;
502473
}
503474

504-
np = of_find_matching_node(NULL, mpc85xx_smp_guts_ids);
505-
if (np) {
506-
guts = of_iomap(np, 0);
507-
of_node_put(np);
508-
if (!guts) {
509-
pr_err("%s: Could not map guts node address\n",
510-
__func__);
511-
return;
512-
}
475+
#ifdef CONFIG_HOTPLUG_CPU
476+
#ifdef CONFIG_FSL_PMC
477+
mpc85xx_setup_pmc();
478+
#endif
479+
if (qoriq_pm_ops) {
513480
smp_85xx_ops.give_timebase = mpc85xx_give_timebase;
514481
smp_85xx_ops.take_timebase = mpc85xx_take_timebase;
515-
#ifdef CONFIG_HOTPLUG_CPU
516482
ppc_md.cpu_die = smp_85xx_mach_cpu_die;
517-
#endif
518483
}
519-
484+
#endif
520485
smp_ops = &smp_85xx_ops;
521486

522487
#ifdef CONFIG_KEXEC

‎arch/powerpc/platforms/85xx/smp.h‎

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Original file line numberDiff line numberDiff line change
@@ -5,6 +5,7 @@
55

66
#ifdef CONFIG_SMP
77
void __init mpc85xx_smp_init(void);
8+
int __init mpc85xx_setup_pmc(void);
89
#else
910
static inline void mpc85xx_smp_init(void)
1011
{

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