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elkablodavem330
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net: dsa: mv88e6xxx: Add fix for erratum 5.2 of 88E6393X family
Add fix for erratum 5.2 of the 88E6393X (Amethyst) family: for 10gbase-r mode, some undocumented registers need to be written some special values. Fixes: de776d0 ("net: dsa: mv88e6xxx: add support for mv88e6393x family") Signed-off-by: Marek Behún <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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drivers/net/dsa/mv88e6xxx/serdes.c

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@@ -1375,6 +1375,50 @@ static int mv88e6393x_serdes_erratum_4_8(struct mv88e6xxx_chip *chip, int lane)
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MV88E6393X_ERRATA_4_8_REG, reg);
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}
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static int mv88e6393x_serdes_erratum_5_2(struct mv88e6xxx_chip *chip, int lane,
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u8 cmode)
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{
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static const struct {
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u16 dev, reg, val, mask;
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} fixes[] = {
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{ MDIO_MMD_VEND1, 0x8093, 0xcb5a, 0xffff },
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{ MDIO_MMD_VEND1, 0x8171, 0x7088, 0xffff },
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{ MDIO_MMD_VEND1, 0x80c9, 0x311a, 0xffff },
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{ MDIO_MMD_VEND1, 0x80a2, 0x8000, 0xff7f },
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{ MDIO_MMD_VEND1, 0x80a9, 0x0000, 0xfff0 },
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{ MDIO_MMD_VEND1, 0x80a3, 0x0000, 0xf8ff },
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{ MDIO_MMD_PHYXS, MV88E6393X_SERDES_POC,
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MV88E6393X_SERDES_POC_RESET, MV88E6393X_SERDES_POC_RESET },
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};
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int err, i;
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u16 reg;
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/* mv88e6393x family errata 5.2:
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* For optimal signal integrity the following sequence should be applied
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* to SERDES operating in 10G mode. These registers only apply to 10G
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* operation and have no effect on other speeds.
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*/
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if (cmode != MV88E6393X_PORT_STS_CMODE_10GBASER)
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return 0;
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for (i = 0; i < ARRAY_SIZE(fixes); ++i) {
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err = mv88e6390_serdes_read(chip, lane, fixes[i].dev,
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fixes[i].reg, &reg);
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if (err)
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return err;
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reg &= ~fixes[i].mask;
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reg |= fixes[i].val;
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err = mv88e6390_serdes_write(chip, lane, fixes[i].dev,
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fixes[i].reg, reg);
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if (err)
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return err;
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}
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return 0;
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}
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int mv88e6393x_serdes_power(struct mv88e6xxx_chip *chip, int port, int lane,
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bool on)
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{
@@ -1389,6 +1433,10 @@ int mv88e6393x_serdes_power(struct mv88e6xxx_chip *chip, int port, int lane,
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if (err)
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return err;
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err = mv88e6393x_serdes_erratum_5_2(chip, lane, cmode);
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if (err)
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return err;
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err = mv88e6393x_serdes_power_lane(chip, lane, true);
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if (err)
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return err;

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