NYCU 2025 Spring Computer Architecture
Lecturer: 劉志尉 Chih-Wei Liu
- Intro
- Fundamentals of Quantitative Design and Analysis
- Instruction Set Principles
- Memory Hierachy Design
- Pipelining
- Compiler Techniques for ILP & Branch Prediction
- Dynamic Scheduling for ILP
- Limits on ILP & Multithreading
- Data Level Parallelism in Vector, SIMD, and GPU Architectures
- Thread Level Parallelism
- HW1
- HW2
- HW3
CUDA Accelerated Image Processing - Image Stitching
- 2018 mid