From 52a1f6e7f112d0bb689949e32ab1e8ca021d067a Mon Sep 17 00:00:00 2001
From: Frederic Pillon <frederic.pillon@st.com>
Date: Mon, 11 Mar 2024 15:28:39 +0100
Subject: [PATCH] fix(HardwareTimer): handle FDCANx irq when shared with TIMx
 irq

Application have to declare the phfdcan1 and phfdcan2.

Example:
FDCAN_HandleTypeDef myhfdcan1;
FDCAN_HandleTypeDef *phfdcan1 = &myhfdcan1;
#if defined(FDCAN2_BASE)
FDCAN_HandleTypeDef *phfdcan2 = NULL;
#endif

Fixes #2224.

Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
---
 libraries/SrcWrapper/src/HardwareTimer.cpp | 34 ++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/libraries/SrcWrapper/src/HardwareTimer.cpp b/libraries/SrcWrapper/src/HardwareTimer.cpp
index 4ccfd02f47..2aca499a72 100644
--- a/libraries/SrcWrapper/src/HardwareTimer.cpp
+++ b/libraries/SrcWrapper/src/HardwareTimer.cpp
@@ -37,6 +37,18 @@
 /* Private Variables */
 timerObj_t *HardwareTimer_Handle[TIMER_NUM] = {NULL};
 
+#if defined(HAL_FDCAN_MODULE_ENABLED) && defined(STM32G0xx) && defined(FDCAN1_BASE)
+  /* Pointer to a FDCAN_HandleTypeDef structure that contains
+  * the configuration information for the specified FDCAN.
+  * Application have to declare them properly to be able to call
+  * the HAL_FDCAN_IRQHandler().
+  */
+  extern FDCAN_HandleTypeDef *phfdcan1;
+  #if defined(FDCAN2_BASE)
+    extern FDCAN_HandleTypeDef *phfdcan2;
+  #endif
+#endif
+
 /**
   * @brief  HardwareTimer constructor: make uninitialized timer
   *         Before calling any methods, call setup to select and setup
@@ -1761,6 +1773,17 @@ extern "C" {
     if (HardwareTimer_Handle[TIMER16_INDEX]) {
       HAL_TIM_IRQHandler(&HardwareTimer_Handle[TIMER16_INDEX]->handle);
     }
+#if defined(HAL_FDCAN_MODULE_ENABLED) && defined(STM32G0xx) && defined(FDCAN1_BASE)
+    /* FDCAN1_IT0 and FDCAN2_IT0 Interrupt */
+    if ((phfdcan1) && (__HAL_GET_PENDING_IT(HAL_ITLINE_FDCAN1_IT0) != RESET)) {
+      HAL_FDCAN_IRQHandler(phfdcan1);
+    }
+#if defined(FDCAN2_BASE)
+    if ((phfdcan2) && (__HAL_GET_PENDING_IT(HAL_ITLINE_FDCAN2_IT0) != RESET)) {
+      HAL_FDCAN_IRQHandler(phfdcan2);
+    }
+#endif
+#endif
   }
 #endif
 #endif //TIM16_BASE
@@ -1776,6 +1799,17 @@ extern "C" {
     if (HardwareTimer_Handle[TIMER17_INDEX]) {
       HAL_TIM_IRQHandler(&HardwareTimer_Handle[TIMER17_INDEX]->handle);
     }
+#if defined(HAL_FDCAN_MODULE_ENABLED) && defined(STM32G0xx) && defined(FDCAN1_BASE)
+    /* FDCAN1_IT1 and FDCAN2_IT1 Interrupt */
+    if ((phfdcan1) && (__HAL_GET_PENDING_IT(HAL_ITLINE_FDCAN1_IT1) != RESET)) {
+      HAL_FDCAN_IRQHandler(phfdcan1);
+    }
+#if defined(FDCAN2_BASE)
+    if ((phfdcan2) && (__HAL_GET_PENDING_IT(HAL_ITLINE_FDCAN2_IT1) != RESET)) {
+      HAL_FDCAN_IRQHandler(phfdcan2);
+    }
+#endif
+#endif
   }
 #endif //TIM17_BASE