15#ifndef LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCTARGETDESC_H
16#define LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUMCTARGETDESC_H
41 const MCSubtargetInfo &STI,
42 const MCRegisterInfo &
MRI,
43 const MCTargetOptions &
Options);
45std::unique_ptr<MCObjectTargetWriter>
47 bool HasRelocationAddend);
52 unsigned VgprMSBs = 0;
72#define GET_REGINFO_ENUM
73#include "AMDGPUGenRegisterInfo.inc"
75#define GET_INSTRINFO_ENUM
76#define GET_INSTRINFO_MC_HELPER_DECLS
77#include "AMDGPUGenInstrInfo.inc"
79#define GET_SUBTARGETINFO_ENUM
80#include "AMDGPUGenSubtargetInfo.inc"
unsigned const MachineRegisterInfo * MRI
void resetState() override
Clear the internal state. See updateState for more information.
bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size, uint64_t &Target) const override
Given a branch instruction try to get the address the branch targets.
void updateState(const MCInst &Inst, uint64_t Addr) override
Update internal state with Inst at Addr.
AMDGPUMCInstrAnalysis(const MCInstrInfo *Info)
unsigned getVgprMSBs() const
Generic interface to target specific assembler backends.
MCCodeEmitter - Generic instruction encoding interface.
Context object for machine code objects.
Instances of this class represent a single low-level machine instruction.
MCInstrAnalysis(const MCInstrInfo *Info)
Interface to description of machine instruction set.
Base class for classes that define behaviour that is specific to both the target and the object forma...
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Generic base class for all target subtargets.
Target - Wrapper for Target specific information.
This is an optimization pass for GlobalISel generic memory operations.
MCAsmBackend * createAMDGPUAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
std::unique_ptr< MCObjectTargetWriter > createAMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI, bool HasRelocationAddend)
MCRegisterInfo * createGCNMCRegisterInfo(AMDGPUDwarfFlavour DwarfFlavour)
MCCodeEmitter * createAMDGPUMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)