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LLVM
22.0.0git
lib
Target
VE
MCTargetDesc
VEMCTargetDesc.h
Go to the documentation of this file.
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//===-- VEMCTargetDesc.h - VE Target Descriptions ---------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides VE specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_VE_MCTARGETDESC_VEMCTARGETDESC_H
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#define LLVM_LIB_TARGET_VE_MCTARGETDESC_VEMCTARGETDESC_H
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#include "
llvm/Support/DataTypes.h
"
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#include <memory>
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namespace
llvm
{
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class
MCAsmBackend
;
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class
MCCodeEmitter
;
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class
MCContext
;
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class
MCInstrInfo
;
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class
MCObjectTargetWriter
;
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class
MCRegisterInfo
;
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class
MCSubtargetInfo
;
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class
MCTargetOptions
;
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class
Target
;
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MCCodeEmitter
*
createVEMCCodeEmitter
(
const
MCInstrInfo
&MCII,
MCContext
&Ctx);
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MCAsmBackend
*
createVEAsmBackend
(
const
Target
&
T
,
const
MCSubtargetInfo
&STI,
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const
MCRegisterInfo
&
MRI
,
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const
MCTargetOptions
&
Options
);
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std::unique_ptr<MCObjectTargetWriter>
createVEELFObjectWriter
(uint8_t OSABI);
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}
// namespace llvm
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// Defines symbolic names for VE registers. This defines a mapping from
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// register name to register number.
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//
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#define GET_REGINFO_ENUM
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#include "VEGenRegisterInfo.inc"
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// Defines symbolic names for the VE instructions.
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//
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#define GET_INSTRINFO_ENUM
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#define GET_INSTRINFO_MC_HELPER_DECLS
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#include "VEGenInstrInfo.inc"
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#define GET_SUBTARGETINFO_ENUM
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#include "VEGenSubtargetInfo.inc"
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#endif
MRI
unsigned const MachineRegisterInfo * MRI
Definition
AArch64AdvSIMDScalarPass.cpp:103
Options
static LVOptions Options
Definition
LVOptions.cpp:25
T
#define T
Definition
Mips16ISelLowering.cpp:353
llvm::MCAsmBackend
Generic interface to target specific assembler backends.
Definition
MCAsmBackend.h:55
llvm::MCCodeEmitter
MCCodeEmitter - Generic instruction encoding interface.
Definition
MCCodeEmitter.h:23
llvm::MCContext
Context object for machine code objects.
Definition
MCContext.h:83
llvm::MCInstrInfo
Interface to description of machine instruction set.
Definition
MCInstrInfo.h:27
llvm::MCObjectTargetWriter
Base class for classes that define behaviour that is specific to both the target and the object forma...
Definition
MCObjectWriter.h:136
llvm::MCRegisterInfo
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Definition
MCRegisterInfo.h:150
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition
MCSubtargetInfo.h:77
llvm::MCTargetOptions
Definition
MCTargetOptions.h:29
llvm::Target
Target - Wrapper for Target specific information.
Definition
TargetRegistry.h:146
DataTypes.h
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition
AddressRanges.h:18
llvm::createVEAsmBackend
MCAsmBackend * createVEAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
Definition
VEAsmBackend.cpp:186
llvm::createVEMCCodeEmitter
MCCodeEmitter * createVEMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)
Definition
VEMCCodeEmitter.cpp:161
llvm::createVEELFObjectWriter
std::unique_ptr< MCObjectTargetWriter > createVEELFObjectWriter(uint8_t OSABI)
Definition
VEELFObjectWriter.cpp:165
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