74AC11240PWG4 概述
Octal Buffers/Drivers 24-TSSOP -40 to 85 总线驱动器/收发器
74AC11240PWG4 规格参数
是否无铅: | 不含铅 | 是否Rohs认证: | 符合 |
生命周期: | Obsolete | 零件包装代码: | TSSOP |
包装说明: | TSSOP, TSSOP24,.25 | 针数: | 24 |
Reach Compliance Code: | unknown | HTS代码: | 8542.39.00.01 |
风险等级: | 5.6 | 控制类型: | ENABLE LOW |
系列: | AC | JESD-30 代码: | R-PDSO-G24 |
JESD-609代码: | e4 | 长度: | 7.8 mm |
负载电容(CL): | 50 pF | 逻辑集成电路类型: | BUS DRIVER |
最大I(ol): | 0.024 A | 湿度敏感等级: | 1 |
位数: | 4 | 功能数量: | 2 |
端口数量: | 2 | 端子数量: | 24 |
最高工作温度: | 85 °C | 最低工作温度: | -40 °C |
输出特性: | 3-STATE | 输出极性: | INVERTED |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | TSSOP |
封装等效代码: | TSSOP24,.25 | 封装形状: | RECTANGULAR |
封装形式: | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH | 包装方法: | TUBE |
峰值回流温度(摄氏度): | 260 | 电源: | 3.3/5 V |
Prop。Delay @ Nom-Sup: | 8.4 ns | 传播延迟(tpd): | 11.7 ns |
认证状态: | Not Qualified | 座面最大高度: | 1.2 mm |
子类别: | Bus Driver/Transceivers | 最大供电电压 (Vsup): | 5.5 V |
最小供电电压 (Vsup): | 3 V | 标称供电电压 (Vsup): | 5 V |
表面贴装: | YES | 技术: | CMOS |
温度等级: | INDUSTRIAL | 端子面层: | Nickel/Palladium/Gold (Ni/Pd/Au) |
端子形式: | GULL WING | 端子节距: | 0.65 mm |
端子位置: | DUAL | 处于峰值回流温度下的最长时间: | NOT SPECIFIED |
宽度: | 4.4 mm | Base Number Matches: | 1 |
74AC11240PWG4 数据手册
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PDF下载74AC11240
OCTAL BUFFER/LINE DRIVER
WITH 3-STATE OUTPUTS
SCAS448A – MAY 1987 – REVISED APRIL 1996
DB, DW, OR NT PACKAGE
(TOP VIEW)
Flow-Through Architecture Optimizes
PCB Layout
Center-Pin V
Minimize High-Speed Switching Noise
and GND Configurations
CC
1
24
23
22
21
20
19
18
17
16
15
14
13
1Y1
1Y2
1Y3
1OE
1A1
1A2
1A3
1A4
2
EPIC (Enhanced-Performance Implanted
CMOS) 1- m Process
3
4
1Y4
500-mA Typical Latch-Up Immunity at
125°C
5
GND
GND
GND
GND
2Y1
2Y2
2Y3
2Y4
6
V
V
CC
CC
7
Package Options Include Plastic
Small-Outline (DW) and Shrink
Small-Outline (DB) Packages, and Standard
Plastic 300-mil DIPs (NT)
8
2A1
2A2
2A3
2A4
2OE
9
10
11
12
description
Thisoctalbuffer/linedriverisdesignedspecifically
to improve both the performance and density of
3-state memory address drivers, clock drivers,
and bus-oriented receivers and transmitters. This
device
provides
inverting
outputs
and
symmetrical active-low output-enable (OE)
inputs. This device features high fan-out and
improved fan-in.
The 74AC11240 is organized as two 4-bit buffers/line drivers with separate OE inputs. When OE is low, the
device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.
The 74AC11240 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
Y
OE
L
A
H
L
L
L
H
Z
H
X
†
logic symbol
24
13
1OE
EN
2OE
EN
23
1A1
22
1
2
3
4
17
16
15
14
9
10
11
12
1
1
1Y1
2Y1
2Y2
2Y3
2Y4
2A1
2A2
2A3
2A4
1Y2
1Y3
1Y4
1A2
21
1A3
20
1A4
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74AC11240
OCTAL BUFFER/LINE DRIVER
WITH 3-STATE OUTPUTS
SCAS448A – MAY 1987 – REVISED APRIL 1996
logic diagram (positive logic)
13
24
1OE
2OE
2A1
2A2
2A3
2A4
23
1
2
3
17
16
15
9
10
11
1Y1
1Y2
1Y3
1Y4
2Y1
1A1
22
1A2
2Y2
2Y3
2Y4
21
1A3
20
4
14
12
1A4
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
+ 0.5 V
I
CC
CC
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
O
Input clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
I
CC
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through V
Maximum power dissipation at T = 55°C (in still air) (see Note 2): DB package . . . . . . . . . . . . . . . . . . 0.65 W
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA
A
DW package . . . . . . . . . . . . . . . . . . 1.7 W
NT package . . . . . . . . . . . . . . . . . . . 1.3 W
Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150 C and a board trace length of 750 mils,
except for the NT package, which has a trace length of zero.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74AC11240
OCTAL BUFFER/LINE DRIVER
WITH 3-STATE OUTPUTS
SCAS448A – MAY 1987 – REVISED APRIL 1996
recommended operating conditions
MIN NOM
MAX
UNIT
V
Supply voltage
3
2.1
5
5.5
V
CC
IH
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 3 V
V
High-level input voltage
= 4.5 V
= 5.5 V
= 3 V
3.15
3.85
V
V
0.9
1.35
1.65
V
IL
Low-level input voltage
= 4.5 V
= 5.5 V
V
V
Input voltage
0
0
V
V
V
I
CC
Output voltage
V
CC
–4
O
V
V
V
V
V
V
= 3 V
CC
CC
CC
CC
CC
CC
I
High-level output current
Low-level output current
= 4.5 V
= 5.5 V
= 3 V
–24
–24
12
24
24
5
mA
mA
OH
OL
I
= 4.5 V
= 5.5 V
0
0
OE
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
ns/V
Data
10
85
T
A
–40
°C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
A
= 25°C
PARAMETER
TEST CONDITIONS
V
MIN
MAX
UNIT
CC
MIN
2.9
TYP
MAX
3 V
2.9
4.4
I
= –50
A
4.5 V
5.5 V
3 V
4.4
OH
5.4
5.4
V
OH
I
I
I
= –4 mA
= –24 mA
= –75 mA
2.58
3.94
4.94
2.48
3.8
V
OH
OH
OH
4.5 V
5.5 V
5.5 V
3 V
4.8
3.85
0.1
0.1
0.1
0.1
I
= 50
A
4.5 V
5.5 V
3 V
OL
0.1
0.1
V
OL
I
I
I
= 12 mA
= 24 mA
= 75 mA
0.36
0.36
0.36
0.44
0.44
0.44
1.65
±5
V
OL
OL
OL
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5 V
I
I
I
V
= V or GND
CC
±0.5
±0.1
8
A
A
OZ
O
V = V
or GND
or GND,
or GND
±1
I
I
CC
CC
CC
V = V
I = 0
O
80
A
CC
I
C
C
V = V
4
pF
pF
i
I
V
= V or GND
CC
5 V
10
O
O
†
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74AC11240
OCTAL BUFFER/LINE DRIVER
WITH 3-STATE OUTPUTS
SCAS448A – MAY 1987 – REVISED APRIL 1996
switching characteristics over recommended operating free-air temperature range,
V
= 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
CC
T
A
= 25°C
TYP
7.6
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
MAX
UNIT
ns
MIN
1.5
1.5
1.5
1.5
1.5
1.5
MAX
10.5
8.6
t
t
1.5
1.5
1.5
1.5
1.5
1.5
11.7
9.5
12.7
12
PLH
PHL
PZH
A
Y
Y
Y
6.3
t
8.2
11.6
10.8
7.5
ns
OE
OE
t
7.6
PZL
t
5.5
7.8
9.8
PHZ
ns
t
6.7
9.4
PLZ
switching characteristics over recommended operating free-air temperature range,
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
V
CC
T
A
= 25°C
TYP
5.4
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
MIN
MAX
UNIT
ns
MIN
1.5
1.5
1.5
1.5
1.5
1.5
MAX
7.5
6.6
8.2
7.7
6.3
7.3
t
t
1.5
1.5
1.5
1.5
1.5
1.5
8.4
7.2
9.2
8.7
6.6
7.7
PLH
PHL
PZH
A
Y
Y
Y
4.6
t
5.7
ns
OE
OE
t
5.3
PZL
t
4.7
PHZ
ns
t
5.2
PLZ
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
= 50 pF, f = 1 MHz
L
TYP
39
UNIT
Outputs enabled
Outputs disabled
C
Power dissipation capacitance per buffer
C
pF
pd
12
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
74AC11240
OCTAL BUFFER/LINE DRIVER
WITH 3-STATE OUTPUTS
SCAS448A – MAY 1987 – REVISED APRIL 1996
PARAMETER MEASUREMENT INFORMATION
2 × V
CC
Open
GND
TEST
S1
S1
t
/t
Open
500 Ω
PLH PHL
From Output
Under Test
t
/t
2 × V
CC
GND
PLZ PZL
t
/t
PHZ PZH
C
= 50 pF
L
500 Ω
(see Note A)
LOAD CIRCUIT
Output
V
CC
Control
(low-level
enabling)
50% V
50% V
CC
CC
0 V
t
PZL
V
t
PLZ
CC
Output
Waveform 1
V
CC
Input
50% V
50% V
CC
50% V
CC
CC
0 V
20% V
80% V
S1 at 2 × V
(see Note B)
CC
CC
V
V
OL
t
PHL
t
PHZ
t
PLH
t
PZH
Output
Waveform 2
S1 at GND
V
OH
OH
0 V
CC
50% V
50% V
Output
CC
CC
V
50% V
CC
OL
(see Note B)
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
NOTES: A.
C
L includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 3 ns, t = 3 ns.
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
28-May-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
SSOP
SSOP
Drawing
74AC11240DBLE
74AC11240DBR
OBSOLETE
ACTIVE
DB
24
24
TBD
Call TI
Call TI
DB
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
74AC11240DBRE4
74AC11240DBRG4
74AC11240DW
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SSOP
SSOP
SOIC
DB
DB
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
DW
DW
DW
DW
DW
DW
NT
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
74AC11240DWE4
74AC11240DWG4
74AC11240DWR
74AC11240DWRE4
74AC11240DWRG4
74AC11240NT
SOIC
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PDIP
15
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
74AC11240NTE4
74AC11240PW
PDIP
NT
15
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
PW
PW
PW
PW
PW
PW
60 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
74AC11240PWE4
74AC11240PWG4
74AC11240PWR
74AC11240PWRE4
74AC11240PWRG4
60 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
60 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
28-May-2007
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
74AC11240DBR
74AC11240DWR
74AC11240PWR
SSOP
SOIC
DB
DW
PW
24
24
24
2000
2000
2000
330.0
330.0
330.0
16.4
24.4
16.4
8.2
10.75
6.95
8.8
15.7
8.3
2.5
2.7
1.6
12.0
12.0
8.0
16.0
24.0
16.0
Q1
Q1
Q1
TSSOP
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
74AC11240DBR
74AC11240DWR
74AC11240PWR
SSOP
SOIC
DB
DW
PW
24
24
24
2000
2000
2000
346.0
346.0
346.0
346.0
346.0
346.0
33.0
41.0
33.0
TSSOP
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
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74AC11240PWG4 替代型号
型号 | 制造商 | 描述 | 替代类型 | 文档 |
74AC11240PWE4 | TI | Octal Buffers/Drivers 24-TSSOP -40 to 85 | 类似代替 |
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74AC11240PWG4 相关器件
型号 | 制造商 | 描述 | 价格 | 文档 |
74AC11240PWR | TI | AC SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO24, GREEN, PLASTIC, TSSOP-24 | 获取价格 |
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74AC11240PWRE4 | TI | AC SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO24, GREEN, PLASTIC, TSSOP-24 | 获取价格 |
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74AC11240PWRG4 | TI | 类型:缓冲器,反向;功能单元数:2;位数(bit):4;元器件封装:24-TSSOP; | 获取价格 |
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74AC11241 | TI | OCTAL BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS | 获取价格 |
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74AC11241D | PHILIPS | Bus Driver, 2-Func, 4-Bit, True Output, CMOS, PDSO24 | 获取价格 |
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74AC11241D-T | YAGEO | Bus Driver, AC Series, 2-Func, 4-Bit, True Output, CMOS, PDSO24 | 获取价格 |
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74AC11241D-T | PHILIPS | Bus Driver, 2-Func, 4-Bit, True Output, CMOS, PDSO24 | 获取价格 |
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74AC11241DB | TI | AC SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO24 | 获取价格 |
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74AC11241DBLE | ETC | Dual 4-Bit Non-Inverting Buffer/Driver | 获取价格 |
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74AC11241DBR | TI | AC SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO24, PLASTIC, SO-24 | 获取价格 |
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