概述
规格参数
数据手册
替代型号SN74ALS563BNSR 概述
具有三态输出的八路 D 类透明锁存器 | NS | 20 | 0 to 70 锁存器 总线驱动器/收发器
SN74ALS563BNSR 规格参数
| 是否无铅： | 不含铅 | 是否Rohs认证： | 符合 |
| 生命周期： | Active | 零件包装代码： | SOIC |
| 包装说明： | SOP, SOP20,.3 | 针数： | 20 |
| Reach Compliance Code： | compliant | HTS代码： | 8542.39.00.01 |
| 风险等级： | 5.49 | 计数方向： | UNIDIRECTIONAL |
| 系列： | ALS | JESD-30 代码： | R-PDSO-G20 |
| JESD-609代码： | e4 | 长度： | 12.6 mm |
| 负载电容（CL）： | 50 pF | 逻辑集成电路类型： | BUS DRIVER |
| 最大I（ol）： | 0.024 A | 湿度敏感等级： | 1 |
| 位数： | 8 | 功能数量： | 1 |
| 端口数量： | 2 | 端子数量： | 20 |
| 最高工作温度： | 70 °C | 最低工作温度： | |
| 输出特性： | 3-STATE | 输出极性： | INVERTED |
| 封装主体材料： | PLASTIC/EPOXY | 封装代码： | SOP |
| 封装等效代码： | SOP20,.3 | 封装形状： | RECTANGULAR |
| 封装形式： | SMALL OUTLINE | 包装方法： | TR |
| 峰值回流温度（摄氏度）： | 260 | 电源： | 5 V |
| 最大电源电流（ICC）： | 29 mA | Prop。Delay @ Nom-Sup： | 18 ns |
| 传播延迟（tpd）： | 22 ns | 认证状态： | Not Qualified |
| 座面最大高度： | 2 mm | 子类别： | FF/Latches |
| 最大供电电压 (Vsup)： | 5.5 V | 最小供电电压 (Vsup)： | 4.5 V |
| 标称供电电压 (Vsup)： | 5 V | 表面贴装： | YES |
| 技术： | TTL | 温度等级： | COMMERCIAL |
| 端子面层： | Nickel/Palladium/Gold (Ni/Pd/Au) | 端子形式： | GULL WING |
| 端子节距： | 1.27 mm | 端子位置： | DUAL |
| 处于峰值回流温度下的最长时间： | NOT SPECIFIED | 翻译： | N/A |
| 宽度： | 5.3 mm | Base Number Matches： | 1 |
SN74ALS563BNSR 数据手册
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PDF下载SN54ALS563A, SN74ALS563B
OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SDAS163 – D2661, DECEMBER 1982 – REVISED JANUARY 1989
SN54ALS563A . . . J PACKAGE
SN74ALS563B . . . DW OR N PACKAGE
• 3-State Buffer-Type Outputs Drive Bus-Lines
Directly
(TOP VIEW)
• Bus Structured Pinout
• Package Options include Plastic Small Outline
Package, Ceramic Chip Carriers and Standard
Plastic and Ceramic DIPs
OC
1D
2D
3D
4D
5D
6D
7D
8D
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
C
• Dependable Texas Instruments Quality and
Reliability
description
These 8-bit latches feature three-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
GND
SN54ALS563A . . . FK PACKAGE
(TOP VIEW)
The eight latches are transparent D-type latches.
While the enable (C) is high the Q outputs will
follow the complements of data (D) inputs. When
the enable is taken low the output will be latched
at the inverses of the levels that were set up at the
D inputs.
3
2
1
20 19
18
2Q
3Q
4Q
5Q
6Q
3D
4D
5D
6D
7D
4
5
6
7
8
17
16
15
14
A buffered output-control input can be used to
place the eight outputs in either a normal logic
9 10 11 12 13
state (high or low logic levels) or
a
high-impedance state. In the high-impedance
state the outputs neither load nor drive the bus
lines significantly. The high-impedance state and
increased high-logic level provide the capability to
drive the bus lines in a bus-organized system
without need for interface or pull-up components.
FUNCTION TABLE
(each latch)
INPUTS
OUTPUT
Q
The output control (OC) does not affect the
internal operation of the latches. Old data can be
retained or new data can be entered while the
outputs are in the high-impedance state.
ENABLE
C
D
OC
L
H
H
L
H
L
L
H
X
X
H
L
Q
0
The SN54ALS563A is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74ALS563B is characterized for
operation from 0°C to 70°C.
H
X
Z
Copyright 1989, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS563A, SN74ALS563B
OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SDAS163 – D2661, DECEMBER 1982 – REVISED JANUARY 1989
†
logic symbol
logic diagram (positive logic)
1
1
OC
C
EN
C1
OC
C
11
11
2
3
4
5
6
7
8
9
19
18
17
16
15
14
13
12
19
18
17
16
15
14
13
12
C1
D1
1D
2D
3D
4D
5D
6D
7D
8D
1D
1Q
2Q
2
3
4
5
6
7
8
9
1Q
2Q
3Q
4Q
5Q
1D
3Q
4Q
5Q
C1
D1
2D
3D
4D
5D
6D
7D
8D
C1
D1
6Q
7Q
8Q
C1
D1
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Pin numbers shown are for DW, J, and N packages.
C1
D1
C1
D1
6Q
7Q
8Q
C1
D1
C1
D1
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range: SN54ALS563A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
SN74ALS563B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
recommended operating conditions
SN54ALS563A
MIN NOM MAX
SN74ALS563B
MIN NOM MAX
UNIT
V
V
V
Supply Voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Pulse duration, C high
Setup time, data before C↓
Hold time, data after C↓
Operating free-air temperature
IH
0.7
–1
12
0.8
–2.6
24
V
IL
I
I
t
t
t
mA
mA
ns
ns
ns
°C
OH
OL
w
15
10
15
10
10
0
su
h
10
T
A
–55
125
70
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS563A, SN74ALS563B
OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SDAS163 – D2661, DECEMBER 1982 – REVISED JANUARY 1989
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54ALS563A
SN74ALS563B
PARAMETER
TEST CONDITIONS
I = –18 mA
UNIT
†
TYP
†
TYP
MIN
MAX
MIN
MAX
V
IK
V
V
V
V
V
V
V
V
V
V
V
V
= 4.5 V,
= 4.5 V to 5.5 V,
= 4.5 V,
= 4.5 V,
= 4.5 V,
= 4.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
–1.2
–1.2
V
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
I
I
I
I
I
I
= –0.4 mA
= –1 mA
= –2.6 mA
= 12 mA
= 24 mA
= 2.7 V
V
CC
–2
V –2
CC
OH
OL
OH
OL
OL
V
OH
2.4
3.3
V
2.4
3.2
0.25
0.35
0.25
0.4
0.4
0.5
V
OL
V
I
I
I
I
I
I
V
20
–20
0.1
20
µA
µA
OZH
OZL
I
O
O
V
= 0.4 V
–20
0.1
V = 7 V
I
mA
µA
V = 2.7 V
I
20
20
IH
V = 0.4 V
I
– 0.1
–112
17
– 0.1
–112
17
mA
mA
IL
‡
V
O
= 2.25 V
–30
–30
O
Outputs high
Outputs low
10
16
17
10
16
17
I
V
CC
= 5.5 V
26
26
mA
CC
Outputs disabled
29
29
†
‡
All typical Values are at V
CC
= 5 V, T = 25°C.
A
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
OS.
switching characteristics (see Note 1)
V
C
= 5 V,
= 50pF,
V
= 4.5 V to 5.5 V,
C = 50pF,
L
CC
L
CC
R1 = 500 Ω,
R2 = 500 Ω,
T
A
R1 = 500 Ω,
R2 = 500 Ω,
§
T = MIN to MAX
A
FROM
PARAMETER
TO
(OUTPUT)
UNIT
(INPUT)
= 25°C
’ALS563
SN54ALS563A SN74ALS563B
TYP
10
8
MIN
3
MAX
21
MIN
3
MAX
18
t
t
t
t
PLH
PHL
PLH
PHL
PZH
D
C
Q
Q
Q
Q
ns
ns
ns
ns
3
15
3
14
8
8
29
6
22
14
8
8
22
6
21
t
4
21
3
18
OC
OC
t
10
5
4
21
4
18
PZL
PHZ
t
2
12
1
10
t
7
3
18
1
15
PLZ
§
For conditions shown MIN or MAX, use the appropriate value specified under recommended operating conditions.
NOTE 1: Load circuit and voltage waveforms are shown in Section 1 of the ALS/AS Logic Data Book, 1986.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
SN74ALS563BNSR CAD模型
原理图符号
PCB 封装图
SN74ALS563BNSR 替代型号
| 型号 | 制造商 | 描述 | 替代类型 | 文档 |
| SN74ALS563BN3 | TI | Octal D-Type Transparent Latches With 3-State Outputs 20-PDIP 0 to 70 | 完全替代 |
|
| SN74ALS563BNSRE4 | TI | ALS SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO20, GREEN, PLASTIC, SOP-20 | 完全替代 |
|
| SN74ALS563BNSRG4 | TI | 具有三态输出的八路 D 类透明锁存器 | NS | 20 | 0 to 70 | 完全替代 |
|
SN74ALS563BNSR 相关器件
| 型号 | 制造商 | 描述 | 价格 | 文档 |
| SN74ALS563BNSRE4 | TI | ALS SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO20, GREEN, PLASTIC, SOP-20 | 获取价格 |
|
| SN74ALS563BNSRG4 | TI | 具有三态输出的八路 D 类透明锁存器 | NS | 20 | 0 to 70 | 获取价格 |
|
| SN74ALS563FN3 | TI | IC IC,LATCH,SINGLE,8-BIT,ALS-TTL,LDCC,20PIN,PLASTIC, FF/Latch | 获取价格 |
|
| SN74ALS563J | TI | IC,LATCH,SINGLE,8-BIT,ALS-TTL,DIP,20PIN,CERAMIC | 获取价格 |
|
| SN74ALS563JP4 | TI | IC IC,LATCH,SINGLE,8-BIT,ALS-TTL,DIP,20PIN,CERAMIC, FF/Latch | 获取价格 |
|
| SN74ALS563N | TI | IC,LATCH,SINGLE,8-BIT,ALS-TTL,DIP,20PIN,PLASTIC | 获取价格 |
|
| SN74ALS563N-10 | TI | ALS SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDIP20 | 获取价格 |
|
| SN74ALS563N1 | TI | IC,LATCH,SINGLE,8-BIT,ALS-TTL,DIP,20PIN,PLASTIC | 获取价格 |
|
| SN74ALS563NP3 | TI | IC IC,LATCH,SINGLE,8-BIT,ALS-TTL,DIP,20PIN,PLASTIC, FF/Latch | 获取价格 |
|
| SN74ALS564ADW | TI | 暂无描述 | 获取价格 |
|
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