Ravital Ofir

NextSilicon’s Maverick-2: A Dataflow Revolution in Computing Architecture A quiet revolution may be underway in high-performance computing. Israel-based startup NextSilicon has introduced the Maverick-2 accelerator, a processor built on a dataflow architecture that could redefine how data centers, supercomputers, and AI systems operate. Unlike traditional CPUs and GPUs based on the 80-year-old Von Neumann model—where sequential instructions dictate computation—Maverick-2 lets data itself drive execution, potentially eliminating decades of inefficiency. A Fourth Path Beyond CPU, GPU, and ASIC NextSilicon’s “Intelligent Compute Architecture” seeks to combine the flexibility of CPUs, the parallelism of GPUs, and the efficiency of ASICs—all without specialized coding. In the Maverick-2, computation begins the instant data arrives, maximizing silicon utilization and reducing wasted cycles. The company claims 10× GPU performance with up to 60% less power, running unmodified C++, Python, Fortran, or even CUDA code. What sets Maverick-2 apart is its ability to self-optimize in real time. The chip’s software layer profiles active workloads, detects bottlenecks, and dynamically reconfigures its hardware into specialized “Mill Cores” within nanoseconds—transforming static circuitry into a living, adaptive compute fabric. This allows it to shift effortlessly between highly parallel AI tasks and deep, sequential computations. Real-World Proof and RISC-V Integration Already deployed in Sandia National Laboratories’ Spectra supercomputer, Maverick-2 has delivered strong early benchmarks: 22× CPU performance and nearly 6× GPU speed in key workloads like graph analytics and conjugate gradients—all at lower power draw. Its built-in RISC-V control core, dubbed Arbel, manages orchestration across the chip’s vast dataflow grid, and may itself rank among the fastest RISC-V implementations to date. Challenges and Industry Impact If validated independently, Maverick-2 could reshape the processor landscape—particularly for HPC, AI training, and data analytics. Yet success will hinge on ecosystem maturity: developer tools, compiler support, and large-scale manufacturing. Competing with Nvidia and AMD requires more than speed; it demands software adoption and supply chain resilience. Still, Maverick-2’s promise of drop-in programmability and adaptive performance suggests a paradigm shift. If dataflow computing finally achieves commercial viability, NextSilicon may not just disrupt the chip market—it could redefine what computing efficiency means in the AI and exascale era. Keith King https://lnkd.in/gHPvUttw

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Intel Corporation’s Shlomi Ben-Porat says the real win from programs like Ignite DeepTech's isn’t just access to innovation, it’s collaboration. At the Fall 2025 Selection Day, he shared how Intel engineers work hands-on with startups, giving feedback on their tech and helping shape products that could become the next big thing. Watch now to hear his pitch tips! Hosted by Revital Moses

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Latest episode with Cadence's ChipStack Founder Hamid Shojaei came out last week, and I asked him for more details on how close we are to fully automating verification. Full episode: https://lnkd.in/e4PNkEps Spotify link in comments!

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I am excited to welcome Sankara Venkateswaran to the Ayar Labs team as our new VP of Engineering. As we move into 2026, the industry is hitting a critical inflection point. The "copper wall" is a real-world bottleneck for hyperscale AI, and co-packaged optics has become an infrastructure necessity in future roadmaps. Sankara joins us at a pivotal moment as we move towards mass production. His deep expertise in  compute and networking acceleration silicon from his time at Intel, Qualcomm, and Atheros perfectly complements our leadership in co-packaged optics. He understands the discipline required to deliver production-grade silicon that integrates into the world's most complex packaging flows. With Sankara leading our engineering organization, we are doubling down on our commitment to: - Scale our TeraPHY™ optical engines for high-volume deployment. - Break the power and bandwidth barriers of traditional interconnects. - Deliver predictable, high-quality CPO solutions that meet the aggressive timelines of our partners for the delivery of hyperscale AI infrastructure. Please join me in welcoming Sankara to the team!

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TSMC is accelerating its U.S. expansion with plans to begin 2nm chip production in Arizona by 2027, ahead of its original 2028 timeline. This move is part of a broader $165 billion investment that includes three advanced fabs, two packaging facilities, and an R&D center, positioning Arizona as a key hub for next-gen semiconductor manufacturing. The initiative aims to meet surging AI demand and strengthen domestic chip supply chains, with TSMC hinting at further site expansion beyond its current commitment. #TSMC #Foundry #Foundries #2nm #Technology #Chips #Semiconductors #ChipManufacturing #SemiconductorIndustry #Innovation #ArizonaFabs #AIInfrastructure #TechLeadership #AdvancedManufacturing #CHIPSAct #GlobalTech #FutureOfComputing #TechnologyNews https://lnkd.in/dzEbXcEK

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Our CEO Jensen Huang joined Y.L. Wang, TSMC vice president of operations, and Ray Chuang, CEO of TSMC Arizona, in Phoenix today to celebrate the first NVIDIA Blackwell wafer produced in the United States. This achievement marks a huge step forward in paving the way for sustained American leadership in AI. Onshoring world-class chipmaking to American soil is crucial to meeting the growing demand for AI. Within the next four years, NVIDIA plans to produce up to one-half-trillion dollars of AI infrastructure in the U.S. — collaborating with TSMC, Foxconn, Wistron, Amkor Technology, Inc., and SPIL 矽品. Manufacturing the world’s AI technology stack in America will fuel innovation and bolster the US supply chain. The production of American AI factories is projected to create hundreds of thousands of jobs and drive trillions of dollars in economic security over the coming decades. Read more: https://bit.ly/470eLM6

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