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FSDH565
Fairchild Power Switch(FPS)
Features Description
• Single Chip 650V 0.5A SenseFET Power Switch The FSDH565 is specially designed for an off-line SMPS with
• Precision Fixed Operating Frequency (100kHz) minimal external components. The FSDH565 is a monolithic
• Internal Start up Switch high voltage power switching regulator that combine the
• UVLO with Hysteresis (6.7V/8.7V) SenseFET(LDMOS) with voltage mode PWM control block.
• Over Load Protection Included PWM controller features integrated fixed oscillator,
• Over Current Protection (0.3A) under voltage lock out, leading edge blanking, optimized gate
• Internal Thermal Shutdown Function turn-on/turn-off driver, thermal shut down protection and
• Secondary Side Regulation temperature compensated precision current sources for loop
• Auto-restart mode compensation and fault protection circuitry. compared to
• No load consumption <250mW at 265VAC input discrete MOSFET and controller or RCC switching converter
solution, a FSDH565 can reduce total component count, design
size, weight and at the same time increase efficiency,
Applications productivity, and system reliability. It has a basic platform well
suited for cost effective design in a flyback converter.
• Charger & Adaptor for Mobile Phone, PDA & MP3
• Auxiliary Power for PC, C-TV, Monitor 8-DIPH
1.Vstr 2.Vfb 3.4.5.6.GND 7.Vcc 8.Drain
Internal Block Diagram
#1 : Vstr
UVLO ≤ 6.7V
#7 : Vcc
UVLO 4.5V UVLO ≥ 8.7V
VREG(5.8V) VREF #8 : Drain
INTERNAL
BIAS
SFET
OSC
5.8V S
Q
PWM
5 uA 0.45 mA R
+
L.E.B
_
#2 : Vfb
+
OLP _
OCP
+
Vth
_ S
4.5V
Q
R
#3,#4,#5,#6
TSD GND
÷4
Rev.1.0.2
©2001 Fairchild Semiconductor Corporation
FSDH565
Absolute Maximum Ratings
(Ta=25°C unless otherwise specified)
Parameter Symbol Value Unit
Maximum Drain Voltage VD,MAX 650 V
Continuous Drain Current (TC=25°C) ID 0.3 ADC
Maximum Supply Voltage VCC,MAX 21 V
Input Voltage Range VFB −0.3 to VSD V
Operating Ambient Temperature TA −25 to +85 °C
Storage Temperature Range TSTG −55 to +150 °C
PIN Definitions
Pin Number Pin Name Pin Function Description
This pin connects directly to the rectified AC line voltage source. At start up
the internal switch supplies internal bias and charges an external capacitor
1 Vstr
that connects from the Vcc pin to ground. once this reaches 8.7V, Vstr is
isolated internally.
This pin is the inverting input of the PWM comparator, and it operates
normally between 0.5V and 2.5V. It has a 0.45mA current source
connected internally and a capacitor and opto coupler connected
2 Vfb externally. A feedback voltage of 3.5V to 4.5V triggers overload protection
(OLP). There is a time delay due to the 5uA current source, which prevents
false triggering under transient conditions but still allows the protection
mechanism to operate under true overload conditions.
3, 4, 5, 6 GND These pins are the control ground and the SenseFET Source.
This is the positive supply voltage input. During start up, power is supplied
to this input from Pin 1. When Vcc reaches the UVLO upper threshold
7 Vcc
(8.7V), the start up Internal Switch (Vstr) turns off and power is supplied
from auxiliary transformer winding.
This pin is designed to directly drive the converter transformer and is
8 Drain
capable of switching a maximum of 650V and 1A.
2
FSDH565
Electrical Characteristics
(Ta=25°C unless otherwise specified)
Parameter Symbol Condition Min. Typ. Max. Unit
SENSEFET SECTION
Drain-Source Breakdown Voltage BVDSS VGS = 0V, ID = 100µA 650 - - V
Zero gate voltage drain current IDSS VDS = 520V - - 100 µA
ID = 50mA Tj = 25°C - 36 39 Ω
Static drain-source on Resistance RDS(ON)
ID = 50mA Tj = 100°C - 51 59 Ω
Rise Time TR VDS = 325V, ID = 300mA - 100 - nS
Fall Time TF VDS = 325V, lD = 50mA - 50 - nS
START UP SECTION
VSTR Supply Voltage VST - 17 - - V
UVLO SECTION
Start Threshold Voltage Vstart - 8.0 8.7 9.4 V
Stop Threshold Voltage Vstop After turn on 6.0 6.7 7.4 V
OSCILLATOR SECTION
Initial accuracy FOSC Tj = 25°C 90 100 110 kHz
Maximum Duty Cycle DMAX Vfb = 3V 64 67 70 %
Minimum Duty Cycle DMIN Vfb = 0V - 0 0 %
FEEDBACK SECTION
Feedback Source Current IFB Vfb = 0V 0.40 0.45 0.50 mA
Shutdown feedback Voltage VSD - 4.0 4.5 5.0 V
CURRENT LIMIT(SELF-PROTECTION)SECTION
Peak Current Limit IOVER peak inductor current 0.25 0.3 0.35 A
PROTECTION SECTION
Thermal Shutdown Temperature (Tj) (1) TSD - 125 145 - °C
TOTAL DEVICE SECTION
Operating Supply Current IOP VCC = 9.5V (Max) - - 3.5 mA
Note:
1. These parameters, although guaranteed, are not 100% tested in production
3
FSDH565
Typical Performance Characteristics
(These characteristic graphs are normalized at Ta=25°C)
BVdss Idss[nA] Idss
BVdss[V]
800 5000
790 4500
780 4000
770 3500
760 3000
750 2500
740 2000
730 1500
720 1000
500
710
0
700
-25 0 25 50 75 100 125 -25 0 25 50 75 100 125
Temperature[℃] Temperature[℃]
Figure 1. Breakdown vs.Temperature Figure 2. Zero gate voltage drain current vs.Temperature
Vstart[V] Vstart Vstop
8.8 Vstop[V]
6.8
8.7
6.75
6.7
8.6
6.65
8.5
6.6
8.4
6.55
8.3 6.5
-25 0 25 50 75 100 125 -25 0 25 50 75 100 125
Temperature[℃] Temperature[℃]
Figure 3. Start Threshold Voltage Figure 4. Stop Threshold Voltage
Iop[mA] Iop Vstr[V]
Vstr
2.55 22
21
2.5
20
2.45
19
2.4
18
2.35 17
2.3 16
15
2.25
-25 0 25 50 75 100 125
-25 0 25 50 75 100 125
Temperature[℃] Temperature[℃]
Figure 5.Operating Supply Current Figure 6.Vstr Supply Voltage
4
FSDH565
Typical Performance Characteristics (Continued)
(These characteristic graphs are normalized at Ta=25°C)
Frequency[Khz] OSC Ibias[uA] Ifb
IBias
110 460
450
105
440
100
430
95
420
90 410
-25 0 25 50 75 100 125 -25 0 25 50 75 100 125
Temperature[℃] Temperature[℃]
Figure 7. Output Frequency Figure 8. Feedback Source Current
IPeak
IPeak(A)
0.31
0.3
0.29
0.28
0.27
0.26
0.25
-25 0 25 50 75 100 125
Temperature[℃]
Figure 9. Peak Current Limit
5
FSDH565
Typical Circuit
VDC
Vstart
1
Start-up
8
Drain Feedback
PWM Circuit
3,4,5&6
BCDMOS 1Chip
2 7 GND
Vfb Vcc
6
FSDH565
Package Dimensions
8-DIPH
7
FSDH565
Ordering Information
Product Number Package Rating Topr (°°C)
FSDH565 8-DIPH 650V, 0.5A −25°C to +85°C
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems 2. A critical component in any component of a life support
which, (a) are intended for surgical implant into the body, device or system whose failure to perform can be
or (b) support or sustain life, and (c) whose failure to reasonably expected to cause the failure of the life support
perform when properly used in accordance with device or system, or to affect its safety or effectiveness.
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
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2001 Fairchild Semiconductor Corporation