SYSTEM SOFTWARE
Solution to TEST I
B.E 5th Semester
Q 1. Explain SIC Architecture
Memory
consists of 8 bit bytes,with 3 consecutive bytes forming a word
byte addressable m/c
total 32678 bytes in memory
Registers
there are 5 registers all with special uses
each register is 24 bits in length
accumulator,index register,link register,(for addressing),link register(to save return
address),pc(program counter), SW(status word containing variety of info including condition
codes)
Data formats
integers stored as 24 bit numbers,2s complement repsn for negative numbers
ascii repsn of characters
no floating point h/w
Instruction formats
only a single format
Index register mode bit
Opcode 8 bits
Address 15 bits
Addressing modes
two addressing modes available
direct mode x=0 ta=address
indexed mode x=1 ta=address+(x)
Instruction set
load and store opns(lda,ldx sta,stx)
arithmetic,logical opns(add,sub,mul,div)
comp instruction to compare 2 values
jlt,jeq,jgt conditional branch instns
jsub,rsub for subroutine linkage
i/p and o/p
performed by transferring one byte at a time from rightmost parts of the register
3 instn each of which specifies the device
td(test device),rd(read data),wd(write data) instructions for testing ,reading,writing data to devices
Q 2.Explain the instruction formats and addressing modes available in SIC/XE architecture
Instruction formats :
FORMAT 1 (1 BYTE):
8
OPCODE
EXAMPLE: RSUB (RETURN TO SUBROUTINE)
OPCODE
01 00
11 00
4
(OBJ-CODE)
FORMAT 2 (2 BYTES):
OPCODE
REG1
REG2
EXAMPLE: COMPR A, S (COMPARE TH CONTENTS OF REGISTERS A AND S)
OPCODE
1010 0000
A
0
(8 BIT)
0000
01 0 0
0
(4 BIT)
0
(4 BIT)
(OBJ-CODE)
FORMAT 3 (3 BYTES):
6
1 1 1 1 1 1
12
OPCODE N I X B P E
DISPLACEMENT
EXAMPLE: LDA #3 (LOAD 3 TO ACCUMULATOR A)
6
1 1 1 1 1 1
0000 00 0 1 0 0 0 0
OPCODE
N I X B P E
0
1
0
0
12
0000
0000
0
00 11
3 (OBJ-CODE)
FORMAT 4 (4 BYTES):
1 1
OPCODE
1
N
1
I
1
X
20
B
ADDRESS
EXAMPLE: +JSUB RDREC ( JUMP TO THE ADDRESS, 1036)
6
1 1
0100 10
1
OPCODE
4
1 1 1 1
1 0 0
20
0000 0001 0000 0001 0110
N I X B P E
B
6 (OBJ-CODE)
ADDRESSING MODES:
1) DIRECT
2) INDEXED
3) BASE RELATIVE
4) PROGRAM COUNTER RELATIVE
DIRECT
EXAMPLE: LDA TEN
0000
0000
0
0
OPCODE
0 01
1
0000
0
0000
0
TEN
0000
0
INDEXED
STCH BUFFER, X
0101
0100
5
OPCODE
0 01
X1
0000
0000
0
0
BUFFER
0000
0
EA=1000+[X]
BASE RELATIVE:
MODE
INDICATION
BASE
RELATIVE
TARGET ADDRESS CALCULATION
B=1 P=0
TA = (B) + DISP (0 <= DISP <= 4095)
FOR BASE RELATIVE ADDRESSING MODE THE DISPLACEMENT FIELD DISP IN A
FORMAT 3 INSTRUCTION IS INTERPRDTED AS A 12 BIT UNSIGNED INTEGER.
6
0001
OPCODE
1
1 1 1
1 1 0
1 1
1 0
N 1 X B
3
P E
4
00
12
0000
0000
00 00
0
0 OBJ-CODE
EA=LENGTH=0033=DISP+ [B] 0<=DISP<=4095
[B]=0033
DISP=0
THE CONTENT OF THE ADDRESS 0033 IS LOADED TO THE INDEX REGISTER X.
PROGRAM COUNTER RELATIVE
EA=(PC)+DISP
-2048<=DISP<=2047
EXAMPLE: 1) LDA LENGTH
6
1
0000
1
00
1 1
1 1
12
0
0000
0011
00 11
OPCODE
0
N I X B P E
3
0
ACCUMULATOR A CONTAINS THE CONTENT OF LENGTH 0033
2) STCH BUFFER,X
6
1
0101
1 1
01
1 1
1
12
OPCODE N I X B P E
5
7
C
0000
0000
00 11
BUFFER = 0036
[B] = 0033
DISP = 3
ACCUMULATOR A CONTAINS THE CONTENT OF BUFFER 0036
3) LDA #9
6
0000
OPCODE
0
1 1
00
1 1
1 1
12
0
N I X B P E
1
0
0000
0000
10 01
ACCUMULATOR A CONTAINS 9.
4) 002A J @ RETADR
6
1 1 1
0011
11
1
0
1 1
0
12
0
0000
0000
00 11
Q 3. Write a sequence of instructions for SIC to set ALPHA equal to product of BETA and
GAMMA . Assume ALPHA, BETA and GAMMA to be memory locations of one word each.
Ans:-
BETA
GAMMA
ALPHA
LDA
MUL
STA
RESW
RESW
RESW
BETA
GAMMA
ALPHA
1
1
1
load ALPHA into register A
multiply the value of GAMMA to register A
store register A contents to ALPHA
one word variable
one word variable
one word variable
Q 4.Write a sequence of instructions in SIC to clear a 20-byte string to all blanks
MOVEC
ZERO
TWENTY
CHR
STR1
LDX
LDA
STCH
TIX
JLT
WORD
WORD
BYTE
RESB
ZERO
CHR
STR1,X
TWENTY
MOVEC
0
20
C
20
INITIALIZE INDEX REGISTER TO ZERO
STORE BLANK IN REGISTER A
STORE CHARACTER INTO STR1
ADD 1 TO INDEX AND COMPARE WITH 20
LOOP IF LESS THAN 20
CONSTANT 0
CONSTANT 20
CONSTANT CHAR BLANK
20 BYTE STRING VARIABLE
Q 5. a. Explain the steps involved in translating source program to object program.
b. List & explain the assembler directives.
Answer:
The steps involved in translating a source program to object program are as follows:
1. Convert mnemonic operation codes to their machine language equivalents.
2. Convert symbolic operands to their equivalent machine addresses
3. Build the machine instructions in the proper format.
4. Convert the data constants specified in the source program into their internal machine
representations. Eg., translate EOF to 454F46
5. Write the object program and the assembly listing.
All of these steps except number 2 can be accomplished by sequential processing of the source
program, one line at a time. The translation of addresses pose a problem if there is a forward reference,
i.e, a reference to a label defined later in the program. If the program is translated line by line, it is not
possible to process this statement because the address that will be assigned to the label will not be
known. Because of this, most assemblers make two passes over the source program. The first pass
scans the source program for label definitions and assigns addresses. The second pass performs most of
the actual translation.
The assembler also processes assembler directives.
Finally, the assembler writes the generated object code into some output device. This object program
will later be loaded into memory for execution. The simple object program format used consists of 3
types of records: Header, Text, and End.
The Header record contains the program name, start address and length.
Text records contain the translated instructions and data of the program with the addresses where these
are to be loaded.
The End record marks the end of the object program and specifies the addresses in the program where
execution is to begin.
b. Assembler Directives :
START - Specify name and starting addresses for the program.
END
- Indicate the end of the source program and (optionally) specify the
First executable instruction in the program.
BYTE - Generate character or hexadecimal constant, occupying as many
Bytes as needed to represent the constant.
WORD - Generate one-word integer constant.
RESB - Reserve the indicated number of bytes for data area.
RESW - Reserve the indicated number of words for a data area.
Q 6. Describe the data structures used in two-pass assembler design.
The data structures used in a two-pass assembler design are:
1. Location Counter (LOCCTR)
2. The Operation Code Table (OPTAB)
3. The Symbol Table (SYMTAB)
4. The Literal Table (LITTAB)
1.LOCCTR:
It is a variable that is used to help in the assignment of addresses. LOCCTR is initialized to the beginning
of the address specified in the START statement. After each source statement is processed, the length of the
assembled instruction or data to be generated is added to LOCCTR.
2.OPTAB:
It must contain the mnemonic operation code and its machine language equivalent. In complex assemblers ,
it also contains information about instruction format and length .
During Pass1, OPTAB is used to look up and validate operation codes in the source program.
In Pass 2, it is used to translate the operation codes to machine language.
It is organized as a HASH TABLE, with mnemonic operation code as the key. Hash table is appropriate
since it provides fast retrieval with a minimum searching.
3.SYMTAB:
The symbol table includes the name and value (address) for each label in the source program, the flags to
indicate error conditions, such as a symbol defined in two different places. It can as well contain
information about the data area or instruction labeled- eg: its type and length.
During Pass 1, labels are entered into SYMTAB as they are encountered in the source program, along with
their assigned addresses from the location counter.
In Pass 2, symbols used as operands are looked up in the SYMTAB to obtain the addresses to be inserted in
the assembled instructions.
The symbol table is organized as a hash table for efficiency of insertion and retrieval. Entries are rarely
deleted from the SYMTAB. So efficiency of deletion is not an important consideration.
4.LITTAB:
A literal table contains the details of literals used, such as the literal name, the operand value and length,
and the address assigned to the operand when it is placed in a literal pool. The LITTAB is organized as a
hash table, using the literal name or value as the key.
Q 7. What is program relocation? How is this handled by the assembler?
In a time sharing system it is often desirable to have more than one programs sharing the same memory and
other resources of the machine.
If we knew exactly which program were to be executed concurrently in a particular way in advance it
would be easy to assign addresses when the programs were assembled so that they would fit together
without overlap or wasted space. But as this is not possible most of the times the actual starting address of
the program is not known most of the times. In some cases the program might also get relocated.
In such situations the addresses allocated using absolute mode will change as well as the addresses of
labels.
EG: Absolute program, starting address 1000
e.g. 55 101B
LDA
THREE
00102D
Relocate the program to 2000
e.g. 55 101B
LDA
THREE
00202D
Hence each Absolute address (including labels) should be modified
This problem of reallocation can be solved in the following way:
1. When the assembler generates the object code for the absolute addresses it will first enter the
address relative to the start of the program.
2. The assembler will also produce a command for the loader instructing it to add the beginning
address of the program to the address field in the required instructions at load time.
This command for the loader is a part of the Object program and is present in the form of a modification
record.
Modification record
*Col 1
M
*Col 2-7 Starting location of the address field to be
modified, relative to the beginning of the program
*Col 8-9 length of the address field to be modified, in halfbytes
The length is stored in half bytes because the address field to be modified may not occupy an integral
number of bytes. If the field comprises odd number of half bytes it is assumed to begin in the middle of the
first byte at the starting location.
LOCATION
0000
0000
0003
0006
000A
000D
0010
0013
0017
001A
0020
0023
0026
0029
002C
002F
-
SOURCE STATEMENT
COPY
FIRST
LDB
BASE
CLOOP
LDA
COMP
JEQ
+JSUB
J
ENDFIL
LTORG
STA
LDA
STA
RETADR
LENGTH
BUFFER
END
START
STL
#LENGTH
LENGTH
+JSUB
LENGTH
#0
ENDFIL
WRREC
CLOOP
LDA
BUFFER,X
#3
LENGTH
RESW
RESW
RESB
FIRST
0000
RETADR
RDREC
=CEOF
1
1
4096
OBJECT
CODE
172026
692026
4B5100A
03201F
290000
332007
4B51031
3F2FEC
032003
0FC003
030003
0F2003
-
Q.8 Assemble the following instructions using SIC/XE architecture
Programs:
Exercises Chapter 1
1. Write a sequence of instructions for SIC to ALPHA equal to the product of BETA and
GAMMA. Assume that ALPHA, BETA and GAMMA are defined as in Fig.1.3(a).
Assembly Code:
LDA BETA
MUL GAMMA
STA ALPHA
:
:
ALPHA RESW 1
BETA RESW 1
GAMMA RESW 1
2. Write a sequence of instructions for SIC/XE to set ALPHA equal to 4 * BETA 9.
Assume that ALPHA and BETA are defined as in Fig. 1.3(b). Use immediate addressing
for the constants.
Assembly Code:
LDA BETA
LDS #4
MULR S,A
SUB #9
STA ALPHA
:
:
ALPHA RESW 1
3. Write SIC instructions to swap the values of ALPHA and BETA.
Assembly Code:
LDA ALPHA
STA GAMMA
LDA BETA
STA ALPHA
LDA GAMMA
STA BETA
:
:
ALPHA RESW 1
BETA RESW 1
GAMMA RESW 1
4. Write a sequence of instructions for SIC to set ALPHA equal to the integer portion of
BETA GAMMA. Assume that ALPHA and BETA are defined as in Fig.1.3(a).
Assembly Code:
LDA BETA
DIV GAMMA
STA ALPHA
:
:
ALPHA RESW 1
BETA RESW 1
GAMMA RESW 1
5. Write a sequence of instructions for SIC/XE to divide BETA by GAMMA, setting
ALPHA to the integer portion of the quotient and DELTA to the remainder. Use registerto-register instructions to make the calculation as efficient as possible.
Assembly Code:
LDA BETA
LDS GAMMA
DIVR S, A
STA ALPHA
MULR S, A
LDS BETA
SUBR A, S
STS DELTA
:
:
ALPHA RESW 1
BETA RESW 1
GAMMA RESW 1
DELTA RESW 1
6. Write a sequence of instructions for SIC/XE to divide BETA by GAMMA, setting
ALPHA to the value of the quotient, rounded to the nearest integer. Use register-toregister instructions to make the calculation as efficient as possible.
Assembly Code:
LDF BETA
DIVF GAMMA
FIX
STA ALPHA
:
:
ALPHA RESW 1
BETA RESW 1
GAMMA RESW 1
7. Write a sequence of instructions for SIC/XE to clear a 20-byte string to all blanks.
Assembly Code:
LDX ZERO
LOOP LDCH BLANK
STCH STR1,X
TIX TWENTY
JLT LOOP
:
:
STR1 RESW 20
BLANK BYTE C
ZERO WORD 0
TWENTY WORD 20
8. Write a sequence of instructions for SIC/XE to clear a 20-byte string to all blanks. Use
immediate addressing and register-to-register instructions to make the process as
efficient as possible.
Assembly Code:
LDT #20
LDX #0
LOOP LDCH #0
STCH STR1,X
TIXR T
JLT LOOP
:
:
STR1 RESW 20
9. Suppose that ALPHA is an array of 100 words, as defined in Fig. 1.5(a). Write a
sequence of instructions for SIC to set all 100 elements of the array to 0.
Assembly Code:
LDA ZERO
STA INDEX
LOOP LDX INDEX
LDA ZERO
STA ALPHA, X
LDA INDEX
ADD THREE
STA INDEX
COMP K300
TIX TWENTY
JLT LOOP
:
:
INDEX RESW 1
ALPHA RESW 100
:
ZERO WORD 0
K300 WORD 100
THREE WORD 3
10. Suppose that ALPHA is an array of 100 words, as defined in Fig. 1.5(a). Write a
sequence of instructions for SIC/XE to set all 100 elements of the array to 0. Use
immediate addressing and register-to-register instructions to make the process as
efficient as possible.
Assembly Code:
LDS #3
LDT #300
LDX #0
LOOP LDA #0
STA ALPHA, X
ADDR S, X
COMPR X, T
JLT LOOP
:
:
ALPHA RESW 100
11. Suppose that ALPHA is an array of 100 words. Write a sequence of instruction for
SIC/XE to arrange the 100 words in ascending order and store result in an array BETA of
100 elements.
Assembly Code:
NOT YET SOLVED
12. Suppose that ALPHA and BETA are the two arrays of 100 words. Another array of
GAMMA elements are obtained by multiplying the corresponding ALPHA element by 4
and adding the corresponding BETA elements.
Assembly Code:
LDS #3
LDT #300
LDX #0
ADDLOOP LDA ALPHA, X
MUL #4
ADD BETA, X
STA GAMMA, X
ADDR S, X
COMPR X, T
JLT ADDLOOP
:
:
ALPHA RESW 100
BETA RESW 100
GAMMA RESW 100
13. Suppose that ALPHA is an array of 100 words. Write a sequence of instructions for
SIC/XE to find the maximum element in the array and store results in MAX.
Assembly Code:
LDS #3
LDT #300
LDX #0
CLOOP LDA ALPHA, X
COMP MAX
JLT NOCH
STA MAX
NOCH ADDR S, X
COMPR X, T
JLT CLOOP
:
:
ALPHA RESW 100
MAX WORD -32768
14. Suppose that RECORD contains a 100-byte record, as in Fig. 1.7(a). Write a
subroutine for SIC that will write this record on to device 05.
Assembly Code:
JSUB WRREC
:
:
WRREC LDX ZERO
WLOOP TD OUTPUT
JEQ WLOOP
LDCH RECORD, X
WD OUTPUT
TIX LENGTH
JLT WLOOP
RSUB
:
:
ZERO WORD 0
LENGTH WORD 1
OUTPUT BYTE X 05
RECORD RESB 100
15. Suppose that RECORD contains a 100-byte record, as in Fig. 1.7(a). Write a
subroutine for SIC that will write this record on to device 05.
Assembly Code:
JSUB WRREC
:
:
WRREC LDX #0
LDT #100
WLOOP TD OUTPUT
JEQ WLOOP
LDCH RECORD, X
WD OUTPUT
TIXR T
JLT WLOOP
RSUB
:
:
OUTPUT BYTE X 05
RECORD RESB 100
16. Write a subroutine for SIC that will read a record into a buffer, as in Fig.1.7(a). The
record may be any length from 1 to 100 bytes. The end of record is marked with a null
character (ASCII code 00). The subroutine should place the length of the record read
into a variable named LENGTH.
Assembly Code:
JSUB RDREC
:
:
RDREC LDX ZERO
RLOOP TD INDEV
JEQ RLOOP
RD INDEV
COMP NULL
JEQ EXIT
STCH BUFFER, X
TIX K100
JLT RLOOP
EXIT STX LENGTH
RSUB
:
:
ZERO WORD 0
NULL WORD 0
K100 WORD 1
INDEV BYTE X F1
LENGTH RESW 1
BUFFER RESB 100
17. Write a subroutine for SIC/XE that will read a record into a buffer, as in Fig.1.7(a).
The record may be any length from 1 to 100 bytes. The end of record is marked with a
null character (ASCII code 00). The subroutine should place the length of the record
read into a variable named LENGTH. Use immediate addressing and register-to-register
instructions to make the process as efficient as possible.
Assembly Code:
JSUB RDREC
:
:
RDREC LDX #0
LDT #100
LDS #0
RLOOP TD INDEV
JEQ RLOOP
RD INDEV
COMPR A, S
JEQ EXIT
STCH BUFFER, X
TIXR T
JLT RLOOP
EXIR STX LENGTH
RSUB
:
:
INDEV BYTE X F1
LENGTH RESW 1
BUFFER RESB 100
