Chapter 1: Basic Concepts
and Computer Evolution
Computer Architecture
Computer Organization
Attributes of a system
visible to the programmer
Have a direct impact on
the logical execution of a
program
Hardware details
transparent to the
programmer, control
signals, interfaces
between the computer and
peripherals, memory
technology used
Instruction set, number of
bits used to represent
various data types, I/O
mechanisms, techniques
for addressing memory
Computer
Architecture
Architectural
attributes
include:
Organizational
attributes
include:
Computer
Organization
The operational units and
their interconnections that
realize the architectural
specifications
IBM System
370 Architecture
IBM System/370 architecture
Was introduced in 1970
Included a number of models
Could upgrade to a more expensive, faster model without having to abandon original software
New models are introduced with improved technology, but retain the same architecture so that the
customers software investment is protected
Architecture has survived to this day as the architecture of IBMs mainframe product line
Structure and Function
Hierarchical system
Set of interrelated
subsystems
Hierarchical nature of complex
systems is essential to both
their design and their
description
Designer need only deal with a
particular level of the system at
a time
Concerned with structure and
function at each level
Structure
The way in which
components relate to each
other
Function
The operation of individual
components as part of the
structure
Function
There are four basic functions that a computer can perform:
Data processing
Data may take a wide variety of forms and the range of
processing requirements is broad
Data storage
Short-term
Long-term
Data movement
Input-output (I/O) - when data are received from or delivered to a
device (peripheral) that is directly connected to the computer
Data communications when data are moved over longer
distances, to or from a remote device
Control
A control unit manages the computers resources and
orchestrates the performance of its functional parts in response to
instructions
COMPUTER
Main
memory
I/O
System
Bus
CPU
CPU
Registers
Structure
Internal
Bus
Control
Unit
CONTROL
UNIT
Sequencing
Logic
Control Unit
Registers and
Decoders
Control
Memory
Figure 1.1 A Top-Down View of a Computer
ALU
+
CPU controls the operation of
There are four
main structural
components
of the computer:
the computer and performs its
data processing functions
Main Memory stores data
I/O moves data between the
computer and its external
environment
System Interconnection
some mechanism that provides
for communication among CPU,
main memory, and I/O
+
CPU
Major structural
components:
Control Unit
Arithmetic and Logic Unit (ALU)
Performs the computers data
processing function
Registers
Controls the operation of the CPU and
hence the computer
Provide storage internal to the CPU
CPU Interconnection
Some mechanism that provides for
communication among the control unit,
ALU, and registers
Multicore Computer Structure
Central processing unit (CPU)
Core
Portion of the computer that fetches and executes instructions
Consists of an ALU, a control unit, and registers
Referred to as a processor in a system with a single processing unit
An individual processing unit on a processor chip
May be equivalent in functionality to a CPU on a single-CPU system
Specialized processing units are also referred to as cores
Processor
A physical piece of silicon containing one or more cores
Is the computer component that interprets and executes instructions
Referred to as a multicore processor if it contains multiple cores
Cache Memory
Multiple layers of memory between the processor and main memory
Is smaller and faster than main memory
Used to speed up memory access by placing in the cache data from main memory
that is likely to be used in the near future
A greater performance improvement may be obtained by using multiple levels of
cache, with level 1 (L1) closest to the core and additional levels (L2, L3, etc.)
progressively farther from the core
MOTHERBOARD
Main memory chips
I/O chips
Processor
chip
PROCESSOR CHIP
Core
Core
L3 cache
Core
Core
Core
Core
L3 cache
Core
Core
CORE
Instruction
logic
Arithmetic
and logic
unit (ALU)
Load/
store logic
L1 I-cache
L1 data cache
L2 instruction
cache
L2 data
cache
Figure 1.2 Simplified View of Major Elements of a Multicore Computer
Figure 1.3
Motherboard with Two Intel Quad-Core Xeon Processors
Figure 1.4
zEnterprise
EC12 Processor
Unit (PU)
Chip Diagram
Figure 1.5
zEnterprise
EC12
Core Layout
History of Computers
First Generation: Vacuum Tubes
Vacuum tubes were used for digital logic
and memory
IAS computer
elements
Fundamental design approach was the stored program concept
Attributed to the mathematician John von Neumann
First publication of the idea was in 1945 for the EDVAC
Design began at the Princeton Institute for Advanced Studies
Completed in 1952
Prototype of all subsequent general-purpose computers
John von Neumann in front of the IAS computer, 1952.
Central processing unit (CPU)
Arithmetic-logic unit (CA)
AC
MQ
Inputoutput
equipment
(I, O)
Arithmetic-logic
circuits
MBR
Instructions
and data
Instructions
and data
M(0)
M(1)
M(2)
M(3)
M(4)
PC
IBR
MAR
IR
Main
memory
(M)
Control
signals
M(4092)
M(4093)
M(4095)
Control
circuits
Program control unit (CC)
Addresses
Figure 1.6 IAS Structure
AC: Accumulator register
MQ: multiply-quotient register
MBR: memory buffer register
IBR: instruction buffer register
PC: program counter
MAR: memory address register
IR: insruction register
0 1
39
(a) Number word
sign bit
left instruction (20 bits)
0
right instruction (20 bits)
opcode (8 bits)
20
address (12 bits)
28
opcode (8 bits)
(b) Instruction word
Figure 1.7 IAS Memory Formats
39
address (12 bits)
Registers
Memory buffer register
(MBR)
Memory address
register (MAR)
Instruction register (IR)
Contains a word to be stored in memory or sent to the I/O
unit
Or is used to receive a word from memory or from the I/O unit
Specifies the address in memory of the word to be written
from or read into the MBR
Contains the 8-bit opcode instruction being executed
Instruction buffer
register (IBR)
Employed to temporarily hold the right-hand instruction from a
word in memory
Program counter (PC)
Contains the address of the next instruction pair to be fetched
from memory
Accumulator (AC) and
multiplier quotient (MQ)
Employed to temporarily hold operands and results of ALU
operations
Start
Is next
instruction
in IBR?
Yes
No memory
access
required
Fetch
cycle
IR
MAR
IBR (0:7)
IBR (8:19)
No
MAR
MBR
IR
MAR
MBR (20:27)
MBR (28:39)
PC
No
PC
M(MAR)
Left
instruction
required?
Yes
IBR MBR (20:39)
IR MBR (0:7)
MAR
MBR (8:19)
PC + 1
Decode instruction in IR
AC
Go to M(X, 0:19)
M(X)
If AC > 0 then
go to M(X, 0:19)
Yes
Execution
cycle
MBR
AC
M(MAR)
PC
MAR
MBR
AC
AC + M(X)
Is AC > 0?
No
MBR
AC
M(X) = contents of memory location whose addr ess is X
(i:j) = bits i through j
Figure 1.8 Partial Flowchart of IAS Operation
M(MAR)
AC + MBR
Instruction Type
Opcode
00001010
Symbolic
Representation
LOAD MQ
00001001
LOAD MQ,M(X)
00100001
STOR M(X)
00000001
00000010
00000011
LOAD M(X)
LOAD M(X)
LOAD |M(X)|
00000100
00001101
00001110
00001111
LOAD |M(X)|
JUMP M(X,0:19)
JUMP M(X,20:39)
JUMP+ M(X,0:19)
00000101
00000111
00000110
00001000
0
0
0
1
0
0
0
0
ADD M(X)
ADD |M(X)|
SUB M(X)
SUB |M(X)|
00001011
MUL M(X)
00001100
DIV M(X)
00010100
LSH
00010101
RSH
00010010
STOR M(X,8:19)
00010011
STOR M(X,28:39)
Data transfer
Unconditional
branch
Conditional branch
JU
MP
+
M(X
,20:
39)
Arithmetic
Address modify
Description
Transfer contents of register MQ to the
accumulator AC
Transfer contents of memory location X to
MQ
Transfer contents of accumulator to memory
location X
Transfer M(X) to the accumulator
Transfer M(X) to the accumulator
Transfer absolute value of M(X) to the
accumulator
Transfer |M(X)| to the accumulator
Take next instruction from left half of M(X)
Take next instruction from right half of M(X)
If number in the accumulator is nonnegative,
take next instruction from left half of M(X)
If number in the
accumulator is nonnegative,
take next instruction from
right half of M(X)
Add M(X) to AC; put the result in AC
Add |M(X)| to AC; put the result in AC
Subtract M(X) from AC; put the result in AC
Subtract |M(X)| from AC; put the remainder
in AC
Multiply M(X) by MQ; put most significant
bits of result in AC, put least significant bits
in MQ
Divide AC by M(X); put the quotient in MQ
and the remainder in AC
Multiply accumulator by 2; i.e., shift left one
bit position
Divide accumulator by 2; i.e., shift right one
position
Replace left address field at M(X) by 12
rightmost bits of AC
Replace right address field at M(X) by 12
rightmost bits of AC
Table 1.1
The IAS
Instruction Set
(Table can be found on page 17 in the textbook.)
History of Computers
Second Generation: Transistors
Smaller
Cheaper
Dissipates less heat than a vacuum tube
Is a solid state device made from silicon
Was invented at Bell Labs in 1947
It was not until the late 1950s that fully transistorized
computers were commercially available
Table 1.2
Computer Generations
Generation
Approximate
Dates
19461957
Vacuum tube
2
3
19571964
19651971
4
5
6
19721977
19781991
1991-
Transistor
Small and medium scale
integration
Large scale integration
Very large scale integration
Ultra large scale integration
Technology
Typical Speed
(operations per second)
40,000
200,000
1,000,000
10,000,000
100,000,000
>1,000,000,000
+
Second Generation Computers
Introduced:
More
complex arithmetic and logic units and
control units
The use of high-level programming languages
Provision of system software which provided the
ability to:
Load programs
Move data to peripherals
Libraries perform common computations
History of Computers
Third Generation: Integrated Circuits
1958 the invention of the integrated circuit
Discrete component
Single, self-contained transistor
Manufactured separately, packaged in their own containers, and
soldered or wired together onto masonite-like circuit boards
Manufacturing process was expensive and cumbersome
The two most important members of the third generation were
the IBM System/360 and the DEC PDP-8
Input
Boolean
logic
function
Output
Input
Binary
storage
cell
Read
Write
Activate
signal
(a) Gate
(b) Memory cell
Figure 1.10 Fundamental Computer Elements
Output
Integrated
Circuits
Data storage provided by memory cells
Data processing provided by gates
Data movement the paths among
components are used to move data from
memory to memory and from memory
through gates to memory
Control the paths among components can
carry control signals
A computer consists of gates,
memory cells, and
interconnections among these
elements
The gates and memory cells
are constructed of simple digital
electronic components
Exploits the fact that such
components as transistors,
resistors, and conductors can be
fabricated from a semiconductor
such as silicon
Many transistors can be
produced at the same time on a
single wafer of silicon
Transistors can be connected
with a processor metallization to
form circuits
Wafer
Chip
Gate
Packaged
chip
Figure 1.11 Relationship Among Wafer, Chip, and Gate
In
in ve
te n
gr tio
at n
ed of
ci
rc
M
ui
p r oo
t
r
om e
s
ul l a
ga w
te
d
F
tr irst
an w
si o
st rk
or in
g
1947 50
55
60
65
70
75
80
85
90
95
2000
05
100 bn
10 bn
1 bn
100 m
10 m
100,000
10.000
1,000
100
10
1
11
Figure 1.12 Growth in Transistor Count on Integrated Circuits
(DRAM memory)
Moores Law
1965; Gordon Moore co-founder of Intel
Observed number of transistors that could be
put on a single chip was doubling every year
Consequences of Moores law:
The pace slowed to a
doubling every 18
months in the 1970s
but has sustained
that rate ever since
The cost of
computer logic
and memory
circuitry has
fallen at a
dramatic rate
The electrical
path length is
shortened,
increasing
operating
speed
Computer
becomes smaller
and is more
convenient to use
in a variety of
environments
Reduction in
power and
cooling
requirements
Fewer interchip
connections
Microprocessors
The density of elements on processor chips continued to rise
1971 Intel developed 4004
First chip to contain all of the components of a CPU on a single chip
Birth of microprocessor
1972 Intel developed 8008
More and more elements were placed on each chip so that fewer
and fewer chips were needed to construct a single computer
processor
First 8-bit microprocessor
1974 Intel developed 8080
First general purpose microprocessor
Faster, has a richer instruction set, has a large addressing capability
Evolution of Intel Microprocessors
Introduced
Clock speeds
Bus width
Number of transistors
Feature size (m)
Addressable
memory
Virtual
memory
Cache
80286
386TM DX
386TM SX
1982
6 MHz - 12.5
MHz
16 bits
1985
16 MHz - 33
MHz
32 bits
1988
16 MHz - 33
MHz
16 bits
486TM DX
CPU
1989
25 MHz - 50
MHz
32 bits
134,000
275,000
275,000
1.2 million
1.5
0.8 - 1
16 MB
4 GB
16 MB
4 GB
1 GB
64 TB
64 TB
64 TB
8 kB
(b) 1980s Processors
Evolution of Intel Microprocessors
Introduced
Clock speeds
Bus width
Number of
transistors
Feature size (m)
Addressable
memory
Virtual memory
Cache
486TM SX
1991
16 MHz - 33
MHz
32 bits
Pentium
1993
60 MHz - 166
MHz,
32 bits
Pentium Pro
1995
150 MHz - 200
MHz
64 bits
Pentium II
1997
200 MHz - 300
MHz
64 bits
1.185 million
3.1 million
5.5 million
7.5 million
0.8
0.6
0.35
4 GB
4 GB
64 GB
64 GB
64 TB
64 TB
64 TB
8 kB
8 kB
64 TB
512 kB L1 and 1
MB L2
(c) 1990s Processors
512 kB L2
Evolution of Intel Microprocessors
Pentium III
Pentium 4
1999
450 - 660 MHz
2000
1.3 - 1.8 GHz
2006
1.06 - 1.2 GHz
Core i7 EE
4960X
2013
4 GHz
64 bits
64 bits
64 bits
64 bits
Number of
transistors
Feature size (nm)
Addressable
memory
Virtual memory
9.5 million
42 million
167 million
1.86 billion
250
180
65
22
64 GB
64 GB
64 GB
64 GB
64 TB
64 TB
64 TB
Cache
512 kB L2
256 kB L2
2 MB L2
64 TB
1.5 MB L2/15
MB L3
6
Introduced
Clock speeds
Bus
wid
th
Number of cores
Core 2 Duo
(d) Recent Processors
The Evolution of the Intel x86 Architecture
Two processor families are the Intel x86 and the ARM architectures
Current x86 offerings represent the results of decades of design effort on complex
instruction set computers (CISCs)
An alternative approach to processor design is the reduced instruction set computer
(RISC)
ARM architecture is used in a wide variety of embedded systems and is one of the
most powerful and best-designed RISC-based systems on the market