ECE 274 - Digital Logic Digital Design
Datapath Components: Processor: Controller + Datapath
Lecture 8
Controller Datapath
Lecture 8
Data Inputs
Parallel Load Register
Shift Registers
Multifunction Registers
Multifunction Register Design Process
Control Outputs
Control Inputs
Data Outputs
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Digital Design Digital Design
Datapath Components: Registers Datapath Components: Parallel Load Register
4-bit Parallel Load Register
Ability to choose between previous and new value
Load all bits at the same time
Additional Desired Functionality:
Ability to choose between previous and new value
Load all bits at the same time
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Digital Design Digital Design
Datapath Components: Parallel Load Register Example Datapath Components: Parallel Load Register Example
Basic parallel load register example. Basic register example: (a) timing diagram, and (b) the contents of each register.
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Digital Design Digital Design
Datapath Components: Design Example: Weight Sampler Datapath Components: Design Example: Weight Sampler
Weight Sampler:
Functional Description:
Display Weight of objects placed on scale
Display Present weight
Display Saved weight stored upon Save button being pressed
Weight sampler implemented using a 4-bit parallel load register.
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Digital Design Digital Design
Sequential Logic Design Controllers: Design Example Datapath Components
Circuit Description: Temperature History Storage
Functional Description:
Design a system that records the outside temperature every hours
and displays the last three recorded temperatures.
Inputs:
c: clock signal
x4..0: 5-bit temperature reading
Outputs:
a4..0, b4..0, c4..0: 5-bit temperature readings to be displayed
Internal design of the TemperatureHistoryStorage component, using parallel load
registers.
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Digital Design Digital Design
Datapath Components: Design Example: Above Mirror Display Datapath Components: Design Example: Above Mirror Display
central computer
8
From the cars
T I0 8-bit
mirror display
To the above-
A 8 4x1 8
I1 D
I 8 D
I2
? M 8
I3 s1 s0
x y
Well des ign
this later
button
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Digital Design Digital Design
Datapath Components: Design Example: Above Mirror Display Datapath Components: Electronic Checkerboard
Circuit
Circuit
User
Input
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Digital Design Digital Design
Datapath Components: Electronic Checkerboard Datapath Components: Electronic Checkerboard
Timing diagram indicating an input sequence that can be used to initialize
An electronic checkerboard: Eight 8-bit registers (R7 through R0) can be used
to drive the 64 LEDs, using one register per column, and detail of how one
register connects to a columns LEDs.
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Digital Design Digital Design
Datapath Components: Electronic Checkerboard Datapath Components: Computer Components: Shift Registers
Shift Register: Register that can move
contents left/right
Right shift example: (a) sample contents before and after a right shift, and
Checkerboard after loading registers for initial checker positions. (b) bit-by-bit view of the shift.
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Digital Design Digital Design
Datapath Components: Computer Components: Shift Registers Datapath Components: Computer Components: Rotator
Shift register: (a) implementation, (b) paths when shr=1, and (c) block symbol.
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Digital Design Digital Design
Datapath Components: Not really a quiz, but it is a CHALLENGE!! Datapath Components: Design Example: Above Mirror Display
Design a 4-bit shift register with a shift-in input that will
allow you to shift left by 0-3 positions on one clock cycle.
Clearly indicate the following:
Inputs
Outputs
Implementation
If you implement this diagram using shift
registers, by how many input wires will we
need? A) 1 B) 6 C) 8
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Digital Design Digital Design
Datapath Components: Design Example: Above Mirror Display Datapath Components: Computer Components: Multifunction Registers
4-bit register with multiple operations:
parallel load
shift right
Operation Table
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Digital Design Digital Design
Datapath Components: Computer Components: Multifunction Registers Datapath Components: Computer Components: Multifunction Registers
4-bit register with multiple operations:
Parallel load
Shift right
Shift left
Operation table of a 4-bit register
with parallel load, shift left, and
shift right operations.
Operation table of a 4-bit register with separate control inputs for parallel load, shift
left, and shift right.
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Digital Design Digital Design
Datapath Components: Computer Components: Multifunction Registers Datapath Components: Computer Components: Multifunction Registers
A small combinational circuit maps the control inputs ld, shr, and shl to the mux Truth tables describing operations of a register with left/right shift and parallel load along
select inputs s1 and s0. with the mapping of the register control inputs to the internal 4x1 mux select lines: (a)
complete operation table defining the mapping of ld, shr, and shl to s1 and s0, and
(b) a compact version of the operation table.
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Digital Design Digital Design
Datapath Components: Computer Components: Multifunction Registers Datapath Components: Using Multifunction Register Design Process
Step Description Functional Requirements:
1. Determine mux Count the number of operations (dont forget the maintain present Register with the following operations
size value operation!) and add in front of each flip-flop a mux with at Load
least that number of inputs.
Shift left
2. Create mux Create an operation table defining the desired operation for each
Synchronous clear
operation table possible value of the mux select lines.
Synchronous set
3. Connect mux For each operation, connect the corresponding mux data input to the
inputs appropriate external input or flip-flop output (possibly passing
through some logic) to achieve the desired operation.
4. Map control Create a truth table that maps external control lines to the internal
lines mux select lines, with appropriate priorities, and then design the
logic to achieve that mapping
Four-step process for designing a multifunction register.
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Digital Design Digital Design
Datapath Components: Using Multifunction Design Process Datapath Components: Using Multifunction Design Process
Step 1: Determine Mux Size Step 2: Create Mux Operation Table
Register with the following operations Assign operations to mux inputs
Load
Shift left
Synchronous clear
Synchronous set
Dont forget Hold Present Value
Need a mux with at least 5 inputs: 8x1 mux
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Digital Design Digital Design
Datapath Components: Using Multifunction Design Process Datapath Components: Using Multifunction Design Process
Step 3: Connect Mux Inputs Step 4: Map Control Lines
s2 = clr*set
s1 = clr + clr*set*ld*shl
s0 = clr + clr*set*ld
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Digital Design
Datapath Components: Using Multifunction Design Process
Step 4: Map Control Lines
clr*set=>
clr, set,
clr + clr*set*ld*shl=>
ld, shl
clr + clr*set*ld=>
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