ARM Processor
An ARM processor is also one of a family of CPUs based on the RISC (reduced instruction set
computer) architecture developed by Advanced RISC Machines (ARM).
An ARM makes at 32-bit and 64-bit RISC multi-core processors. RISC processors are designed to
perform a smaller number of types of computer instructions so that they can operate at a higher
speed, performing extra millions of instructions per second (MIPS). By stripping out unnecessary
instructions and optimizing pathways, RISC processors give outstanding performance at a part of the
power demand of CISC (complex instruction set computing) procedure.
ARM processors are widely used in customer electronic devices such as smart phones, tablets,
multimedia players and other mobile devices, such as wearables. Because of their reduced to
instruction set, they need fewer transistors, which enable a smaller die size of the integrated
circuitry (IC). The ARM processors, smaller size reduced difficulty and lower power expenditure
makes them suitable for increasingly miniaturized devices.
Processors that have a RISC architecture typically require fewer transistors than those with
a complex instruction set computing (CISC) architecture (such as the x86 processors found in
most personal computers), which improves cost, power consumption, and heat dissipation. These
characteristics are desirable for light, portable, battery-powered devices—
including smartphones, laptops and tablet computers, and other embedded
systems. For supercomputers, which consume large amounts of electricity, ARM could also be a
power-efficient solution.
Computer Families- ARM,AVR
The ARM architecture dominates the mobile market. For example, most smartphones and
tablet computers are based on ARM processors.
The AVR architecture is now predominant in low-cost microcontrollers used in many
embedded systems like washing machines, televisions, cars, microwave ovens etc.
Evolution of ARM Architecture
In early 1980s, U.K.-based company Acron Computer makes successful launch of BBC
Micro Personal Computer which had an an 8-bit microprocessor, called 6502, manufactured
by a company called MOS Technology, as CPU.
In 1985, Acron released their own 32-bit CPU with 26-bit address bus, called Acron-RISC
Machine (ARM) which borrowed ideas from Berkeley RISC project.
Acron released their PC called Archimedes based on ARM CPU. This became very popular.
Acron-RISC Machine was renamed as Advanced RISC Machine (ARM) when ARM
developers at Acron left the company and started their own company called ARM.
In 1993 Apple releases its Newton computer which used ARM 610 CPU.
In mid 1990s, ARM collaborated with Digital Equipment Corporation (DEC) to develop a
high-speed, low-power version ARM called StrongARM for applications in low-power hand-
held devices.
In 1994 ARM7 architecture was released which is widely used even today in mobile devices.
At present ARM does not manufacture any processors but creates designs and ARM-based
developer tools and libraries and licenses them to system designers and chip manufacturers
Evolution of AVR Architecture
In 1996, at Norwegian Institute of Technology, students Alf-Egil Bogen and Vegard Wollan
designed an 8-bit RISC CPU chip called AVR (Alf and Vegard’s RISC).
Atmel Norway bought AVR design and in 1997 released their first AVR microcontroller
AT90S1200 which was pin-compatible with Intel 8051 which was the most popular
microcontroller at that time
Arduino was started in 2005 as a project to develop low-cost development boards for students
by Massimo Banzi and David Cuartielles at the Interaction Design Institute, Ivrea, Italy.
Arduino makes AVR architecture very popular in low-end embedded system applications.
CISC and RISC
On the basis of type of instructions and how they are executed, computers are roughly
classified into two types – Complex Instruction Set Computers (CISC) and Reduced
Instruction Set Computers (RISC).
CISC and RISC both have their merits and demerits.
Present trend is to incorporate the best features of both CISC and RISC in processor design to
get optimum performance at optimum cost.
Features of CISC
Traditionally most of the processors made in 1970s and 1980s were CISC adopting Princeton
architecture.
Variable instruction length. There may be 1-byte, 2-byte, or 3-byte instructions as in case of
Intel 8051 MCU.
As compared to RISC, CISC processors generally have lesser number of internal registers in
the CPU.
Variable instruction cycle time. Instruction cycle is the time taken to execute an instruction.
More complex instructions take longer time to execute.
Large number of instructions in the instruction set. Typically there can be more than 200
instructions in the instruction set.
Generally, in CISC a portion of R/WM is used as stack to store data while branching to
subroutines.
Generally, in CISC instructions are available to operate on data present in the memory
directly without bringing it into a register inside the CPU.
For a given task, a program in CISC results in smaller code size.
Typically in CISC instructions are decoded by a microprogram which is stored in CU.
Microprogram implementation requires more number of transistors to be integrated on the
chip.
Decoding of instructions using microprogram in CISC slows down execution.
Features of RISC
Traditionally RISC implementation is becoming popular since 1990s.
Fixed instruction size. For eg. in AVR MCU which is a RISC processor, almost all
instructions are 2-bytes in length with only a few 4-byte instructions.
Large number of internal registers in the CPU. For eg. AVR MCU has 32 internal
registers.
Because of large number of internal registers, usage of stack to store data may not
be essential as in CISC.
Smaller and simpler instruction set. Typically instruction set may have less than
200 instructions.
For a given task, assembly language programming of RISC machines generally
requires more effort as compared to CISC processors.
Due to the reason mentioned above, it is more convenient to program RISC
processors using higher level languages like C or C++.
Fixed instruction cycle time for most of the instructions.
Many modern RISC processors adopt Harvard architecture to speed up program
execution.
Generally, in RISC it is not possible to perform arithmetic and logical operations on
data present in the memory directly without bringing it into a register inside the
CPU.
In RISC, instruction decoding in CU is done using hardware and not by using a
microprogram to speed up instruction execution.
