Design of CS Amplifier
With Current Mirror Load
A Problem Based Learning in ECEE 403: Introduction to Analog Design
Charlene R. Cale Analyn Fetalvero
Batangas State University Main Campus II Batangas State University Main Campus II
email:
[email protected] email:
[email protected] Abstract – This paper contains a design of CS widths, 0.1 increments from the
Amplifier with Current Mirror Load, its design flow, minimum width should be used. For the
analysis and computations and simulations using bias current, an ideal source with value
Cadence. limited to 3 significant digits only.
I. INTRODUCTION III. DESIGN FLOW
What is amplifier?
Nmos and pmos? The flow chart below describes the
Common Source Amplifier? step by step process the designers have done
Current Mirror Load? as well as the important parameters
considered in the design.
II. CIRCUIT SPECIFICATIONS
The researchers were tasked to design a
PMOS common-source amplifier with
High light the parameters
the specification listed in the table
below. They are to determine the size of considered in the design in
each device and bias the current each step
required. The gain, bandwidth and
output swing should be verified using
simulations.
Parameter Specification IV. CIRCUIT DESIGN
Gain Av At least 20,
maximum of 30
Transconductance 200 µS (±2.5%)
Vo Swing 300mVp-p
centered at
500Mv
Power Minimum @
VDD = 1.0V
VI,Q Choose with
300mV to
600mV
Nmos1v and pmos 1v transistors
will be used. For devices lengths below,
they are allowed to use lengths of
100nm, 180nm, 250nm, 350nm and
500nm. Beyond 1um, lengths should
have an ncrement of 0.1um. For device
For NMOS
V. SIMULATIONS
Gain, Bandwidth, Output Swing
VI. ANALYSES AND COMPUTATIONS
Equation for effective transconductance
of a CS Amplifier
𝜕𝐼𝐷 2𝐼𝐷
𝑔𝑚 = =
𝜕𝑉𝐺𝑆 𝑉𝐺𝑆 − 𝑉𝑇𝐻
L? w?
Equation for gain
Output impedance to achieve the gain?
L to achieve the required output
impedance
L of the required NMOS current mirrors to
achieve the required gain
VII. CONCLUSIONS
VIII. RECOMMENDATIONS