PDH/SDH

PDH
Plesiochronous Digital Hierarchy (PDH), which was developed in the 1950s and 1960s and
brought into use worldwide in the 1970s, is the predominant multiplexing technique today.
The main objective was to digitalize communication networks that had previously carried
analog voice communication. The voice coding was based on sampling at 8000 Hz with 256
quantization levels (8bit) resulting in 64 kb/s per traffic channel.
Frequencies 300 to 3400 Hz was considered to be sufficient for good voice quality. According to
the sampling theorem frequencies up to half of the sampling frequency can be reconstructed,
that is 8 kHz sampling supports up to 4 kHz signal ideally.
The European plesiochronous hierarchy is based on a 2048 kbps digital signal which may come
from a PCM30 system, a digital exchange, or from any other device, in accordance with the
interface standard (ITU-T recommendation G.703). In the frame time slot zero (TS0) is reserved
for frame synchronization (ITUT recommendation G.704) and in PSTN networks TS16 is
reserved for channel associated signaling (CAS).

PDH Multiplexing Scheme

The name plesiochronous refers to the network synchronization, in which nodes are allowed to
be synchronized by standalone clocks with an accuracy of 50 ppm. In the case of two channels,
one at 2.048 kbps and one at 2047.95 kbps, the slow channel has additional justification bits,
while the other remains at 2.048 kbps. This procedure allows successful bit interleaving of
several channels to produce a single higher-rate channel at the multiplexer output. Control bits
are used to inform the receiver whether or not the corresponding justification bit is used.
PDH multiplexing is achieved over a number of hierarchical levels, for example, first order,
second order and so on. In the European PDH each level is created by bit interleaved
multiplexing of 4 lower order channel except for 1st level.

PDH standards evolved independently in Europe, North America and Japan. The multiplying
factor for the bit rates is greater than four, as additional bits for pulse frame generation and
other additional information are inserted for each hierarchy level. The plesiochronous hierarchy
used in North America and Japan is based on a 1544 kbps digital signal (24 Timeslots).
To summarize PDH the main problem areas are:

• Expensive, bit interleaved and asynchronous multiplexing.

• Limited network management and maintenance support capabilities.
• Different standards used in different parts of the world
• Inflexible in terms of expansion and higher bandwidth.

SDH
Synchronous Digital Hierarchy (SDH) is replacing the older PDH systems. PDH systems have
been the mainstay of telephony switching and require significant space to accommodate them.
The advantages of higher bandwidth, greater flexibility and scalability make SDH ideal system
for ATM networks. SDH forms the basic bit delivery systems of the
Broadband Integrated Services Digital Network (B-ISDN), and hence for Asynchronous Transfer
Mode (ATM). These transmission systems were designed as add-drop multiplexer systems for
operators, and the SDH line format contains significant management bytes to monitor line
quality and usage.
The history behind SDH starts with SONET. Initially, the objective of SONET standards work was
to establish a North American standard that would permit interworking of equipment from
multiple vendors. This took place between 1985 and 1987. Subsequently, the CCITT body was
approached with the goal of migrating this proposal to a worldwide standard. Despite the
considerable difficulties arising from the historical differences between the North American and
European digital hierarchies, this goal was achieved in 1988 with the adoption of the SDH
standards. In SDH, a general structure is defined to facilitate transport of tributary signals.
While there are commonalities between SDH and SONET, particularly at the higher rates, there
are significant differences at the lower multiplexing levels. These differences exist in order to
accommodate the requirement of interworking the differing regional digital hierarchies. Like
SONET, SDH uses a layered structure that facilitates the transport of a wide range of tributaries,
and streamlines operations.
The smallest SDH building block is an STM-1 frame, where STM is acronym of synchronous
transport module. SDH frames and SONET frames are similar in concept. STM-1 is a specific
sequence of 2430 bytes, which again includes various overhead bytes and payload. With the
same frame repetition rate as PDH (125 microseconds or 8000 frames per second), STM-1 has a
bit rate of 155.5 Mbps. Next hierarchy is STM-4, which has exactly 4 times more bytes than
STM-1 in a frame. The resulting bit rate is 622 Mb/s. The following hierarchies are STM-16 and
STM- 64 that corresponds to 2.5 Gb/s and 10 Gb/s, respectively.
SDH is a byte-synchronous multiplexing system. However SDH also has to support the transport
of plesiochronous data streams, primarily so that providers can continue to support their legacy
circuits as they install an SDH backbone system. Controlling and keeping track of the variable bit
rate data within a constant bit rate frame requires a relatively large overhead of control bytes.

The number of PDH channels that can be multiplexed into SDH is shown in
Figure 4-6. Note that one 140 Mb/s equals 64 times 2 Mb/s. Multiplexing 2 Mb/s PDH channels
directly into SDH allows 63 times 2 Mb/s. In the latter case any 2 Mb/s can easily be extracted
out of the STM-1 without the need of complicated demultiplexing.
The procedure to transport a PDH channel in SDH can be divided into four steps.

First a container is created that can handle PDH channels running at different synchronization
clocks.
Second step is to add a path overhead. Path overhead provides for communication between
the point of creation of a frame and its point of disassembly. This overhead supports functions
such as performance monitoring, signal label, path status and path trace.

TU is the term for the SONET version (American standard) and AU for SDH standard (EU
standard) The virtual container is allowed to float within a tributary unit or a administrative unit
by adding a pointer that shows where in the payload the virtual container starts. This allows the
possibility to extract or insert individual circuit.
The last step is multiplexing. The figure above shows the different steps to multiplex PDH into
SDH depending on the order.

Figure 4-11 gives an example of a 2 Mb/s PDH multiplexed into STM-1

The STM-1 frame consists of overhead plus payload. The first nine columns of the STM-1 frame
are for the transport overhead. The three columns contain 9 bytes each. The remaining 261
columns constitute the payload capacity. The frame of STM-N can be depicted as an Nx270-
column by 9-row structure.
For communication between SDH network nodes the section overhead is used (SOH). The SOH
is overhead accessed, generated, and processed by section terminating equipment.
This overhead supports functions such as performance monitoring, local orderwire, data
communication channels to carry information for OAM&P and framing. Section terminating
equipment might be two regenerators, line terminating equipment (multiplexers) and a
regenerator, or two sets of line terminating equipment. The notation is RSOH and MSOH
(regenerator / multiplexer) is used.
The flexible floating of virtual containers enabled by pointers is
visualized in Figure 4-13.

The order of transmission of bytes is row-by-row from top to bottom and from left to right
(most significant bit first). The STM-1 transmission rate can be calculated as follows:
270 x 9 (bytes per frame) x 8 (bits per byte) x 8000 (frames per second) = 51,840,000 bps =
155.5 Mbps. The calculation of STM-4 and STM-16 is visualized in .
Thus, the corresponding bit rate for STM-N is exactly N times the bit rate for STM-1. The STM-N
frame are drawn using 9 rows. The length of both SOH and payload changes.

SDH advantages
• Worldwide standard
• Cost efficient and flexible networking
• Built in capacity for advanced network management and maintenance capabilities
• Simplified multiplexing and demultiplexing
• Low rate tributaries visible within the high speed signal. Enables direct access to these signals.
Ability to transport existing digital hierarchies and future signals, e.g. ATM
• Cost efficient allocation of bandwidth
• Fault isolation and management
• Future proof
• Byte interleaved multiplexing and demultiplexing

Physical and Logical network

The physical layer consists of sections according to Figure 4-17 that are divided into multiplexer
sections and regenerator sections, depending on the type of terminating node. The logical layer
is divided into Higher Order Path and Lower Order Path that define paths for VC of high and low
order, respectively.
One main difference between the physical and logical network is that the former is already
modified manually on-site while the logical network is always modified by management system
or signaling.

The physical network nodes are crossconnects (DXC), Add- Drop multiplexers (ADM) and
terminal multiplexers (TM) as shown in Figure 4-18.

The difference between the logical and physical network is further visualized in Figure 4-19.