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LM2940-N, LM2940C
SNVS769J – MARCH 2000 – REVISED DECEMBER 2014

LM2940x 1-A Low Dropout Regulator

1 Features 3 Description
•
1 Input Voltage Range = 6 V to 26 V The LM2940-N and LM2940C positive voltage
regulators feature the ability to source 1 A of output
• Dropout Voltage Typically 0.5 V at IOUT = 1 A current with a dropout voltage of typically 0.5 V and a
• Output Current in Excess of 1 A maximum of 1 V over the entire temperature range.
• Output Voltage Trimmed Before Assembly Furthermore, a quiescent current reduction circuit has
• Reverse Battery Protection been included which reduces the ground current
when the differential between the input voltage and
• Internal Short Circuit Current Limit the output voltage exceeds approximately 3 V. The
• Mirror Image Insertion Protection quiescent current with 1 A of output current and an
• P+ Product Enhancement Tested input-output differential of 5 V is therefore only 30
mA. Higher quiescent currents only exist when the
regulator is in the dropout mode (VIN − VOUT ≤ 3 V).
2 Applications
• Post Regulator for Switching Supplies Designed also for vehicular applications, the LM2940-
N and LM2940C and all regulated circuitry are
• Logic Power Supplies protected from reverse battery installations or 2-
• Industrial Instrumentation battery jumps. During line transients, such as load
space dump when the input voltage can momentarily
exceed the specified maximum operating voltage, the
space regulator will automatically shut down to protect both
space the internal circuits and the load. The LM2940-N and
LM2940C cannot be harmed by temporary mirror-
image insertion. Familiar regulator features such as
short circuit and thermal overload protection are also
provided.

Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
SOT-223 (4) 6.50 mm x 3.50 mm
WSON (8) 4.00 mm x 4.00 mm
LM2940-N
TO-263 (3) 10.18 mm x 8.41 mm
TO-220 (3) 14.986 mm x 10.16 mm
TO-263 (3) 10.18 mm x 8.41 mm
LM2940C
TO-220 (3) 14.986 mm x 10.16 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.

Simplified Schematic

VIN VOUT
Unregulated Input
IN LM2940 OUT
Regulated Output

C1*
+ COUT**
0.47 µF 22 µF
IQ

*Required if regulator is located far from power supply filter.

**COUT must be at least 22 μF to maintain stability. May be increased without bound to maintain regulation during
transients. Locate as close as possible to the regulator. This capacitor must be rated over the same operating
temperature range as the regulator and the ESR is critical; see curve.
1

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 www.ti.com

Table of Contents
1 Features .................................................................. 1 7.3 Feature Description................................................. 13
2 Applications ........................................................... 1 7.4 Device Functional Modes........................................ 14
3 Description ............................................................. 1 8 Application and Implementation ........................ 15
4 Revision History..................................................... 2 8.1 Application Information............................................ 15
8.2 Typical Application .................................................. 15
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4 9 Power Supply Recommendations...................... 17
6.1 Absolute Maximum Ratings ...................................... 4 10 Layout................................................................... 17
6.2 ESD Ratings.............................................................. 4 10.1 Layout Guidelines ................................................. 17
6.3 Recommended Operating Conditions....................... 4 10.2 Layout Examples................................................... 17
6.4 Thermal Information .................................................. 5 10.3 Heatsinking ........................................................... 18
6.5 Electrical Characteristics (5 V and 8 V) .................... 5 11 Device and Documentation Support ................. 20
6.6 Electrical Characteristics (9 V and 10 V) .................. 6 11.1 Documentation Support ........................................ 20
6.7 Electrical Characteristics (12 V and 15 V) ................ 7 11.2 Related Links ........................................................ 20
6.8 Typical Characteristics .............................................. 8 11.3 Trademarks ........................................................... 20
7 Detailed Description ............................................ 13 11.4 Electrostatic Discharge Caution ............................ 20
7.1 Overview ................................................................. 13 11.5 Glossary ................................................................ 20
7.2 Functional Block Diagram ....................................... 13 12 Mechanical, Packaging, and Orderable
Information ........................................................... 20

4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision I (April 2013) to Revision J Page

• Added Pin Configuration and Functions section, ESD Rating table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
• Deleted information re: obsolete CDIP and CLGA package options ; Change pin names from Vin, Vout to IN, OUT;
delete Heatsinking sections re: packages apart from TO-220 ............................................................................................... 1
• Changed symbols for Thermal Information ......................................................................................................................... 19

Changes from Revision H (April 2013) to Revision I Page

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5 Pin Configuration and Functions

DDPAK/TO-263 (KTT) Package DDPAK/TO-263 ( KTT) Package

3 Pins Side View
Top View

WSON (NGN) Package

8 Pins
Top View

TO-220 (NDE) Package

4 Pins N/C 1 8 N/C
Front View
GND 2 7 GND
GND
IN 3 6 OUT

N/C 4 5 OUT
SOT-223 (DCY) Package
3 Pins
Front View Pin 2 and pin 7 are fused to center DAP
Pin 5 and 6 need to be tied together on
PCB board

Pin Functions
PIN
I/O DESCRIPTION
NAME NDE KTT DCY NGN
IN 1 1 1 3 I Unregulated input voltage.
GND 2 2 2 2 — Ground
Regulated output voltage. This pin requires an output capacitor to
OUT 3 3 3 5, 6 O maintain stability. See Detailed Design Procedure for output
capacitor details.
GND 4 4 4 7 — Ground
N/C — — — 1, 4, 8 — No connection

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6 Specifications
6.1 Absolute Maximum Ratings (1) (2)
MIN MAX UNIT
LM2940-N KTT, NDE, DCY ≤ 100 ms 60
V
LM2940C KTT, NDE ≤ 1 ms 45
Internally
Internal power dissipation (3)
Limited
Maximum junction temperature 150
TO-220 (NDE), Wave (10 s) 260
Soldering DDPAK/TO-263 (KTT) (30 s) 235
temperature (4) °C
SOT-223 (DCY) (30 s) 260
WSON-8 (NGN) (30 s) 235
Storage temperature, Tstg −65 150

(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Recommended Operating Conditions are
conditions under which the device functions but the specifications might not be ensured. For ensured specifications and test conditions
see the Electrical Characteristics (5 V and 8 V).
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) The maximum allowable power dissipation is a function of the maximum junction temperature, TJ, the junction-to-ambient thermal
resistance, RθJA, and the ambient temperature, TA. Exceeding the maximum allowable power dissipation will cause excessive die
temperature, and the regulator will go into thermal shutdown. The value of R θJA (for devices in still air with no heatsink) is 23.3°C/W for
the TO-220 package, 40.9°C/W for the DDPAK/TO-263 package, and 59.3°C/W for the SOT-223 package. The effective value of RθJA
can be reduced by using a heatsink (see Heatsinking for specific information on heatsinking). The value of RθJA for the WSON package
is specifically dependent on PCB trace area, trace material, and the number of layers and thermal vias. For improved thermal resistance
and power dissipation for the WSON package, refer to Application Note AN-1187 Leadless Leadframe Package (LLP) (SNOA401). It is
recommended that 6 vias be placed under the center pad to improve thermal performance.
(4) Refer to JEDEC J-STD-020C for surface mount device (SMD) package reflow profiles and conditions. Unless otherwise stated, the
temperature and time are for Sn-Pb (STD) only.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±2000 V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Input voltage 6 26 V
LM2940-N NDE, LM2940-N KTT −40 125
Temperature LM2940C NDE, LM2940C KTT 0 125
°C
LM2940-N DCY −40 85
LM2940-N NGN −40 125

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6.4 Thermal Information

LM2940-N, LM2940C LM2940-N
(1) TO-220 DDPAK/TO-263 SOT-223 WSON
THERMAL METRIC UNIT
(NDE) (KTT) (DCY) (NGN)
3 PINS 3 PINS 4 PINS 8 PINS
(2)
RθJA Junction-to-ambient thermal resistance 23.3 40.9 59.3 40.5
RθJC(top) Junction-to-case (top) thermal resistance 16.1 43.5 38.9 26.2
RθJB Junction-to-board thermal resistance 4.8 23.5 8.1 17.0
°C/W
ψJT Junction-to-top characterization parameter 2.7 10.3 1.7 0.2
ψJB Junction-to-board characterization parameter 4.8 22.5 8.0 17.2
RθJC(bot) Junction-to-case (bottom) thermal resistance 1.1 0.8 n/a 3.2

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) Thermal information for the TO-220 package is for a package vertically mounted with a heat sink in the middle of a PCB which is
compliant to the JEDEC HIGH-K 2s2p (JESD51-7). The heatsink-to-ambient thermal resistance, RƟSA, is 21.7°C/W. See Heatsinking
TO-220 Package Parts for more information.

6.5 Electrical Characteristics (5 V and 8 V)

Unless otherwise specified: VIN = VOUT + 5 V, IOUT = 1 A and COUT = 22 µF. MIN (minimum) and MAX (maximum) limits apply
over the recommended operating temperature range, unless otherwise noted; typical limits apply for TA = TJ = 25°C.
5V 8V
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX MIN TYP MAX
Input voltage 5 mA ≤ IOUT ≤ 1 A 6.25 26 9.4 26
5 mA ≤ IOUT ≤ 1A 4.75 5 5.25 7.6 8 8.4 V
Output voltage
5 mA ≤ IOUT ≤ 1A, TJ = 25°C 4.85 5 5.15 7.76 8 8.24
VOUT + 2 V ≤ VIN ≤ 26 V, IOUT = 5 mA
Line regulation 20 50 20 80 mV
TJ = 25°C
50 mA ≤ IOUT ≤ 1 A LM2940-N 35 80 55 130
Load regulation 50 mA ≤ IOUT ≤ 1 A LM2940-N 35 50 55 80 mV
TJ = 25°C LM2940C 35 50 55 80
Output 100 mADC, 20 mArms, ƒOUT = 120 Hz
35 55 mΩ
impedance
VOUT + 2 V ≤ VIN ≤ 26 V, LM2940-N
10 20 10 20
IOUT = 5 mA
VOUT + 2 V ≤ VIN ≤ 26 V, LM2940-N 10 15 10 15
IOUT = 5 mA
Quiescent current TJ = 25°C LM2940C 10 15 mA
VIN = VOUT + 5 V, IOUT = 1 A 30 60 30 60
VIN = VOUT + 5 V, IOUT = 1 A
30 45 30 45
TJ = 25°C
Output noise
10 Hz to 100 kHz, IOUT = 5 mA 150 240 µVrms
voltage
ƒOUT = 120 Hz, 1 Vrms, IOUT = LM2940-N 54 72 48 66
100 mA
Ripple rejection ƒOUT = 120 Hz, 1 Vrms, IOUT = LM2940-N 60 72 54 66 dB
100 mA
TJ = 25°C LM2940C 60 72 54 66
Long-term mV/1000
20 32
stability Hr
IOUT = 1A 0.5 1 0.5 1
V
IOUT = 1A, TJ = 25°C 0.5 0.8 0.5 0.8
Dropout voltage
IOUT = 100 mA 110 200 110 200
mV
IOUT = 100 mA, TJ = 25°C 110 150 110 150

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Electrical Characteristics (5 V and 8 V) (continued)

Unless otherwise specified: VIN = VOUT + 5 V, IOUT = 1 A and COUT = 22 µF. MIN (minimum) and MAX (maximum) limits apply
over the recommended operating temperature range, unless otherwise noted; typical limits apply for TA = TJ = 25°C.
5V 8V
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX MIN TYP MAX
Short-circuit
See (1), TJ = 25°C 1.6 1.9 1.6 1.9 A
current
ROUT = 100Ω, T ≤ 100 ms LM2940-N 60 75 60 75
Maximum line
ROUT = 100Ω, T ≤ 1 ms V
transient LM2940C 45 55 45 555
TJ = 25°C
ROUT = 100 Ω LM2940-N –15 –30 –15 –30
Reverse polarity
ROUT = 100 Ω V
DC input voltage LM2940C –15 –30 –15 –30
TJ = 25°C
Reverse polarity ROUT = 100 Ω, T ≤ 100 ms LM2940-N –50 –75 –50 –75
Transient Input V
ROUT = 100 Ω, T ≤ 1 ms LM2940C –45 –55
Voltage

(1) Output current will decrease with increasing temperature but will not drop below 1 A at the maximum specified temperature.

6.6 Electrical Characteristics (9 V and 10 V)

Unless otherwise specified: VIN = VOUT + 5 V, IOUT = 1 A and COUT = 22 µF. MIN (minimum) and MAX (maximum) limits apply
over the recommended operating temperature range, unless otherwise noted; typical limits apply for TA = TJ = 25°C.
9V 10 V
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX MIN TYP MAX
Input voltage 5 mA ≤ IOUT ≤ 1 A 10.5 26 11.5 26
5 mA ≤ IOUT ≤ 1A 8.55 9 9.45 9.5 10 10.5 V
Output voltage
5 mA ≤ IOUT ≤ 1A, TJ = 25°C 8.73 9 9.27 9.7 10 10.3
VOUT + 2 V ≤ VIN ≤ 26 V, IOUT = 5 mA
Line regulation 20 90 20 100 mV
TJ = 25°C
50 mA ≤ IOUT ≤ 1 A LM2940-N 60 150 65 165
Load regulation 50 mA ≤ IOUT ≤ 1 A LM2940-N 60 90 65 100 mV
TJ = 25°C
LM2940C 60 90
Output 100 mADC, 20 mArms, ƒOUT = 120 Hz
60 65 mΩ
impedance
VOUT + 2 V ≤ VIN ≤ 26 V, LM2940-N
10 20 10 20
IOUT = 5 mA
VOUT + 2 V ≤ VIN ≤ 26 V, LM2940-N 10 15 15
IOUT = 5 mA
Quiescent current TJ = 25°C LM2940C 10 15 mA
VIN = VOUT + 5 V, IOUT = 1 A 30 60 30 60
VIN = VOUT + 5 V, IOUT = 1 A
30 45 30 45
TJ = 25°C
Output noise 10 Hz to 100 kHz, IOUT = 5 mA
270 300 µVrms
voltage
ƒOUT = 120 Hz, 1 Vrms
LM2940-N 46 64 45 63
IOUT = 100 mA
Ripple rejection ƒOUT = 120 Hz, 1 Vrms LM2940-N 52 64 51 63 dB
IOUT = 100 mA
TJ = 25°C LM2940C 52 64
Long-term mV/1000
34 36
stability Hr
IOUT = 1A 0.5 1 0.5 1
V
IOUT = 1A, TJ = 25°C 0.5 0.8 0.5 0.8
Dropout voltage
IOUT = 100 mA 110 200 110 200
mV
IOUT = 100 mA, TJ = 25°C 110 150 110 150

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Electrical Characteristics (9 V and 10 V) (continued)

Unless otherwise specified: VIN = VOUT + 5 V, IOUT = 1 A and COUT = 22 µF. MIN (minimum) and MAX (maximum) limits apply
over the recommended operating temperature range, unless otherwise noted; typical limits apply for TA = TJ = 25°C.
9V 10 V
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX MIN TYP MAX
Short-circuit
See (1), TJ = 25°C 1.6 1.9 1.6 1.9 A
current
ROUT = 100Ω, T ≤ 100 ms LM2940-N 60 75 60 75
Maximum line
ROUT = 100Ω, T ≤ 100 ms V
transient LM2940C 45 55
TJ = 25°C
ROUT = 100 Ω LM2940-N –15 –30 –15 –30
Reverse polarity
ROUT = 100 Ω –15 –30 V
DC input voltage LM2940C
TJ = 25°C
Reverse polarity LM2940-N –50 –75 –50 –75
Transient Input ROUT = 100 Ω, T ≤ 100 ms V
Voltage LM2940C –45 –55

(1) Output current will decrease with increasing temperature but will not drop below 1 A at the maximum specified temperature.

6.7 Electrical Characteristics (12 V and 15 V)

Unless otherwise specified: VIN = VOUT + 5 V, IOUT = 1 A and COUT = 22 µF. MIN (minimum) and MAX (maximum) limits apply
over the recommended operating temperature range, unless otherwise noted; typical limits apply for TA = TJ = 25°C.
12 V 15 V
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX MIN TYP MAX
Input voltage 5 mA ≤ IOUT ≤ 1 A 13.6 26 16.75 26
5 mA ≤ IOUT ≤ 1A 11.40 12 12.6 14.25 15 15.75 V
Output voltage
5 mA ≤ IOUT ≤ 1A, TJ = 25°C 11.64 12 12.36 14.55 15 15.45
VOUT + 2 V ≤ VIN ≤ 26 V, IOUT = 5 mA
Line regulation 20 120 20 150 mV
TJ = 25°C
50 mA ≤ IOUT ≤ 1 A LM2940-N 55 200
Load regulation 50 mA ≤ IOUT ≤ 1 A LM2940-N 55 120 mV
TJ = 25°C
LM2940C 55 120 70 150
Output 100 mADC, 20 mArms, ƒOUT = 120 Hz
80 100 mΩ
impedance
VOUT + 2 V ≤ VIN ≤ 26 V, LM2940-N
10 20
IOUT = 5 mA
VOUT + 2 V ≤ VIN ≤ 26 V, LM2940-N 10 15
IOUT = 5 mA
Quiescent current TJ = 25°C LM2940C 10 15 10 15 mA
VIN = VOUT + 5 V, IOUT = 1 A 30 60 30 60
VIN = VOUT + 5 V, IOUT = 1 A
30 45 30 45
TJ = 25°C
Output noise 10 Hz to 100 kHz, IOUT = 5 mA
360 450 µVrms
voltage
ƒOUT = 120 Hz, 1 Vrms, IOUT = LM2940-N 48 66
100 mA
Ripple rejection ƒOUT = 120 Hz, 1 Vrms, IOUT = LM2940-N 54 66 dB
100 mA
TJ = 25°C LM2940C 54 66 52 64
Long-term mV/1000
48 60
stability Hr
IOUT = 1A 0.5 1 0.5 1
V
IOUT = 1A, TJ = 25°C 0.5 0.8 0.5 0.8
Dropout voltage
IOUT = 100 mA 110 200 110 200
mV
IOUT = 100 mA, TJ = 25°C 110 150 110 150

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Electrical Characteristics (12 V and 15 V) (continued)

Unless otherwise specified: VIN = VOUT + 5 V, IOUT = 1 A and COUT = 22 µF. MIN (minimum) and MAX (maximum) limits apply
over the recommended operating temperature range, unless otherwise noted; typical limits apply for TA = TJ = 25°C.
12 V 15 V
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX MIN TYP MAX
Short-circuit
See (1), TJ = 25°C 1.6 1.9 1.6 1.9 A
current
ROUT = 100Ω, T ≤ 100 ms LM2940-N 60 75
Maximum line
ROUT = 100Ω, T ≤ 100 ms V
transient LM2940C 45 55 45 55
TJ = 25°C
ROUT = 100 Ω LM2940-N –15 –30
Reverse polarity
ROUT = 100 Ω V
DC input voltage LM2940C –15 –30 –15 –30
TJ = 25°C
Reverse polarity ROUT = 100 Ω, T ≤ 100 ms LM2940-N –50 –75
transient input V
ROUT = 100 Ω, T ≤ 1 ms LM2940C –45 –55 –45 –55
voltage

(1) Output current will decrease with increasing temperature but will not drop below 1 A at the maximum specified temperature.

6.8 Typical Characteristics

Figure 1. Dropout Voltage Figure 2. Dropout Voltage vs. Temperature

Figure 3. Output Voltage vs. Temperature Figure 4. Quiescent Current vs. Temperature

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Typical Characteristics (continued)

Figure 5. Quiescent Current Figure 6. Quiescent Current

Figure 7. Line Transient Response Figure 8. Load Transient Response

Figure 9. Ripple Rejection Figure 10. Low Voltage Behavior

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Typical Characteristics (continued)

Figure 11. Low Voltage Behavior Figure 12. Low Voltage Behavior

Figure 13. Low Voltage Behavior Figure 14. Low Voltage Behavior

Figure 15. Output at Voltage Extremes Figure 16. Output at Voltage Extremes

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Typical Characteristics (continued)

Figure 17. Output at Voltage Extremes Figure 18. Output at Voltage Extremes

Figure 19. Output at Voltage Extremes Figure 20. Output Capacitor ESR

Figure 21. Peak Output Current Figure 22. Output Impedance

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Typical Characteristics (continued)

Figure 23. Maximum Power Dissipation (TO-220) Figure 24. Maximum Power Dissipation (SOT-223)

Figure 25. Maximum Power Dissipation (DDPAK/TO-263)

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7 Detailed Description

7.1 Overview
The LM2940 positive voltage regulator features the ability to source 1 A of output current with a dropout voltage
of typically 0.5 V and a maximum of 1 V over the entire temperature range. Furthermore, a quiescent current
reduction circuit has been included which reduces the ground current when the differential between the input
voltage and the output voltage exceeds approximately 3 V. The quiescent current with 1 A of output current and
an input-output differential of 5 V is therefore only 30 mA. Higher quiescent currents only exist when the regulator
is in the dropout mode (VIN – VOUT ≤ 3 V).

7.2 Functional Block Diagram

IN OUT
PNP

OVSD Current Thermal

(§30 V) Limit Shutdown

+
Bandgap
Reference

GND

7.3 Feature Description

7.3.1 Short-Circuit Current Limit
The internal current limit circuit is used to protect the LDO against high-load current faults or shorting events. The
LDO is not designed to operate in a steady-state current limit. During a current-limit event, the LDO sources
constant current. Therefore, the output voltage falls when load impedance decreases. Note, also, that if a current
limit occurs and the resulting output voltage is low, excessive power may be dissipated across the LDO, resulting
a thermal shutdown of the output.

7.3.2 Overvoltage Shutdown (OVSD)

Input voltage greater than typically 30 V will cause the LM2940 output to be disabled. When operating with the
input voltage greater than the maximum recommended input voltage of 26 V, the device performance is not
ensured. Continuous operation with the input voltage greater than the maximum recommended input voltage is
discouraged.

7.3.3 Thermal Shutdown (TSD)

The LM2940 contains the thermal shutdown circuitry to turn off the output when excessive heat is dissipated in
the LDO. The internal protection circuitry of the LM2940 is designed to protect against thermal overload
conditions. The TSD circuitry is not intended to replace proper heat sinking. Continuously running the device into
thermal shutdown degrades its reliability as the junction temperature will be exceeding the absolute maximum
junction temperature rating.

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7.4 Device Functional Modes

7.4.1 Operation with Enable Control
The LM2940 design does not include any undervoltage lockout (UVLO), or enable functions. Generally, the
output voltage will track the input voltage until the input voltage is greater than VOUT + 1V. When the input
voltage is greater than VOUT + 1 V, the LM2940 will be in linear operation, and the output voltage will be
regulated. However, the device will be sensitive to any small perturbation of the input voltage. Device dynamic
performance is improved when the input voltage is at least 2 V greater than the output voltage.

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8 Application and Implementation

NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.

8.1 Application Information

The LM2940-N and LM2940C positive voltage regulators feature the ability to source 1 A of output current with a
dropout voltage of typically 0.5 V and a maximum of 1 V over the entire temperature range. The output capacitor,
COUT, must have a capacitance value of at least 22 µF with an ESR of at least 100 mΩ, but no more than 1 Ω.
The minimum capacitance value and the ESR requirements apply across the entire expected operating ambient
temperature range.

8.2 Typical Application

VIN VOUT
Unregulated Input
IN LM2940 OUT
Regulated Output

C1*
+ COUT**
0.47 µF 22 µF
IQ

*Required if regulator is located far from power supply filter.

**COUT must be at least 22 μF to maintain stability. May be increased without bound to maintain regulation during
transients. Locate as close as possible to the regulator. This capacitor must be rated over the same operating
temperature range as the regulator and the ESR is critical; see curve.

Figure 26. Typical Application

8.2.1 Design Requirements

Table 1. Design Parameters

DESIGN PARAMETER EXAMPLE VALUE
Input voltage range 6 V to 26 V
Output voltage range 8V
Output current range 5 mA to 1 A
Input capacitor value 0.47 µF
Output capacitor value 22 µF minimum
Output capacitor ESR range 100 mΩ to 1 Ω

8.2.2 Detailed Design Procedure

8.2.2.1 External Capacitors

The output capacitor is critical to maintaining regulator stability, and must meet the required conditions for both
equivalent series resistance (ESR) and minimum amount of capacitance.

8.2.2.1.1 Minimum Capacitance

The minimum output capacitance required to maintain stability is 22 μF (this value may be increased without
limit). Larger values of output capacitance will give improved transient response.

Copyright © 2000–2014, Texas Instruments Incorporated Submit Documentation Feedback 15

Product Folder Links: LM2940-N LM2940C
LM2940-N, LM2940C
SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 www.ti.com

8.2.2.1.2 ESR Limits

The ESR of the output capacitor will cause loop instability if it is too high or too low. The acceptable range of
ESR plotted versus load current is shown in the graph below. It is essential that the output capacitor meet these
requirements, or oscillations can result.

Figure 27. Output Capacitor ESR Limits

It is important to note that for most capacitors, ESR is specified only at room temperature. However, the designer
must ensure that the ESR will stay inside the limits shown over the entire operating temperature range for the
design.
For aluminum electrolytic capacitors, ESR will increase by about 30X as the temperature is reduced from 25°C to
−40°C. This type of capacitor is not well-suited for low temperature operation.
Solid tantalum capacitors have a more stable ESR over temperature, but are more expensive than aluminum
electrolytics. A cost-effective approach sometimes used is to parallel an aluminum electrolytic with a solid
tantalum, with the total capacitance split about 75/25% with the aluminum being the larger value.
If two capacitors are paralleled, the effective ESR is the parallel of the two individual values. The flatter ESR of
the tantalum will keep the effective ESR from rising as quickly at low temperatures.

8.2.3 Application Curves

Figure 28. Low Voltage Behavior Figure 29. Output at Voltage Extremes

16 Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated

Product Folder Links: LM2940-N LM2940C

 LM2940-N, LM2940C
www.ti.com SNVS769J – MARCH 2000 – REVISED DECEMBER 2014

9 Power Supply Recommendations

The device is designed to operate from an input voltage supply range between VOUT + 1 V up to a maximum of
26 V. This input supply must be well regulated and free of spurious noise. To ensure that the LM2940 output
voltage is well regulated, the input supply should be at least VOUT + 2 V.

10 Layout

10.1 Layout Guidelines

The dynamic performance of the LM2940 is dependent on the layout of the PCB. PCB layout practices that are
adequate for typical LDOs may degrade the PSRR, noise, or transient performance of the LM2940. Best
performance is achieved by placing CIN and COUT on the same side of the PCB as the LM2940, and as close as
is practical to the package. The ground connections for CIN and COUT should be back to the LM2940 ground pin
using as wide and short of a copper trace as is practical.

10.2 Layout Examples

Ground
1 5

2 6
CIN GND COUT
VIN 3 7

4 8
VOUT

Figure 30. LM2940 WSON Layout

CIN COUT
1

VIN VOUT

Ground

Figure 31. LM2940 SOT-223 Layout

CIN COUT

1 2 3
VIN VOUT

Ground

Figure 32. TO-263 Layout

Copyright © 2000–2014, Texas Instruments Incorporated Submit Documentation Feedback 17

Product Folder Links: LM2940-N LM2940C
LM2940-N, LM2940C
SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 www.ti.com

10.3 Heatsinking
A heatsink may be required depending on the maximum power dissipation and maximum ambient temperature of
the application. Under all possible operating conditions, the junction temperature must be within the range
specified under Absolute Maximum Ratings (1) (2).
To determine if a heatsink is required, the power dissipated by the regulator, PD, must be calculated.
Figure 33 shows the voltages and currents which are present in the circuit, as well as the formula for calculating
the power dissipated in the regulator:

IIN = IL + IG
PD = (VIN − VOUT) IL + (VIN) IG

Figure 33. Power Dissipation Diagram

The next parameter which must be calculated is the maximum allowable temperature rise, TR(MAX). This is
calculated by using the formula:
TR(MAX) = TJ(MAX) − TA(MAX)
where
• TJ(MAX) is the maximum allowable junction temperature, which is 125°C for commercial grade parts.
• TA(MAX)is the maximum ambient temperature which will be encountered in the application. (1)
Using the calculated values for TR(MAX) and PD, the maximum allowable value for the junction-to-ambient thermal
resistance, RθJA, can now be found:
RθJA = TR(MAX) / PD (2)

NOTE
If the maximum allowable value for RθJA is found to be ≥ 23.3°C/W for the TO-220
package (with a heatsink of 21.7°C/W RθSA), ≥ 40.9°C/W for the DDPAK/TO-263 package,
or ≥ 59.3°C/W for the SOT-223 package, no heatsink is needed since the package alone
will dissipate enough heat to satisfy these requirements.
If the calculated value for RθJA falls below these limits, a heatsink is required.

(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Recommended Operating Conditions are
conditions under which the device functions but the specifications might not be ensured. For ensured specifications and test conditions
see the Electrical Characteristics (5 V and 8 V).
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.

18 Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated

Product Folder Links: LM2940-N LM2940C

 LM2940-N, LM2940C
www.ti.com SNVS769J – MARCH 2000 – REVISED DECEMBER 2014

Heatsinking (continued)
10.3.1 Heatsinking TO-220 Package Parts
The TO-220 can be attached to a typical heatsink, or secured to a copper plane on a PC board.
If a manufactured heatsink is to be selected, the value of heatsink-to-ambient thermal resistance, RθSA, must first
be calculated:
RθSA = RθJA − RθCS − RθJC
where
• RθJC is defined as the thermal resistance from the junction to the surface of the case. A value of 3°C/W can be
assumed for RθJC for this calculation.
• RθCS is defined as the thermal resistance between the case and the surface of the heatsink. The value of RθCS
will vary from about 0.5°C/W to about 2.5°C/W (depending on method of attachment, insulator, etc.). If the
exact value is unknown, 2°C/W should be assumed for RθCS. (3)
When a value for RθSA is found using Equation 3, a heatsink must be selected that has a value that is less than
or equal to this number.
RθSA is specified numerically by the heatsink manufacturer in the catalog, or shown in a curve that plots
temperature rise vs power dissipation for the heatsink.

Copyright © 2000–2014, Texas Instruments Incorporated Submit Documentation Feedback 19

Product Folder Links: LM2940-N LM2940C
LM2940-N, LM2940C
SNVS769J – MARCH 2000 – REVISED DECEMBER 2014 www.ti.com

11 Device and Documentation Support

11.1 Documentation Support

11.1.1 Related Documentation
For related documentation see the following:
• Application Note AN-1028 Maximum Power Enhancement Techniques for Power Packages (SNVA036).
• Application Note AN-1187 Leadless Leadframe Package (LLP) (SNOA401).

11.2 Related Links

The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.

Table 2. Related Links

TECHNICAL TOOLS & SUPPORT &
PARTS PRODUCT FOLDER SAMPLE & BUY
DOCUMENTS SOFTWARE COMMUNITY
LM2940-N Click here Click here Click here Click here Click here
LM2940C Click here Click here Click here Click here Click here

11.3 Trademarks
All trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.

11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

20 Submit Documentation Feedback Copyright © 2000–2014, Texas Instruments Incorporated

Product Folder Links: LM2940-N LM2940C

 PACKAGE OPTION ADDENDUM

www.ti.com 26-Jul-2016

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)

LM2940C-12 MWC ACTIVE WAFERSALE YS 0 1 Green (RoHS Call TI Level-1-NA-UNLIM -40 to 85

& no Sb/Br)
LM2940CS-12 NRND DDPAK/ KTT 3 45 TBD Call TI Call TI 0 to 125 LM2940CS
TO-263 -12 P+
LM2940CS-12/NOPB ACTIVE DDPAK/ KTT 3 45 Pb-Free (RoHS CU SN Level-3-245C-168 HR 0 to 125 LM2940CS
TO-263 Exempt) -12 P+
LM2940CS-15 NRND DDPAK/ KTT 3 45 TBD Call TI Call TI 0 to 125 LM2940CS
TO-263 -15 P+
LM2940CS-15/NOPB ACTIVE DDPAK/ KTT 3 45 Pb-Free (RoHS CU SN Level-3-245C-168 HR 0 to 125 LM2940CS
TO-263 Exempt) -15 P+
LM2940CS-5.0 NRND DDPAK/ KTT 3 45 TBD Call TI Call TI 0 to 125 LM2940CS
TO-263 -5.0 P+
LM2940CS-5.0/NOPB ACTIVE DDPAK/ KTT 3 45 Pb-Free (RoHS CU SN Level-3-245C-168 HR 0 to 125 LM2940CS
TO-263 Exempt) -5.0 P+
LM2940CS-9.0/NOPB ACTIVE DDPAK/ KTT 3 45 Pb-Free (RoHS CU SN Level-3-245C-168 HR 0 to 125 LM2940CS
TO-263 Exempt) -9.0 P+
LM2940CSX-12 NRND DDPAK/ KTT 3 500 TBD Call TI Call TI 0 to 125 LM2940CS
TO-263 -12 P+
LM2940CSX-12/NOPB ACTIVE DDPAK/ KTT 3 500 Pb-Free (RoHS CU SN Level-3-245C-168 HR 0 to 125 LM2940CS
TO-263 Exempt) -12 P+
LM2940CSX-15 NRND DDPAK/ KTT 3 TBD Call TI Call TI 0 to 125 LM2940CS
TO-263 -15 P+
LM2940CSX-15/NOPB ACTIVE DDPAK/ KTT 3 500 Pb-Free (RoHS CU SN Level-3-245C-168 HR 0 to 125 LM2940CS
TO-263 Exempt) -15 P+
LM2940CSX-5.0 NRND DDPAK/ KTT 3 500 TBD Call TI Call TI 0 to 125 LM2940CS
TO-263 -5.0 P+
LM2940CSX-5.0/NOPB ACTIVE DDPAK/ KTT 3 500 Pb-Free (RoHS CU SN Level-3-245C-168 HR 0 to 125 LM2940CS
TO-263 Exempt) -5.0 P+
LM2940CSX-9.0/NOPB ACTIVE DDPAK/ KTT 3 500 Pb-Free (RoHS CU SN Level-3-245C-168 HR 0 to 125 LM2940CS
TO-263 Exempt) -9.0 P+
LM2940CT-12 NRND TO-220 NDE 3 45 TBD Call TI Call TI 0 to 125 LM2940CT
-12 P+
LM2940CT-12/NOPB ACTIVE TO-220 NDE 3 45 Green (RoHS CU SN Level-1-NA-UNLIM 0 to 125 LM2940CT
& no Sb/Br) -12 P+

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Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)

LM2940CT-15 NRND TO-220 NDE 3 45 TBD Call TI Call TI 0 to 125 LM2940CT

-15 P+
LM2940CT-15/NOPB ACTIVE TO-220 NDE 3 45 Green (RoHS CU SN Level-1-NA-UNLIM 0 to 125 LM2940CT
& no Sb/Br) -15 P+
LM2940CT-5.0 NRND TO-220 NDE 3 45 TBD Call TI Call TI 0 to 125 LM2940CT
-5.0 P+
LM2940CT-5.0/LF01 ACTIVE TO-220 NDG 3 45 Pb-Free (RoHS CU SN Level-3-245C-168 HR LM2940CT
Exempt) -5.0 P+
LM2940CT-5.0/NOPB ACTIVE TO-220 NDE 3 45 Green (RoHS CU SN Level-1-NA-UNLIM 0 to 125 LM2940CT
& no Sb/Br) -5.0 P+
LM2940CT-9.0/NOPB ACTIVE TO-220 NDE 3 45 Green (RoHS CU SN Level-1-NA-UNLIM 0 to 125 LM2940CT
& no Sb/Br) -9.0 P+
LM2940IMP-10 NRND SOT-223 DCY 4 TBD Call TI Call TI -40 to 85 L55B
LM2940IMP-10/NOPB ACTIVE SOT-223 DCY 4 1000 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 85 L55B
& no Sb/Br)
LM2940IMP-12 NRND SOT-223 DCY 4 1000 TBD Call TI Call TI -40 to 85 L56B
LM2940IMP-12/NOPB ACTIVE SOT-223 DCY 4 1000 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 85 L56B
& no Sb/Br)
LM2940IMP-15 NRND SOT-223 DCY 4 1000 TBD Call TI Call TI -40 to 85 L70B
LM2940IMP-15/NOPB ACTIVE SOT-223 DCY 4 1000 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 85 L70B
& no Sb/Br)
LM2940IMP-5.0 NRND SOT-223 DCY 4 1000 TBD Call TI Call TI -40 to 85 L53B
LM2940IMP-5.0/NOPB ACTIVE SOT-223 DCY 4 1000 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 85 L53B
& no Sb/Br)
LM2940IMP-9.0/NOPB ACTIVE SOT-223 DCY 4 1000 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 85 L0EB
& no Sb/Br)
LM2940IMPX-10/NOPB ACTIVE SOT-223 DCY 4 2000 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 85 L55B
& no Sb/Br)
LM2940IMPX-12/NOPB ACTIVE SOT-223 DCY 4 2000 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 85 L56B
& no Sb/Br)
LM2940IMPX-5.0/NOPB ACTIVE SOT-223 DCY 4 2000 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 85 L53B
& no Sb/Br)
LM2940IMPX-8.0/NOPB ACTIVE SOT-223 DCY 4 2000 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 85 L54B
& no Sb/Br)
LM2940LD-12 NRND WSON NGN 8 1000 TBD Call TI Call TI -40 to 125 L00018B

Addendum-Page 2
 PACKAGE OPTION ADDENDUM

www.ti.com 26-Jul-2016

Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)

LM2940LD-12/NOPB ACTIVE WSON NGN 8 1000 Green (RoHS CU SN Level-3-260C-168 HR -40 to 125 L00018B
& no Sb/Br)
LM2940LD-5.0 NRND WSON NGN 8 TBD Call TI Call TI -40 to 125 L00014B
LM2940LD-5.0/NOPB ACTIVE WSON NGN 8 1000 Green (RoHS CU SN Level-3-260C-168 HR -40 to 125 L00014B
& no Sb/Br)
LM2940S-10 NRND DDPAK/ KTT 3 45 TBD Call TI Call TI -40 to 125 LM2940S
TO-263 -10 P+
LM2940S-10/NOPB ACTIVE DDPAK/ KTT 3 45 Pb-Free (RoHS CU SN Level-3-245C-168 HR -40 to 125 LM2940S
TO-263 Exempt) -10 P+
LM2940S-12 NRND DDPAK/ KTT 3 45 TBD Call TI Call TI -40 to 125 LM2940S
TO-263 -12 P+
LM2940S-12/NOPB ACTIVE DDPAK/ KTT 3 45 Pb-Free (RoHS CU SN Level-3-245C-168 HR -40 to 125 LM2940S
TO-263 Exempt) -12 P+
LM2940S-5.0 NRND DDPAK/ KTT 3 45 TBD Call TI Call TI -40 to 125 LM2940S
TO-263 -5.0 P+
LM2940S-5.0/NOPB ACTIVE DDPAK/ KTT 3 45 Pb-Free (RoHS CU SN Level-3-245C-168 HR -40 to 125 LM2940S
TO-263 Exempt) -5.0 P+
LM2940S-8.0/NOPB ACTIVE DDPAK/ KTT 3 45 Pb-Free (RoHS CU SN Level-3-245C-168 HR -40 to 125 LM2940S
TO-263 Exempt) -8.0 P+
LM2940S-9.0/NOPB ACTIVE DDPAK/ KTT 3 45 Pb-Free (RoHS CU SN Level-3-245C-168 HR -40 to 125 LM2940S
TO-263 Exempt) -9.0 P+
LM2940SX-10 NRND DDPAK/ KTT 3 500 TBD Call TI Call TI -40 to 125 LM2940S
TO-263 -10 P+
LM2940SX-10/NOPB ACTIVE DDPAK/ KTT 3 500 Pb-Free (RoHS CU SN Level-3-245C-168 HR -40 to 125 LM2940S
TO-263 Exempt) -10 P+
LM2940SX-12 NRND DDPAK/ KTT 3 500 TBD Call TI Call TI -40 to 125 LM2940S
TO-263 -12 P+
LM2940SX-12/NOPB ACTIVE DDPAK/ KTT 3 500 Pb-Free (RoHS CU SN Level-3-245C-168 HR -40 to 125 LM2940S
TO-263 Exempt) -12 P+
LM2940SX-5.0 NRND DDPAK/ KTT 3 500 TBD Call TI Call TI -40 to 125 LM2940S
TO-263 -5.0 P+
LM2940SX-5.0/NOPB ACTIVE DDPAK/ KTT 3 500 Pb-Free (RoHS CU SN Level-3-245C-168 HR -40 to 125 LM2940S
TO-263 Exempt) -5.0 P+
LM2940SX-8.0/NOPB ACTIVE DDPAK/ KTT 3 500 Pb-Free (RoHS CU SN Level-3-245C-168 HR -40 to 125 LM2940S
TO-263 Exempt) -8.0 P+

Addendum-Page 3
 PACKAGE OPTION ADDENDUM

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Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)

LM2940SX-9.0/NOPB ACTIVE DDPAK/ KTT 3 500 Pb-Free (RoHS CU SN Level-3-245C-168 HR -40 to 125 LM2940S
TO-263 Exempt) -9.0 P+
LM2940T-10.0 NRND TO-220 NDE 3 45 TBD Call TI Call TI -40 to 125 LM2940T
10.0 P+
LM2940T-10.0/NOPB ACTIVE TO-220 NDE 3 45 Green (RoHS CU SN Level-1-NA-UNLIM -40 to 125 LM2940T
& no Sb/Br) 10.0 P+
LM2940T-12.0 NRND TO-220 NDE 3 45 TBD Call TI Call TI -40 to 125 LM2940T
12.0 P+
LM2940T-12.0/NOPB ACTIVE TO-220 NDE 3 45 Green (RoHS CU SN Level-1-NA-UNLIM -40 to 125 LM2940T
& no Sb/Br) 12.0 P+
LM2940T-5.0 NRND TO-220 NDE 3 45 TBD Call TI Call TI -40 to 125 LM2940T
-5.0 P+
LM2940T-5.0/LF08 ACTIVE TO-220 NEB 3 45 Green (RoHS CU SN Level-3-245C-168 HR LM2940T
& no Sb/Br) -5.0 P+
LM2940T-5.0/NOPB ACTIVE TO-220 NDE 3 45 Green (RoHS CU SN Level-1-NA-UNLIM -40 to 125 LM2940T
& no Sb/Br) -5.0 P+
LM2940T-8.0 NRND TO-220 NDE 3 45 TBD Call TI Call TI -40 to 125 LM2940T
-8.0 P+
LM2940T-8.0/NOPB ACTIVE TO-220 NDE 3 45 Green (RoHS CU SN Level-1-NA-UNLIM -40 to 125 LM2940T
& no Sb/Br) -8.0 P+
LM2940T-9.0 NRND TO-220 NDE 3 45 TBD Call TI Call TI -40 to 125 LM2940T
-9.0 P+
LM2940T-9.0/NOPB ACTIVE TO-220 NDE 3 45 Green (RoHS CU SN Level-1-NA-UNLIM -40 to 125 LM2940T
& no Sb/Br) -9.0 P+

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Addendum-Page 4
 PACKAGE OPTION ADDENDUM

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Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 5
 PACKAGE MATERIALS INFORMATION

www.ti.com 20-Sep-2016

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM2940CSX-12 DDPAK/ KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2
TO-263
LM2940CSX-12/NOPB DDPAK/ KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2
TO-263
LM2940CSX-15/NOPB DDPAK/ KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2
TO-263
LM2940CSX-5.0 DDPAK/ KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2
TO-263
LM2940CSX-5.0/NOPB DDPAK/ KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2
TO-263
LM2940CSX-9.0/NOPB DDPAK/ KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2
TO-263
LM2940IMP-10/NOPB SOT-223 DCY 4 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3
LM2940IMP-12 SOT-223 DCY 4 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3
LM2940IMP-12/NOPB SOT-223 DCY 4 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3
LM2940IMP-15 SOT-223 DCY 4 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3
LM2940IMP-15/NOPB SOT-223 DCY 4 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3
LM2940IMP-5.0 SOT-223 DCY 4 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3
LM2940IMP-5.0/NOPB SOT-223 DCY 4 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3
LM2940IMP-9.0/NOPB SOT-223 DCY 4 1000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

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Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1

Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
LM2940IMPX-10/NOPB SOT-223 DCY 4 2000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3
LM2940IMPX-12/NOPB SOT-223 DCY 4 2000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3
LM2940IMPX-5.0/NOPB SOT-223 DCY 4 2000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3
LM2940IMPX-8.0/NOPB SOT-223 DCY 4 2000 330.0 16.4 7.0 7.5 2.2 12.0 16.0 Q3
LM2940LD-12 WSON NGN 8 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1
LM2940LD-12/NOPB WSON NGN 8 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1
LM2940LD-5.0/NOPB WSON NGN 8 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1
LM2940SX-10 DDPAK/ KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2
TO-263
LM2940SX-10/NOPB DDPAK/ KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2
TO-263
LM2940SX-12 DDPAK/ KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2
TO-263
LM2940SX-12/NOPB DDPAK/ KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2
TO-263
LM2940SX-5.0 DDPAK/ KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2
TO-263
LM2940SX-5.0/NOPB DDPAK/ KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2
TO-263
LM2940SX-8.0/NOPB DDPAK/ KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2
TO-263
LM2940SX-9.0/NOPB DDPAK/ KTT 3 500 330.0 24.4 10.75 14.85 5.0 16.0 24.0 Q2
TO-263

Pack Materials-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 20-Sep-2016

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM2940CSX-12 DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0
LM2940CSX-12/NOPB DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0
LM2940CSX-15/NOPB DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0
LM2940CSX-5.0 DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0
LM2940CSX-5.0/NOPB DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0
LM2940CSX-9.0/NOPB DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0
LM2940IMP-10/NOPB SOT-223 DCY 4 1000 367.0 367.0 35.0
LM2940IMP-12 SOT-223 DCY 4 1000 367.0 367.0 35.0
LM2940IMP-12/NOPB SOT-223 DCY 4 1000 367.0 367.0 35.0
LM2940IMP-15 SOT-223 DCY 4 1000 367.0 367.0 35.0
LM2940IMP-15/NOPB SOT-223 DCY 4 1000 367.0 367.0 35.0
LM2940IMP-5.0 SOT-223 DCY 4 1000 367.0 367.0 35.0
LM2940IMP-5.0/NOPB SOT-223 DCY 4 1000 367.0 367.0 35.0
LM2940IMP-9.0/NOPB SOT-223 DCY 4 1000 367.0 367.0 35.0
LM2940IMPX-10/NOPB SOT-223 DCY 4 2000 367.0 367.0 35.0
LM2940IMPX-12/NOPB SOT-223 DCY 4 2000 367.0 367.0 35.0
LM2940IMPX-5.0/NOPB SOT-223 DCY 4 2000 367.0 367.0 35.0
LM2940IMPX-8.0/NOPB SOT-223 DCY 4 2000 367.0 367.0 35.0
LM2940LD-12 WSON NGN 8 1000 210.0 185.0 35.0
LM2940LD-12/NOPB WSON NGN 8 1000 210.0 185.0 35.0

Pack Materials-Page 3
 PACKAGE MATERIALS INFORMATION

www.ti.com 20-Sep-2016

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM2940LD-5.0/NOPB WSON NGN 8 1000 210.0 185.0 35.0
LM2940SX-10 DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0
LM2940SX-10/NOPB DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0
LM2940SX-12 DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0
LM2940SX-12/NOPB DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0
LM2940SX-5.0 DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0
LM2940SX-5.0/NOPB DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0
LM2940SX-8.0/NOPB DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0
LM2940SX-9.0/NOPB DDPAK/TO-263 KTT 3 500 367.0 367.0 45.0

Pack Materials-Page 4
 MECHANICAL DATA
NDE0003B

www.ti.com
 MECHANICAL DATA
NDG0003F

T03F (Rev B)

www.ti.com
 MECHANICAL DATA

MPDS094A – APRIL 2001 – REVISED JUNE 2002

DCY (R-PDSO-G4) PLASTIC SMALL-OUTLINE

6,70 (0.264)
6,30 (0.248)
3,10 (0.122)
2,90 (0.114)
4
0,10 (0.004) M

7,30 (0.287) 3,70 (0.146)

6,70 (0.264) 3,30 (0.130)

Gauge Plane
1 2 3
0,25 (0.010)
0,84 (0.033) 0°–10°
2,30 (0.091)
0,66 (0.026)
0,10 (0.004) M
4,60 (0.181) 0,75 (0.030) MIN

1,70 (0.067)
1,80 (0.071) MAX 1,50 (0.059)
0,35 (0.014)
0,23 (0.009)
Seating Plane

0,10 (0.0040) 0,08 (0.003)

0,02 (0.0008)

4202506/B 06/2002

NOTES: A. All linear dimensions are in millimeters (inches).

B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion.
D. Falls within JEDEC TO-261 Variation AA.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

 MECHANICAL DATA
NGN0008A

LDC08A (Rev B)

www.ti.com
 MECHANICAL DATA
KTT0003B

TS3B (Rev F)
BOTTOM SIDE OF PACKAGE

www.ti.com
 MECHANICAL DATA
NEB0003G

TA03G (Rev A)

www.ti.com
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