Chapter 3 Signal Conditioning Circuit
Chapter 3 Signal Conditioning Circuit
Syllabus: Instrumentation amplifiers- Unbalanced bridge. Bridge linearization using op amp Precision
rectifiers, Log amplifiers, Charge amplifiers, Isolation amplifier, Switched capacitor circuits, Phase
sensitive detectors, Noise problem in instrumentation and its minimization
The above shown is a three-opamp instrumentation amplifier. In this circuit, a non inverting
amplifier is connected to both inputs of the differential amplifier.
The two amplifiers at the left side are connected together to form a combined Non-inverting
amplifier are gain buffers with R gain is removed. The amplifier at the right side is a standard
differential amplifier. The R gain resistor increases the differential mode gain of the buffer pair
amplifiers, this increase the CMRR of the amplifier. The gain of the circuit is:
The R gain resistor increases the differential mode gain of the buffer pair amplifiers, this increase
the CMRR of the amplifier.
Main features:
High CMRR: The ability of amplifier to reject noise or unwanted large common signals to all
IC pins and amplify the small signal. The CMRR should be infinity by ideally. A good
instrumentation amplifier must amplify only the differential input, completely rejecting common
mode inputs.
High input impedance: Ideally the input impedance should be infinity. The sensor connected to
the amplifier cannot provide energy to amplifier, so the amplifier input must have a high input
impedance to avoid overloading of sensor.
DC coupled: Industrial low frequency requires a DC coupled amplifier. This means no capacitor
must be used at the input side.
Low output impedance: The output impedance of a good instrumentation amplifier must be
very low (ideally zero), to avoid loading effect on the immediate next stage.
Differential input: The noise generated at the sensors is induced into both the inverting and
non-inverting terminals of differential input and it is subtracted from itself by the op-amp.
Single ended output: The output of the instrumentation amplifier is single ended and designed
to match with displays and following amplifier.
Higher slew rate: The slew rate of the instrumentation amplifier will be as high as possible to
provide maximum undistorted output voltage swing.
Applications:
This article will consider the resistance-variable element in a Wheatstone bridge, examine its
behavior and explain how to linearize the bridge circuit to optimize performance. Note that while
the term “bridge” is generally used in this article, the focus is on circuit design for a Wheatstone
bridge.
Variable-resistance Wheatstone bridge circuits perform most of the front-end tasks in a design.
They use inexpensive, accurate discrete parts. By incorporating an RTD element, the bridge’s
inherent resistance variations are kept within accepted linearity and tolerance limits, depending
on the characteristics of the RTD.
RTD devices are provided with a detailed data sheet characterizing their behavior with look-up
tables and even transfer function equations down to four or more orders of error-compensating
terms. To ensure a high-precision system, designers must consider both the inherent nonlinearity
of the RTD element and that of the Wheatstone bridge.
.
Now it is necessary to calibrate the front-end and linearize the front-end at the microcontroller
side. Increasing the order of the equation in the microcontroller is going to improve the linearity.
A typical bridge circuit (Figure 1) detects milliohms of changes in resistance (DR).
Equation 1
Equation 2
Equation 2 suggests that increasing the constant supply voltage, V, to the bridge will increase the
output voltage, that is, the swing range across the bridge. This also suggests that having a dual
supply across the four-legged resistance arrangement could be helpful not only to increase the
range, but also to help maintain a 0 V common-mode voltage across the AB nodes.
The voltage VAB is usually amplified by a subsequent amplifying stage, typically a differential
amplifier. There is a caveat, however. Changing the common-mode voltage across VAB adds
more error and complexity in the amplifying second stage. This is usually realized as an
instrumentation-quality differential amplifier. Therefore, a common-mode voltage centered on 0
V is preferable and easier to manage.
Aside from addressing the bridge’s inherent nonlinearity, you must also manage the nonlinearity
of the temperature sensor element, RTD, or even thermistor as discussed previously. The
instrumentation amplifier (Figure 2) has a common-mode voltage of V/2 when sensing the
differential voltage across the nodes A and B. The amplifier is usually either a differential
amplifier with four resistors or a three-op-amp instrumentation amplifier integrated in a single
package.
When a differential amplifier is used, the nodes A and B are connected to the amplifier’s input
gain-setting resistors, as shown in Figure 2. The choice of the op amp and the input resistors is
significant as this path directs current away from the bridge, which impacts accuracy.
Also, the type of resistors you use affects the bridge performance. For instance, even 0.1%-
tolerant resistors used with the amplifier provide only 60dB of common-mode rejection.
From the previous discussion, it seems logical to have dual supplies across the resistor bridge to
increase the dynamic range, and to have the sensing nodes centered around the 0 V common-
mode voltage. The advantage of this design is that the transfer function from node B is going to
be linear with a change in resistance. The range of output swing from the bridge is doubled
compared to the output from the circuit in Figure 1.
The circuit implementation in Figure 3 uses two opamps to replace the more complex
instrumentation amplifier. Now the linearized bridge output avoids the unnecessary current paths
created by the differential amplifier. This circuit eases the design process compared to the circuit
in Figure 2. The only issue here is having positive and negative supplies to the amplifiers which
are providing the doubling of swing range. The added benefit is improved common-mode
rejection performance as the second amplifier operates comfortably around 0 V.
Figure 3. This circuit replaces the complex instrumentation amplifier (Figure 2) with two
op amps.
From Figure 3, node A sees GND as it is the summing node of amplifier 1. Thus, a constant
current of is forced through the R1|R3 branch, producing an equal and opposite voltage on the
other side of the bridge with -V. When the single variable-resistance R3 changes (from R3 to R
±DR), then Ix (the change in current due to change in the resistance) flowing through this
resistance produces a voltage V ±DV. A factor of this DV is manifested across node B by the
balancing of the resistance bridge (for a balanced bridge, of course), as the current forced
through resistor branch R2|R4 is equal to (V+ - (V- + DV))/(R3+R4). Since node B is centered at
0 V common mode, the voltage produced across node B is going to be applied to the non-
inverting input of the amplifier. Furthermore, filtering can be done on this gain stage to optimize
the bandwidth and, therefore, make the noise level acceptable for the application.
Equation 3
At the output of the non-inverting opamp, the equation is
Equation 4
The major limitation of conventional rectifiers is that it cannot rectify AC voltages below
forward voltage drop VD (0.7V) of a diode. The precision rectifier will make it possible to rectify
input voltage of a very small magnitude even less than forward voltage drop of diode. Rectifier
circuits used for circuit detection with op-amps are called precision rectifiers.
Necessity of Op-Amp:
When forward biased voltage is less than 0.7V, then diode is not conducting. In case of normal
power rectifier input applied is much larger than 0.7V. So diode is not operated. Therefore Op-
amp is used to help diode to conduct.
The precision rectifiers are classified in two categories.
1. Precision HWR
2. Precision FWR
Precision Half Wave Rectifier (PHWR): Non-saturated types of precision half wave rectifiers
are suitable for high frequency applications. In HWR, the diode conducts in one of the half
cycles of applied ac input signal. The HWR can classified as positive PHWR (output is positive)
and negative PHWR (output is negative). The following figure shows the circuit diagram of a
positive Precision HWR.
In positive half cycle of applied ac input signal output of op-amp is negative, so diode D1 is
forward biased and D2 is reversed biased. The output of op-amp is virtually shorted to ground
and prevented going into saturation. Thus output voltage is zero.
Vo=0 V
In negative half cycle of applied ac input signal output of op-amp is positive, so diode D2 is
forward biased and D1 is reversed biased. The circuit now works as an inverting amplifier with
gain of (-Rf/R1 )
Vo=Vin×A
Vo=(-Vin )[-Rf/R1 ]
Vo= Rf/R1 (Vin )
The transfer characteristics and input-output waveforms of Precision half-wave rectifier are
shown below,
Precision Full wave Rectifier: In PFWR, for both the half cycles output is produced & in one
direction only. The diagram below shows an inverting type of Precision FWR with positive
output. It is also called as absolute value circuit because output signal swing is only in positive
direction. So we get absolute value of input signal.
In positive half cycle of applied ac input signal, output of first op-amp (A1) is Negative.
Therefore diode D2 is forward biased & diode D1 is reverse biased. Here op-amp A1 works as an
inverting amplifier with gain = (-R/R) = -1
Op-amp A2 works as an inverting adder. The two inputs to the op-amp A2 are voltage V (output
of A1) and input voltage Vin. Thus output of op-amp A2 i.e. Output voltage is given as
Vo = -[R/R Vin+R/(R⁄2) V ]
Vo = -[Vin+2V]
Substituting V = -Vin
Vo = Vin
In negative half cycle of applied ac input signal, output of first op-amp (A1) is positive.
Therefore diode D2 is reversed biased & diode D1 is forward biased. Due to virtual ground
concept output of op-amp A1 is zero. (V=0). Thus output of op-amp A2, i.e. Output voltage is
given as
Vo = -[R/R Vin+R/(R⁄2) V ]
Vo = -[R/R Vin+R/(R⁄2) (0) ]
But in negative half cycle input magnitude is negative therefore we get,
Vo = -[R/R (-Vin ) ], Vo = Vin
Thus in both the half cycles output is positive & in one direction & also have same magnitude.
Thus it is also called as non-saturating type of PFWR because op-amp A1 is not going in
saturation.
The transfer characteristics and input-output waveforms of PFWR are shown below,
The electronic circuits which perform the mathematical operations such as logarithm with
amplification are called as Logarithmic amplifier.
A logarithmic amplifier, or a log amplifier, is an electronic circuit that produces an output that
is proportional to the logarithm of the applied input. The op-amp based logarithmic amplifier
produces a voltage at the output, which is proportional to the logarithm of the voltage applied to
the resistor connected to its inverting terminal. The circuit diagram of an op-amp based
logarithmic amplifier is shown in the following figure –
In the above circuit, the non-inverting input terminal of the op-amp is connected to ground. That
means zero volts is applied at the non-inverting input terminal of the op-amp.
According to the virtual short concept, the voltage at the inverting input terminal of an op-amp
will be equal to the voltage at its non-inverting input terminal. So, the voltage at the inverting
input terminal will be zero volts.
The following is the equation for current flowing through a diode, when it is in forward bias −
Where,
Observe that the left hand side terms of both equation 1 and equation 3 are same. Hence, equate
the right hand side term of those two equations as shown below −
Note that in the above equation, the parameters n, VT and Is are constants. So, the output
voltage V0 will be proportional to the natural logarithm of the input voltage Vi for a fixed
value of resistance R1.
Therefore, the op-amp based logarithmic amplifier circuit discussed above will produce an
output, which is proportional to the natural logarithm of the input voltage VT, when R1Is = 1V.
Observe that the output voltage V0 has a negative sign, which indicates that there exists a
1800 phase difference between the input and the output.
The circuit operates by passing a current that charges or discharges the capacitor Cf during the
time under consideration, which strives to retain the virtual ground condition at the input by off-
setting the effect of the input current. Referring to the above diagram, if the op-amp is assumed
to be ideal, nodes v1 and v2 are held equal, and so v2 is a virtual ground.
The input voltage passes a current through the resistor producing a compensating current flow
through the series capacitor to maintain the virtual ground. This charges or discharges the
capacitor over time. Because the resistor and capacitor are connected to a virtual ground, the
input current does not vary with capacitor charge and a linear integration of output is achieved.
The circuit can be analyzed by applying Kirchhoff's current law at the node v2, keeping ideal op-
amp behaviour in mind.
Advantages:
An isolation amplifier (also called a unity-gain amplifier) is an op-amp circuit which provides
isolation of one part of a circuit from another, so that power is not used, drawn, or wasted in a
part of the circuit.
The purpose of an isolation amplifier is not to amplify the signal. The same signal that is input
into the op amp gets passed out exactly the same. This means that output voltage is the same
exact as the input voltage, meaning if 10V AC is input into a circuit, 10V AC is output.
The purpose of an isolation amplifier is to isolate the circuit which appears before the amplifier
from the circuit that appears after it.
An op amp is a device with very high input impedance. This high input impedance causes
isolation. When a circuit has very high input impedance, very little current is drawn from a
power source. Thus, an op amp, being of very high impedance, does not cause any significant
amount of current to be drawn from the power. It draws very little current; thus, practically no
current is drawn and transferred from the first part of the circuit to the second. The high-
impedance load of the op amp ensures this. Thus, the op amp serves as an isolation device from
one part of a circuit to the next or of different circuits.
Isolation amplifiers serve as buffers. They do not amplify signals but serve to isolate parts of
circuits or different circuits from each other.
A switched capacitor is an electronic circuit element used in discrete time signal processing
systems. It works by transferring charge into and out of a capacitor when switches are opened
and closed. Usually, non-overlapping signals are used to control the switches, often termed
Break before Make switching, so that all switches are open for a very short time during the
switching transitions. Filters implemented with these elements are termed 'switched-capacitor
filters'. Unlike analog filters, which must be constructed with resistors, capacitors and sometimes
inductors whose values are accurately known, switched capacitor filters depend only on the
ratios between capacitances and the switching frequency. This makes them much more suitable
for use within integrated circuits, where the accurately specified absolute value of components
such as resistors and capacitors are not economical to construct.
The most simple switched capacitor circuit is shown in figure 1, the switched capacitor resistor.
It consists of one capacitor C1 and two switches S1 and S2 which connect the capacitor alternately
to the input, VINand the output, VOUT.
Each switching cycle transfers a charge Δq from the input to the output at the switching
frequency F. Recall that the charge q on a capacitor C with a voltage V between the plates is
given by:
q = CV
Where V is the voltage across the capacitor. Therefore, when S1 is closed while S2 is open, the
charge transferred from the input source to C is:
qIN = C1VIN
And when S2 is closed while S1 is open, the charge transferred from C1 to the output is:
qOUT = C1 VOUT
The charge transferred in each cycle is:
Δq = qOUT - qIN= C1( VOUT - VIN )
Since a charge Δq is transferred at a rate F, the rate of transfer of charge per unit time is:
I = ΔqF
Note that I is used, the symbol for electric current, for this quantity. This is to demonstrate that a
continuous transfer of charge from one node to another is the same as current. Substituting for
Δq in the equation above, we get:
I = C1( VOUT - VIN ) F
We define ΔV, the voltage across the circuit from input to output, as:
ΔV = VOUT - VIN
We now have a relationship between I and V, which we can rearrange to give an equivalent
resistance R:
R = V / I = 1 / (C1 F)
Thus, the circuit behaves like a resistor whose value depends on C1 and F.
The Switched Capacitor resistor is often used as a replacement for simple resistors in integrated
circuits because it is easier to fabricate reliably with a wide range of values. It also has the
benefit that the equivalent resistor value can be adjusted by changing the switching frequency.
This same circuit can be used in discrete time systems (such as analog to digital converters) as a
track and hold circuit. During the appropriate clock phase, the capacitor samples the analog
voltage through switch one and in the second phase presents this held sampled value to an
electronic circuit for processing.
3.8 Phase sensitive detectors
The phase sensitive detector circuit (or phase meter) is used for comparing an ac signal with a
reference signal, which produces a rectified output and fed to a dc meter, to illustrate clearly that
the output of the phase sensitive detector swings the zero centre pointer in one direction for an
in-phase error voltage and in the opposite direction for an out of phase condition. Thus, the
function of this dual rectifier circuit is to deflect the zero centre galvanometer (or dc voltmeter)
not only to indicate the value of the signal voltage Vs (that is, a measure of the error of
imbalance), but also the direction of this error, and the phase polarity of the error compared to a
reference voltage. Phase polarity implies that the detector distinguishes only between in phase
and 180° out of phase conditions, without regard for other phase angles.
The circuits of Figs 10.4(a) and (b) follows the action for a signal voltage Vs, which is in phase
with the reference voltage Vr starting with an initial condition when the input signal Vsis zero.
In Fig. 10.4(a), for the first half cycle the instantaneous polarity of the refer ence voltage
Vrcauses the rectified current to flow through the conduction rec tifier D1, producing a positive
voltage to ground across R1 and a tendency for the meter to deflect to the right. On the second
half cycle, Fig. 10.4(b), the instantaneous polarity of the reference voltage Vr causes an equal
rectified current to flow through diode D2, producing an equal tendency for the meter to deflect
to the left. Since these two equal and opposite tendencies are averaged over the full cycle, the
galvanometer reads zero over the full cycle, with input Vs = 0.
When an input signal Vs is applied, it either aids or opposes the reference voltage, depending
upon whether it is in phase or out of phase with it. If Vs is in phase with Vr the signal voltage
will aid the instantaneous ac voltage in the upper half of the transformer secondary, producing a
larger current through D1 and a larger dc output voltage on the first half. D2 does not conduct
unless Vs is greater than Vr so that the voltage across R2 is the rectified result of Vs — Vr and
that across R1 is Vs + Vr.
On the other half cycle, the signal voltage is in the opposite direction. Diode D1 will not conduct
in the upper half and the signal voltage will oppose the instantaneous ac voltage, to produce a
smaller dc voltage across R2. The galvanometer therefore deflects to the right in proportion to
the magnitude of the in-phase input signal Vs. Similarly, if Vs is 180° out of phase with Vr, the
voltages add on the lower half on the transformer secondary, and the galvanometer deflects to the
left in proportion to the magnitude of that input signal.
Noise, or interference, can be defined as undesirable electrical signals, which distort or interfere
with an original (or desired) signal. Noise could be transient (temporary) or constant.
Unpredictable transient noise is caused, for example, by lightning. Constant noise can be due to
the predictable 50 or 60 Hz AC 'hum' from power circuits or harmonic multiples of power
frequency close to the data communications cable. This unpredictability makes the design of a
data communications system quite challenging.
Noise can be generated from within the system itself (internal noise) or from an outside source
(external noise). Examples of these types of noise are:
Internal noise
External noise
From a general point of view, there must be three contributing factors before an electrical noise
problem can exist. These are:
Figure shows a typical noise waveform and how it looks when superimposed on the power
source voltage waveform.
Electrical systems are prone to such noise due to various reasons. As discussed in the previous
chapter, lightning and switching surges are two of these. These surges produce high but very
short duration of distortions of the voltage wave. Another common example is 'notching', which
appears in circuits using silicon-controlled rectifiers (power thyristors). The switching of these
devices causes sharp inverted spikes during commutation (transfer of conduction from one phase
arm to the next). Figure shows the typical waveform with this type of disturbance.
Switching of large loads in power circuits to which automatic data processing (ADP) loads are
connected can also cause disturbances. Similarly, faults in power systems can cause voltage
disturbances. All these distortions and disturbances can find their way to sensitive electronic
equipment through the power supply mains connection and cause problems.
Apart from these directly communicated disturbances, sparks and arcing generated in power-
switching devices and high-frequency harmonic current components can produce
electromagnetic interference (EMI) in signal circuits, which will require to be properly shielded
or screened to avoid interference. Figure shows diagrammatically the reasons for noise from the
equipment within a facility.
Noise is only important if it is measured in relation to the communication signal, which carries
the data or information. Electronic receiving circuits for digital communications have a broad
voltage range, which determines whether a signal is binary bit '1' or '0'. The noise voltage has to
be high enough to take the signal voltage outside these limits for errors to occur.
The power and logic voltages of present day devices have been drastically reduced and at the
same time, the speed of these devices has increased with propagation times now being measured
in picoseconds. While the speed of the equipment has gone up and the voltage sensitivity has
gone down, the noise conditions coming from the power supply side have not reduced at all.
The best illustration that can be given of this condition is to consider where the signal voltage
has been and what is happening to it compared to the noise voltage shown in figure. In years
gone by, signal voltages may have been 30 V or more but since then have steadily been
decreasing. As long as the signal voltage was high and the noise voltage was only 1 V, then we
had what most instrument engineers would call a very high signal to noise ratio, 30:1.
When this takes place, a parity check or a security check signal is sent out from the sensitive
equipment asking if this particular voltage is one of the voltages the sensor should recognize.
Usually, this check fails when it is a noise voltage rather than the proper signal that it should be
looking at and the equipment shuts down because it has no signal. In other words, the equipment
self-protects when there is no signal to keep it operating. When the signal to noise ratio has fallen
from a positive direction to a negative direction, the equipment interprets that as the need to turn
off so this it will not be running on sporadic signals.
In the top portion of Figure 8.5, a 20-30-V logic signal is well in excess of the noise that is
occurring between the on and off digital signal flow. In the bottom picture, however, the noise
has raised its head above the area of the logic signal which has now dropped significantly into
the 3-5 V range and perhaps even lower. You will also notice that the difference between the
upper and lower pictures in the graph shows the speed with which the signal was transmitted. In
the upper graph, the ons and offs are relatively slow, evidenced by the large spaces between the
traces. In the lower graph, the trace is now much faster. There are many more ons and offs
jammed into the same space and as such, the erratic noise behavior may now interfere with the
actual transmission.
The ratio of the signal voltage to the noise voltage determines the strength of the signal in
relation to the noise. This 'signal to noise ratio' (SNR) is important in assessing how well the
communication system will operate. In data communications, the signal voltage is relatively
stable and is determined by the voltage at the source (transmitter) and the volt drop along the line
due to the cable resistance (size and length). The SNR is therefore a measure of the interference
on the communication link.
The SNR is usually expressed in decibels (dB), which is the logarithmic ratio of the signal
voltage (S) to noise voltage (N).
SNR = 10log(S/N)dB
A BER of 10-12 (one error bit in a million million) is considered to be very good. Over industrial
systems, with low data requirements, a BER of 10-4 could be quite acceptable. There is a
relationship between SNR and BER. As the SNR increases, the error rate drops off rapidly as is
shown in Figure. Most of the communications systems start to provide reasonably good BERs
when the SNR is above 20 dB.
Figure Relationship between the bit error rate and the signal to noise ratio
1. Wideband noise
2. Impulse noise
3. Frequency-specific noise.
The three groups are shown in the simplified frequency domain as well as the conventional time
domain. In this way, we can appreciate the signal's changing properties as well as viewing the
amplitude in the customary time domain.
Wideband noise contains numerous frequency components and amplitude values. These are
depicted in the time domain and frequency domain graphs are shown in figure.
In the frequency domain, the energy components of wideband noise extend over a wide range of
frequencies (frequency spectrum).
Wideband noise will often result in the occasional loss or corruption of a data bit. This occurs at
times when the noise signal amplitude is large enough to confuse the system into making a
wrong decision on what digital information or character was received. Encoding techniques such
as parity checking and block character checking (BCC) are important for wideband error
detection so that the receiver can determine when an error has occurred.
Impulse noise is best described as a burst of noise, which may last for a duration of say up to 20
ms. It appears in the time domain as indicated in figure.
Figure Time domain plot of impulse noise
The frequency domain of this type of noise affects a wide bandwidth with decreasing amplitude
vs frequency shown in figure.
Impulse noise is brought about by the transient disturbances in electrical activity such as when an
electric motor starts up, or from switching elements within telephone exchanges. Impulse noise
swamps the desired signal, thus corrupting a string of data bits. As a result of this effect,
synchronization may be lost or the character framing may be disrupted. Noise of this nature
usually results in garbled data making messages difficult to decipher. Cyclic redundancy
checking (CRC) error detection techniques may be required to detect such corruption.
Although more damaging than wideband noise, impulse noise is generally less frequent. The
time and frequency domain plots for impulse noise will vary depending on the actual shape of
the pulse. Pulse shapes may be square, trapezoid, triangular or sine for example.
In general, the narrower and steeper a pulse, the more energy is placed in the higher-frequency
regions.
Frequency-specific noise is characterized by a constant frequency, but its amplitude may vary
depending on how far the communication system is from the noise source, the amplitude of the
noise signal and the shielding techniques used.
This noise group is typical of AC power systems is shown in below figures and can be reduced
by separating the data communication system from the power source. As this form of noise has a
predictable frequency spectrum, noise resistance is easier to implement within the system design.
Common-mode noise, on the other hand, appears simultaneously in each active conductor and
therefore cannot be measured like a transverse-mode noise. It usually involves the ground
conductor and originates from some external disturbance.
An important factor to be taken note of in dealing with electrical system generated noise is
electrical segregation of noise-producing equipment and noise-sensitive equipment. In case A,
the 'noisy' AC units and noise-sensitive ADP loads share a common power supply system.
Frequent starts of AC compressors could cause voltage fluctuations, which will be
communicated to ADP power units and can translate as noise in ADP units' electronic circuits. In
case B, a separation of circuits has been achieved by employing different sub-circuits for AC
loads and ADP loads but this may not have much impact as far as noise is concerned since the
sources are shared.
In case C, a two-winding transformer has been introduced in the ADP circuit feeder. This will act
as a cushion for the noise due to the inherent inductance of the transformer, which will not allow
steep noise fronts to pass through. In case D, two separate transformers feed the AC loads and
ADP loads with transfer-switching provision. The two-winding transformer has been retained.
Obviously, D is the best case solution but expensive. In some situations, it may not be feasible to
implement too. C will, however, provide an acceptable solution without being quite as expensive
as D and can be retrofitted easily where required.