CS2841B

CS2841B
Automotive Current Mode PWM
Control Circuit
Description Features
The CS2841B provides all the nec- quality and reliability in automo- ■ Optimized for Off-line
essary features to implement off- tive applications. Control
line fixed frequency current-mode The CS2841B incorporates a preci- ■ Internally Trimmed
control with a minimum number of sion temperature-controlled oscil- Temperature
external components. lator with an internally trimmed Compensated Oscillator
The CS2841B (a variation of the discharge current to minimize vari- ■ Maximum Duty-cycle
CS-2843A) is designed specifically ations in frequency. Duty-cycles Clamp
for use in automotive operation. greater than 50% are also possible.
■ VREF Stabilized before
The low start threshold voltage of On board logic ensures that VREF is Output Stage Enabled
8.0V (typ), and the ability to sur- stabilized before the output stage
vive 40V automotive load dump is enabled. Ion implant resistors ■ Low Start-up Current
transients are important for auto- provide tighter control of under- ■ Pulse-by-pulse Current
motive subsystem designs. The voltage lockout. Limiting
CS-2841 series has a history of ■ Improved Undervoltage
Lockout
Absolute Maximum Ratings
■ Double Pulse Suppression
Supply Voltage (Low Impedance Source)...................................................40V
Output Current ...............................................................................................±1A ■ 1% Trimmed Bandgap
Output Energy (Capacitive Load) .................................................................5µJ Reference
Analog Inputs (VFB, Sense) ............................................................-0.3V to 5.5V ■ High Current Totem Pole
Error Amp Output Sink Current...............................................................10mA Output
Lead Temperature Soldering
Wave Solder (through hole styles only) ..........10 sec. max, 260°C peak
Reflow (SMD styles only) ...........60 sec. max above 183°C, 230°C peak Package Options
Block Diagram
8 Lead PDIP

V CC V CC Pwr
COMP 1 8 VREF
Undervoltage
Lock-out Circuit VFB 2 7 VCC

Set/ 5V
Sense 3 6 VOUT
V REF
Gnd Reset Reference
OSC 4 5 Gnd
8.0V/7.4V
Internal
Bias
2.50V
14 Lead SO Narrow
Output
Enable
COMP 1 14 VREF
OSC Oscillator NOR
NC 2 13 NC
V OUT
VFB 3 12 VCC
S
+ 2 R
NC 4 11 VCC Pwr
V FB PWM
– VC R Latch
Error Sense 5 10 VOUT
Amplifier R
1 V Current Pwr Gnd
COMP Sensing NC 6 9 Pwr Gnd
Comparator
OSC 7 8 Gnd
Sense

Cherry Semiconductor Corporation

2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: [email protected]
Web Site: www.cherry-semi.com
Rev. 6/23/99 1 A ® Company
CS2841B Electrical Characteristics: d -40≤TA≤85˚C RT=680kΩ, CT=0.022µF for triangular mode, VCC=15V (Note 1),
RT=10kΩ, CT=3.3nF for sawtooth mode (See Fig. 3), unless otherwise stated.

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

■ Reference Section
Output Voltage TJ=25˚C, IOUT=1mA 4.90 5.00 5.10 V
Line Regulation 8.4≤VCC≤16V 6 20 mV
Load Regulation 1≤IOUT≤20mA 6 25 mV
Temperature Stability (Note 2) 0.2 0.4 mV/˚C
Total Output Variation Line, Load, Temp. (Note 2) 4.82 5.18 V
Output Noise Voltage 10Hz≤f≤10kHz, TJ=25˚C (Note 2) 50 µV
Long Term Stability TA=125˚C, 1000 Hrs. (Note 2) 5 25 mV
Output Short Circuit TA=25˚C -30 -100 -180 mA

■ Oscillator Section
Initial Accuracy Sawtooth Mode: (See Fig. 3)TJ=25˚C 47 52 57 kHz
Sawtooth Mode: -40˚C≤TA≤+85˚ 44 52 60 kHz
Triangular Mode (See Fig. 3) TJ=25˚C 44 52 60 kHz
Voltage Stability 8.4V≤Vcc≤16V 0.2 1.0 %
Temperature Stability Sawtooth Mode TMIN≤TA≤TMAX 5 %
Triangular Mode TMIN≤TA ≤TMAX 8 %
(Note 2)
Amplitude VOSC (peak to peak) 1.7 V
Discharge current TJ=25˚C 7.4 8.3 9.2 mA
TMIN≤TA≤TMAX 7.2 9.4 mA

■ Error Amp Section

Input Voltage VCOMP=2.5V 2.42 2.50 2.58 V
Input Bias Current VFB=0V -0.3 -2.0 µA
AVOL 2≤VOUT≤4V 65 90 dB
Unity Gain Bandwidth (Note 2) 0.7 1.0 MHz
PSRR 8.4V≤VCC≤16V 60 70 dB
Output Sink Current VFB=2.7V, VCOMP=1.1V 2 6 mA
Output Source Current VFB=2.3V, VCOMP=5V -0.5 -0.8 mA
VOUT High VFB=2.3V, RL=15kΩ to ground 5 6 V
VOUT Low VFB=2.7V, RL=15kΩ to VREF 0.7 1.1 V

■ Current Sense Section

Gain (Notes 3 & 4) 2.85 3.00 3.15 V/V
Maximum Input Signal VCOMP=5V (Note 3) 0.9 1.0 1.1 V
PSRR 12V≤VCC≤25V (Note 3) 70 dB
Input Bias Current VSense=0V -2 -10 µA
Delay to Output TJ=25˚C (Note 2) 150 300 ns

Notes: 1. Adjust Vcc above the start threshold before setting at 15V. 3. Parameter measured at trip point of latch with VFB=0.
2.These parameters, although guaranteed, are not 100% tested in production. 4. Gain defined as:

∆VCOMP
A= ; 0 ≤ VSense ≤ 0.8V.
∆VSense

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 CS2841B
Electrical Characteristics: continued

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

■ Output Section
Output Low Level ISINK=20mA 0.1 0.4 V
ISINK=200mA 1.5 2.2 V
Output High Level ISOURCE=20mA 13.0 13.5 V
ISOURCE=200mA 12.0 13.5 V
Rise Time TJ=25˚C, CL=1nF (Note 2) 50 150 ns
Fall Time TJ=25˚C, CL=1nF (Note 2) 50 150 ns
Output Leakage Undervoltage Active, VOUT=0 -0.01 -10.00 µA

■ Total Standby Current

Start-Up Current 0.5 1.0 mA
Operating Supply Current ICC VFB=VSense=0V, RT=10kΩ, CT=3.3nF 11 17 mA

■ Under-Voltage Lockout Section

Start Threshold 7.6 8.0 8.4 V
Min. Operating Voltage After Turn On 7.0 7.4 7.8 V

Package Pin Description

PACKAGE PIN # PIN SYMBOL FUNCTION

8L PDIP 14L SO Narrow

1 1 COMP Error amp output, used to compensate error amplifier
2 3 VFB Error amp inverting input
3 5 Sense Noninverting input to Current Sense Comparator
4 7 OSC Oscillator timing network with Capacitor to Ground, resistor
to VREF
5 8 Gnd Ground
9 Pwr Gnd Output driver Ground
6 10 VOUT Output drive pin
11 VCCPwr Output driver positive supply
7 12 VCC Positive power supply
8 14 VREF Output of 5V internal reference
2,4,6,13 NC No Connection

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CS2841B Typical Performance Characteristics:

Oscillator Frequency vs CT Oscillator Duty Cycle vs RT

100
900
90
800
RT =680Ω 80
700

DUTY CYCLE (%)

70
FREQ. (kHz)

600
60

500 50
RT =1.5kΩ
400 40

300 30

200 20
RT =10kΩ
10
100

.0005 .001 .002 .003 .005 .01 .02 .03 .04 .05 100 200 300 400 500 700 1k 2k 3k 4k 5k 7k 10k

CT (µF) RT (Ω)

Test Circuit

V REF
RT

2N2222 V CC
A
100kΩ
4.7kΩ COMP V REF
0.1µF

1kΩ
Error Amp V FB V CC
Adjust 1kΩ
5kΩ 0.1µF 1W
4.7kΩ V OUT VO
Sense Sense
Adjust

OSC Gnd

Gnd
CT

Circuit Description

Undervoltage Lockout
During Undervoltage Lockout (Figure 1), the output driv-
V CC ON/OFF Command er is biased to a high impedance state. The output should
to reset of IC
be shunted to ground with a resistor to prevent output
leakage current from activating the power switch.
V ON = 8.0V
V OFF = 7.4V PWM Waveform
To generate the PWM waveform, the control voltage from
the error amplifier is compared to a current sense signal
which represents the peak output inductor current (Figure
2). An increase in VCC causes the inductor current slope to
I CC increase, thus reducing the duty cycle. This is an inherent
feed-forward characteristic of current mode control, since
the control voltage does not have to change during
<15mA changes of input supply voltage.
When the power supply sees a sudden large output cur-
<1mA V CC rent increase, the control voltage will increase allowing the
7.4V 8.0V duty cycle to momentarily increase. Since the duty cycle
Figure 1: Typical Undervoltage Characteristics tends to exceed the maximum allowed to prevent trans-
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 CS2841B
Circuit Description: continued

former saturation in some power supplies, the internal

oscillator waveform provides the maximum duty cycle
clamp as programmed by the selection of OSC compo-
OSC
nents.

OSC
RESET
Setting the Oscillator
Oscillator timing capacitor, CT, is charged by VREF through
EA Output RT and discharged by an internal current source. During
Switch the discharge time, the internal clock signal blanks out the
Current
output to the Low state, thus providing a user selected
VCC maximum duty cycle clamp. Charge and discharge times
are determined by the general formulas:
IO

VO
t c = RTCT ln
( VREF - Vlower
VREF - Vupper )
Figure 2: Timing Diagram for key CS2841B parameters t d = RTCT ln
( VREF - IdRT - Vlower
VREF - IdRT - Vupper )
Substituting in typical values for the parameters in the
V REF above formulas:
RT VREF = 5.0V, Vupper = 2.7V, Vlower = 1.0V, Id = 8.3mA
tc ≈ 0.5534RTCT
OSC
CT

Gnd td = RTCT ln
( 2.3 - 0.0083 RT
4.0 - 0.0083 RT )
The frequency and maximum duty cycle can be deter-
Timing parameters
mined from the Typical Performance Characteristic
graphs.
Vupper

Grounding
Vlower High peak currents associated with capacitive loads neces-
tc td sitate careful grounding techniques. Timing and bypass
Sawtooth Mode capacitors should be connected close to Gnd pin in a sin-
gle point ground.
LARGE RT (≈10kΩ) The transistor and 5kΩ potentiometer are used to sample
the oscillator waveform and apply an adjustable ramp
to Sense.
VOSC

Internal Clock
Triangular Mode

SMALL RT (≈700kΩ)

VOSC

Internal Clock
Figure 3: Oscillator Timing Network and parameters

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CS2841B Package Specification

PACKAGE DIMENSIONS IN mm (INCHES) PACKAGE THERMAL DATA

D Thermal Data 8L 14 L
Lead Count Metric English PDIP SO Narrow
Max Min Max Min RΘJC typ 52 30 ˚C/W
8 Lead PDIP 10.16 9.02 .400 .355 RΘJA typ 100 125 ˚C/W
14 Lead SO Narrow 8.75 8.55 .344 .337

Surface Mount Narrow Body (D); 150 mil wide

4.00 (.157) 6.20 (.244)

3.80 (.150) 5.80 (.228)

0.51 (.020)
1.27 (.050) BSC
0.33 (.013)

1.75 (.069) MAX

1.57 (.062)
1.37 (.054)

1.27 (.050) 0.25 (.010)

0.40 (.016) 0.19 (.008) 0.25 (0.10)
0.10 (.004)
D
REF: JEDEC MS-012

Plastic DIP (N); 300 mil wide

7.11 (.280)
6.10 (.240)

8.26 (.325) 1.77 (.070)

2.54 (.100) BSC
7.62 (.300) 1.14 (.045)

3.68 (.145)
2.92 (.115)

.356 (.014) 0.39 (.015)

MIN.
.203 (.008)
.558 (.022) Some 8 and 16 lead
.356 (.014) packages may have
1/2 lead at the end
REF: JEDEC MS-001 D of the package.
All specs are the same.

Ordering Information

Part Number Description

CS2841BEN8 8L PDIP
Cherry Semiconductor Corporation reserves the
CS2841BED14 14L SO Narrow
right to make changes to the specifications without
CS2841BEDR14 14L SO Narrow notice. Please contact Cherry Semiconductor
(tape & reel) Corporation for the latest available information.

Rev. 6/23/99 © 1999 Cherry Semiconductor Corporation

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