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Assignment Chapter 4 DLD

This document provides instructions for Assignment #1 on combinational circuits for a student named Tayyaba Asif. It includes 9 questions asking the student to design various combinational logic circuits using gates, decoders, multiplexers, and adders. The assignment is due on December 14, 2020 and must be handwritten, scanned, and uploaded to Google Classroom by the due date.

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Tayyaba Asif
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100% found this document useful (1 vote)
94 views20 pages

Assignment Chapter 4 DLD

This document provides instructions for Assignment #1 on combinational circuits for a student named Tayyaba Asif. It includes 9 questions asking the student to design various combinational logic circuits using gates, decoders, multiplexers, and adders. The assignment is due on December 14, 2020 and must be handwritten, scanned, and uploaded to Google Classroom by the due date.

Uploaded by

Tayyaba Asif
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Assignment#1 – Combinational Circuits Roll Number:

2019-CE-05
Due date:14-12-2020 Name:
TAYYABA ASIF
Prepared By: Raja Muzammil Muneer Total Marks: 10

Instructions
• Write your Name, Roll number, Section and instructor name on
front page of your assignment.
• Only handwritten assignment is acceptable.
• Take snapshot of your handwritten assignment and add all pictures
to 1 pdf file.
• Upload Assignment on Google Classroom within due date.

1) Design a combinational circuit with three inputs, x , y , and z , and three outputs, A, B
, and C . When the binary input is 0, 1, 2, or 3, the binary output is one greater than
the input. When the binary input is 4, 5, 6, or 7, the binary output is two less than the
input.

2) A majority circuit is a combinational circuit whose output is equal to 1 if the input


variables have more 1’s than 0’s. The output is 0 otherwise. Design a 3-input majority
circuit by finding the circuit’s truth table, Boolean equation, and a logic diagram.

3) Design a four-bit combinational circuit 2’s complement. (The output generates the 2’s
complement of the input binary number.) Show that the circuit can be constructed
with exclusive-OR gates.

4) Design a combinational circuit that generates the 9’s complement of a BCD digit.

5) Construct a 5-to-32-line decoder with four 3-to-8-line decoders with enable and a 2to-
4-line decoder. Use block diagrams for the components.

6) Construct a 16 x 1 multiplexer with two 8 x1 and one 2 x 1 multiplexers. Use block


diagrams.

7) Implement a full adder with two 4 x 1 multiplexers.

8) For a binary multiplier that multiplies two unsigned four-bit numbers,Using AND
gates and binary adders , design the circuit.

9) Design an excess-3-to-binary decoder using the unused combinations of the code as


don’t-care conditions.

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