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Computer Architecture Exercises

This document contains 9 practice problems related to a basic computer architecture. The problems cover topics like instruction encoding, register transfers, instruction execution, and register contents after instruction execution. They require determining register values, operation codes, and sequencing of micro-operations based on the given computer design and initial register values.

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Yasir Butt
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0% found this document useful (0 votes)
163 views3 pages

Computer Architecture Exercises

This document contains 9 practice problems related to a basic computer architecture. The problems cover topics like instruction encoding, register transfers, instruction execution, and register contents after instruction execution. They require determining register values, operation codes, and sequencing of micro-operations based on the given computer design and initial register values.

Uploaded by

Yasir Butt
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Lecture 6 Practice Problems – Part 1

Question #1
A computer uses a memory unit with 256K words of 32 bits each. A binary instruction code is
stored in one word of memory. The instruction has four parts: an indirect bit, an operation code,
a register code part to specify one of 64 registers, and an address part.
a) How many bits are there in the operation code, the register code part, and the address
part?
b) How many bits are there in the data and address inputs of the memory?

Question #2
The following control inputs are active in the bus system. For each case, specify the register
transfer that will be executed during the next clock transition.

Question #3
The following register transfers are to be executed in the bus system. For each transfer, specify:
(1) the binary value that must be applied to bus select inputs S2, S1, and S0; (2) the register
whose LD control input must be active (if any); (3) a memory read or write operation (if
needed); and (4) the operation in the adder and logic circuit (if any).
a) ARPC
b) JR  M[AR]
c) M[AR]  TR
d) ACDR, DRAC (done simultaneously)

Question #4
Explain why each of the following micro-operations cannot be executed during a single clock
pulse in the bus system. Specify a sequence of micro-operations that will perform the operation.
a) IR <- M[PC]
b) AC <- AC + TR
c) DR <- DR + AC (AC does not change)
Question #5
For each of the following 16-bit instructions, give the equivalent four-digit hexadecimal code
and explain in your own words what it is that the instruction is going to perform.
a) 0001 0000 0010 0100
b) 1011 0001 0010 0100
c) 0111 0000 0010 0000

Question #6
The content of AC in the basic computer is hexadecimal A937 and the initial value of E is 1.
The initial value of PC is hexadecimal 021.Determine the contents of AC, E, PC, AR, and IR
in hexadecimal after the execution of the register-reference instructions one by one starting
from the CLA instruction.

E AC PC AR IR
Initial 1 A937 021 - -
CLA
CLE
CMA
CME
CIR
CIL
INC
SPA
SNA
SZA
SZE
HLT

Question #7
An instruction at address 021 in the basic computer has I = 0, an operation code of the AND
instruction, and an address part equal to 083 (all numbers are in hexadecimal). The memory
word at address 083 contains the operand B8F2 and the content of AC is A937. Go over the
instruction cycle and determine the contents of the following registers at the end of the execute
phase: PC, AR, DR, AC, and JR. Repeat the problem for all memory-reference instruction.

PC AR DR AC IR
Initial 021 - - A937 -
AND
ADD
LDA
STA
BUN
BSA
ISZ
Question #8
Show the contents in hexadecimal of registers PC, AR, DR, JR, and SC of the basic computer
when an ISZ indirect instruction is fetched from memory and executed. The initial content of
PC is 7FF. The content of memory at address 7FF is EA9F. The content of memory at address
A9F is 0C35. The content of memory at address C35 is FFFF. Give the answer for each timing
signal.

PC AR DR IR SC
Initial 7FF - - - 0
T0
T1
T2
T3
T4
T5
T6

Question #9
The content of PC in the basic computer is 3AF (all numbers are in hexadecimal). The content
of AC is 7EC3. The content of memory at address 3AF is 932E. The content of memory at
address 32E is 09AC. The content of memory at address 9AC is 8B9F.
a) What is the instruction that will be fetched and executed next?
b) Show the binary operation that will be performed in the AC when the instruction is
executed.
c) Give the contents of registers PC, AR, DR, AC, and IR in hexadecimal and the values
of E, I, and the sequence counter SC in binary at the end of the instruction cycle.

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